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1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6#ifndef ATH11K_CORE_H
7#define ATH11K_CORE_H
8
9#include <linux/types.h>
10#include <linux/interrupt.h>
11#include <linux/irq.h>
12#include <linux/bitfield.h>
13#include "qmi.h"
14#include "htc.h"
15#include "wmi.h"
16#include "hal.h"
17#include "dp.h"
18#include "ce.h"
19#include "mac.h"
20#include "hw.h"
21#include "hal_rx.h"
22#include "reg.h"
23#include "thermal.h"
24#include "dbring.h"
25#include "spectral.h"
26
27#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
28
29#define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
30
31#define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
32
33/* Pending management packets threshold for dropping probe responses */
34#define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
35
36#define ATH11K_INVALID_HW_MAC_ID 0xFF
37#define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
38
39extern unsigned int ath11k_frame_mode;
40
41#define ATH11K_MON_TIMER_INTERVAL 10
42
43enum ath11k_supported_bw {
44 ATH11K_BW_20 = 0,
45 ATH11K_BW_40 = 1,
46 ATH11K_BW_80 = 2,
47 ATH11K_BW_160 = 3,
48};
49
50enum wme_ac {
51 WME_AC_BE,
52 WME_AC_BK,
53 WME_AC_VI,
54 WME_AC_VO,
55 WME_NUM_AC
56};
57
58#define ATH11K_HT_MCS_MAX 7
59#define ATH11K_VHT_MCS_MAX 9
60#define ATH11K_HE_MCS_MAX 11
61
62enum ath11k_crypt_mode {
63 /* Only use hardware crypto engine */
64 ATH11K_CRYPT_MODE_HW,
65 /* Only use software crypto */
66 ATH11K_CRYPT_MODE_SW,
67};
68
69static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
70{
71 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
72 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
73 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
74 WME_AC_VO);
75}
76
77enum ath11k_skb_flags {
78 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
79 ATH11K_SKB_CIPHER_SET = BIT(1),
80};
81
82struct ath11k_skb_cb {
83 dma_addr_t paddr;
84 u8 eid;
85 u8 flags;
86 u32 cipher;
87 struct ath11k *ar;
88 struct ieee80211_vif *vif;
89} __packed;
90
91struct ath11k_skb_rxcb {
92 dma_addr_t paddr;
93 bool is_first_msdu;
94 bool is_last_msdu;
95 bool is_continuation;
96 struct hal_rx_desc *rx_desc;
97 u8 err_rel_src;
98 u8 err_code;
99 u8 mac_id;
100 u8 unmapped;
101 u8 is_frag;
102 u8 tid;
103};
104
105enum ath11k_hw_rev {
106 ATH11K_HW_IPQ8074,
107 ATH11K_HW_QCA6390_HW20,
108 ATH11K_HW_IPQ6018_HW10,
109 ATH11K_HW_QCN9074_HW10,
110 ATH11K_HW_WCN6855_HW20,
111};
112
113enum ath11k_firmware_mode {
114 /* the default mode, standard 802.11 functionality */
115 ATH11K_FIRMWARE_MODE_NORMAL,
116
117 /* factory tests etc */
118 ATH11K_FIRMWARE_MODE_FTM,
119
120 /* Cold boot calibration */
121 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
122};
123
124extern bool ath11k_cold_boot_cal;
125
126#define ATH11K_IRQ_NUM_MAX 52
127#define ATH11K_EXT_IRQ_NUM_MAX 16
128
129struct ath11k_ext_irq_grp {
130 struct ath11k_base *ab;
131 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
132 u32 num_irq;
133 u32 grp_id;
134 u64 timestamp;
135 struct napi_struct napi;
136 struct net_device napi_ndev;
137};
138
139#define HEHANDLE_CAP_PHYINFO_SIZE 3
140#define HECAP_PHYINFO_SIZE 9
141#define HECAP_MACINFO_SIZE 5
142#define HECAP_TXRX_MCS_NSS_SIZE 2
143#define HECAP_PPET16_PPET8_MAX_SIZE 25
144
145#define HE_PPET16_PPET8_SIZE 8
146
147/* 802.11ax PPE (PPDU packet Extension) threshold */
148struct he_ppe_threshold {
149 u32 numss_m1;
150 u32 ru_mask;
151 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
152};
153
154struct ath11k_he {
155 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
156 u32 hecap_rxmcsnssmap;
157 u32 hecap_txmcsnssmap;
158 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
159 struct he_ppe_threshold hecap_ppet;
160 u32 heop_param;
161};
162
163#define MAX_RADIOS 3
164
165enum {
166 WMI_HOST_TP_SCALE_MAX = 0,
167 WMI_HOST_TP_SCALE_50 = 1,
168 WMI_HOST_TP_SCALE_25 = 2,
169 WMI_HOST_TP_SCALE_12 = 3,
170 WMI_HOST_TP_SCALE_MIN = 4,
171 WMI_HOST_TP_SCALE_SIZE = 5,
172};
173
174enum ath11k_scan_state {
175 ATH11K_SCAN_IDLE,
176 ATH11K_SCAN_STARTING,
177 ATH11K_SCAN_RUNNING,
178 ATH11K_SCAN_ABORTING,
179};
180
181enum ath11k_dev_flags {
182 ATH11K_CAC_RUNNING,
183 ATH11K_FLAG_CORE_REGISTERED,
184 ATH11K_FLAG_CRASH_FLUSH,
185 ATH11K_FLAG_RAW_MODE,
186 ATH11K_FLAG_HW_CRYPTO_DISABLED,
187 ATH11K_FLAG_BTCOEX,
188 ATH11K_FLAG_RECOVERY,
189 ATH11K_FLAG_UNREGISTERING,
190 ATH11K_FLAG_REGISTERED,
191 ATH11K_FLAG_QMI_FAIL,
192 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
193};
194
195enum ath11k_monitor_flags {
196 ATH11K_FLAG_MONITOR_ENABLED,
197};
198
199struct ath11k_vif {
200 u32 vdev_id;
201 enum wmi_vdev_type vdev_type;
202 enum wmi_vdev_subtype vdev_subtype;
203 u32 beacon_interval;
204 u32 dtim_period;
205 u16 ast_hash;
206 u16 ast_idx;
207 u16 tcl_metadata;
208 u8 hal_addr_search_flags;
209 u8 search_type;
210
211 struct ath11k *ar;
212 struct ieee80211_vif *vif;
213
214 u16 tx_seq_no;
215 struct wmi_wmm_params_all_arg wmm_params;
216 struct list_head list;
217 union {
218 struct {
219 u32 uapsd;
220 } sta;
221 struct {
222 /* 127 stations; wmi limit */
223 u8 tim_bitmap[16];
224 u8 tim_len;
225 u32 ssid_len;
226 u8 ssid[IEEE80211_MAX_SSID_LEN];
227 bool hidden_ssid;
228 /* P2P_IE with NoA attribute for P2P_GO case */
229 u32 noa_len;
230 u8 *noa_data;
231 } ap;
232 } u;
233
234 bool is_started;
235 bool is_up;
236 bool spectral_enabled;
237 u32 aid;
238 u8 bssid[ETH_ALEN];
239 struct cfg80211_bitrate_mask bitrate_mask;
240 struct delayed_work connection_loss_work;
241 int num_legacy_stations;
242 int rtscts_prot_mode;
243 int txpower;
244 bool rsnie_present;
245 bool wpaie_present;
246 struct ieee80211_chanctx_conf chanctx;
247};
248
249struct ath11k_vif_iter {
250 u32 vdev_id;
251 struct ath11k_vif *arvif;
252};
253
254struct ath11k_rx_peer_stats {
255 u64 num_msdu;
256 u64 num_mpdu_fcs_ok;
257 u64 num_mpdu_fcs_err;
258 u64 tcp_msdu_count;
259 u64 udp_msdu_count;
260 u64 other_msdu_count;
261 u64 ampdu_msdu_count;
262 u64 non_ampdu_msdu_count;
263 u64 stbc_count;
264 u64 beamformed_count;
265 u64 mcs_count[HAL_RX_MAX_MCS + 1];
266 u64 nss_count[HAL_RX_MAX_NSS];
267 u64 bw_count[HAL_RX_BW_MAX];
268 u64 gi_count[HAL_RX_GI_MAX];
269 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
270 u64 tid_count[IEEE80211_NUM_TIDS + 1];
271 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
272 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
273 u64 rx_duration;
274 u64 dcm_count;
275 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
276};
277
278#define ATH11K_HE_MCS_NUM 12
279#define ATH11K_VHT_MCS_NUM 10
280#define ATH11K_BW_NUM 4
281#define ATH11K_NSS_NUM 4
282#define ATH11K_LEGACY_NUM 12
283#define ATH11K_GI_NUM 4
284#define ATH11K_HT_MCS_NUM 32
285
286enum ath11k_pkt_rx_err {
287 ATH11K_PKT_RX_ERR_FCS,
288 ATH11K_PKT_RX_ERR_TKIP,
289 ATH11K_PKT_RX_ERR_CRYPT,
290 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
291 ATH11K_PKT_RX_ERR_MAX,
292};
293
294enum ath11k_ampdu_subfrm_num {
295 ATH11K_AMPDU_SUBFRM_NUM_10,
296 ATH11K_AMPDU_SUBFRM_NUM_20,
297 ATH11K_AMPDU_SUBFRM_NUM_30,
298 ATH11K_AMPDU_SUBFRM_NUM_40,
299 ATH11K_AMPDU_SUBFRM_NUM_50,
300 ATH11K_AMPDU_SUBFRM_NUM_60,
301 ATH11K_AMPDU_SUBFRM_NUM_MORE,
302 ATH11K_AMPDU_SUBFRM_NUM_MAX,
303};
304
305enum ath11k_amsdu_subfrm_num {
306 ATH11K_AMSDU_SUBFRM_NUM_1,
307 ATH11K_AMSDU_SUBFRM_NUM_2,
308 ATH11K_AMSDU_SUBFRM_NUM_3,
309 ATH11K_AMSDU_SUBFRM_NUM_4,
310 ATH11K_AMSDU_SUBFRM_NUM_MORE,
311 ATH11K_AMSDU_SUBFRM_NUM_MAX,
312};
313
314enum ath11k_counter_type {
315 ATH11K_COUNTER_TYPE_BYTES,
316 ATH11K_COUNTER_TYPE_PKTS,
317 ATH11K_COUNTER_TYPE_MAX,
318};
319
320enum ath11k_stats_type {
321 ATH11K_STATS_TYPE_SUCC,
322 ATH11K_STATS_TYPE_FAIL,
323 ATH11K_STATS_TYPE_RETRY,
324 ATH11K_STATS_TYPE_AMPDU,
325 ATH11K_STATS_TYPE_MAX,
326};
327
328struct ath11k_htt_data_stats {
329 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
330 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
331 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
332 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
333 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
334 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
335 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
336};
337
338struct ath11k_htt_tx_stats {
339 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
340 u64 tx_duration;
341 u64 ba_fails;
342 u64 ack_fails;
343};
344
345struct ath11k_per_ppdu_tx_stats {
346 u16 succ_pkts;
347 u16 failed_pkts;
348 u16 retry_pkts;
349 u32 succ_bytes;
350 u32 failed_bytes;
351 u32 retry_bytes;
352};
353
354struct ath11k_sta {
355 struct ath11k_vif *arvif;
356
357 /* the following are protected by ar->data_lock */
358 u32 changed; /* IEEE80211_RC_* */
359 u32 bw;
360 u32 nss;
361 u32 smps;
362 enum hal_pn_type pn_type;
363
364 struct work_struct update_wk;
365 struct rate_info txrate;
366 struct rate_info last_txrate;
367 u64 rx_duration;
368 u64 tx_duration;
369 u8 rssi_comb;
370 struct ath11k_htt_tx_stats *tx_stats;
371 struct ath11k_rx_peer_stats *rx_stats;
372
373#ifdef CONFIG_MAC80211_DEBUGFS
374 /* protected by conf_mutex */
375 bool aggr_mode;
376#endif
377};
378
379#define ATH11K_MIN_5G_FREQ 4150
380#define ATH11K_MIN_6G_FREQ 5945
381#define ATH11K_MAX_6G_FREQ 7115
382#define ATH11K_NUM_CHANS 100
383#define ATH11K_MAX_5G_CHAN 173
384
385enum ath11k_state {
386 ATH11K_STATE_OFF,
387 ATH11K_STATE_ON,
388 ATH11K_STATE_RESTARTING,
389 ATH11K_STATE_RESTARTED,
390 ATH11K_STATE_WEDGED,
391 /* Add other states as required */
392};
393
394/* Antenna noise floor */
395#define ATH11K_DEFAULT_NOISE_FLOOR -95
396
397struct ath11k_fw_stats {
398 struct dentry *debugfs_fwstats;
399 u32 pdev_id;
400 u32 stats_id;
401 struct list_head pdevs;
402 struct list_head vdevs;
403 struct list_head bcn;
404};
405
406struct ath11k_dbg_htt_stats {
407 u8 type;
408 u8 reset;
409 struct debug_htt_stats_req *stats_req;
410 /* protects shared stats req buffer */
411 spinlock_t lock;
412};
413
414struct ath11k_debug {
415 struct dentry *debugfs_pdev;
416 struct ath11k_dbg_htt_stats htt_stats;
417 u32 extd_tx_stats;
418 struct ath11k_fw_stats fw_stats;
419 struct completion fw_stats_complete;
420 bool fw_stats_done;
421 u32 extd_rx_stats;
422 u32 pktlog_filter;
423 u32 pktlog_mode;
424 u32 pktlog_peer_valid;
425 u8 pktlog_peer_addr[ETH_ALEN];
426 u32 rx_filter;
427};
428
429struct ath11k_per_peer_tx_stats {
430 u32 succ_bytes;
431 u32 retry_bytes;
432 u32 failed_bytes;
433 u16 succ_pkts;
434 u16 retry_pkts;
435 u16 failed_pkts;
436 u32 duration;
437 u8 ba_fails;
438 bool is_ampdu;
439};
440
441#define ATH11K_FLUSH_TIMEOUT (5 * HZ)
442#define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
443
444struct ath11k {
445 struct ath11k_base *ab;
446 struct ath11k_pdev *pdev;
447 struct ieee80211_hw *hw;
448 struct ieee80211_ops *ops;
449 struct ath11k_pdev_wmi *wmi;
450 struct ath11k_pdev_dp dp;
451 u8 mac_addr[ETH_ALEN];
452 u32 ht_cap_info;
453 u32 vht_cap_info;
454 struct ath11k_he ar_he;
455 enum ath11k_state state;
456 bool supports_6ghz;
457 struct {
458 struct completion started;
459 struct completion completed;
460 struct completion on_channel;
461 struct delayed_work timeout;
462 enum ath11k_scan_state state;
463 bool is_roc;
464 int vdev_id;
465 int roc_freq;
466 bool roc_notify;
467 } scan;
468
469 struct {
470 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
471 struct ieee80211_sband_iftype_data
472 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
473 } mac;
474
475 unsigned long dev_flags;
476 unsigned int filter_flags;
477 unsigned long monitor_flags;
478 u32 min_tx_power;
479 u32 max_tx_power;
480 u32 txpower_limit_2g;
481 u32 txpower_limit_5g;
482 u32 txpower_scale;
483 u32 power_scale;
484 u32 chan_tx_pwr;
485 u32 num_stations;
486 u32 max_num_stations;
487 bool monitor_present;
488 /* To synchronize concurrent synchronous mac80211 callback operations,
489 * concurrent debugfs configuration and concurrent FW statistics events.
490 */
491 struct mutex conf_mutex;
492 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
493 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
494 * channel context data, survey info, test mode data.
495 */
496 spinlock_t data_lock;
497
498 struct list_head arvifs;
499 /* should never be NULL; needed for regular htt rx */
500 struct ieee80211_channel *rx_channel;
501
502 /* valid during scan; needed for mgmt rx during scan */
503 struct ieee80211_channel *scan_channel;
504
505 u8 cfg_tx_chainmask;
506 u8 cfg_rx_chainmask;
507 u8 num_rx_chains;
508 u8 num_tx_chains;
509 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
510 u8 pdev_idx;
511 u8 lmac_id;
512
513 struct completion peer_assoc_done;
514 struct completion peer_delete_done;
515
516 int install_key_status;
517 struct completion install_key_done;
518
519 int last_wmi_vdev_start_status;
520 struct completion vdev_setup_done;
521 struct completion vdev_delete_done;
522
523 int num_peers;
524 int max_num_peers;
525 u32 num_started_vdevs;
526 u32 num_created_vdevs;
527 unsigned long long allocated_vdev_map;
528
529 struct idr txmgmt_idr;
530 /* protects txmgmt_idr data */
531 spinlock_t txmgmt_idr_lock;
532 atomic_t num_pending_mgmt_tx;
533
534 /* cycle count is reported twice for each visited channel during scan.
535 * access protected by data_lock
536 */
537 u32 survey_last_rx_clear_count;
538 u32 survey_last_cycle_count;
539
540 /* Channel info events are expected to come in pairs without and with
541 * COMPLETE flag set respectively for each channel visit during scan.
542 *
543 * However there are deviations from this rule. This flag is used to
544 * avoid reporting garbage data.
545 */
546 bool ch_info_can_report_survey;
547 struct survey_info survey[ATH11K_NUM_CHANS];
548 struct completion bss_survey_done;
549
550 struct work_struct regd_update_work;
551
552 struct work_struct wmi_mgmt_tx_work;
553 struct sk_buff_head wmi_mgmt_tx_queue;
554
555 struct ath11k_per_peer_tx_stats peer_tx_stats;
556 struct list_head ppdu_stats_info;
557 u32 ppdu_stat_list_depth;
558
559 struct ath11k_per_peer_tx_stats cached_stats;
560 u32 last_ppdu_id;
561 u32 cached_ppdu_id;
562#ifdef CONFIG_ATH11K_DEBUGFS
563 struct ath11k_debug debug;
564#endif
565#ifdef CONFIG_ATH11K_SPECTRAL
566 struct ath11k_spectral spectral;
567#endif
568 bool dfs_block_radar_events;
569 struct ath11k_thermal thermal;
570};
571
572struct ath11k_band_cap {
573 u32 phy_id;
574 u32 max_bw_supported;
575 u32 ht_cap_info;
576 u32 he_cap_info[2];
577 u32 he_mcs;
578 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
579 struct ath11k_ppe_threshold he_ppet;
580 u16 he_6ghz_capa;
581};
582
583struct ath11k_pdev_cap {
584 u32 supported_bands;
585 u32 ampdu_density;
586 u32 vht_cap;
587 u32 vht_mcs;
588 u32 he_mcs;
589 u32 tx_chain_mask;
590 u32 rx_chain_mask;
591 u32 tx_chain_mask_shift;
592 u32 rx_chain_mask_shift;
593 struct ath11k_band_cap band[NUM_NL80211_BANDS];
594};
595
596struct ath11k_pdev {
597 struct ath11k *ar;
598 u32 pdev_id;
599 struct ath11k_pdev_cap cap;
600 u8 mac_addr[ETH_ALEN];
601};
602
603struct ath11k_board_data {
604 const struct firmware *fw;
605 const void *data;
606 size_t len;
607};
608
609struct ath11k_bus_params {
610 bool mhi_support;
611 bool m3_fw_support;
612 bool fixed_bdf_addr;
613 bool fixed_mem_region;
614 bool static_window_map;
615};
616
617/* IPQ8074 HW channel counters frequency value in hertz */
618#define IPQ8074_CC_FREQ_HERTZ 320000
619
620struct ath11k_bp_stats {
621 /* Head Pointer reported by the last HTT Backpressure event for the ring */
622 u16 hp;
623
624 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
625 u16 tp;
626
627 /* Number of Backpressure events received for the ring */
628 u32 count;
629
630 /* Last recorded event timestamp */
631 unsigned long jiffies;
632};
633
634struct ath11k_dp_ring_bp_stats {
635 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
636 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
637};
638
639struct ath11k_soc_dp_tx_err_stats {
640 /* TCL Ring Descriptor unavailable */
641 u32 desc_na[DP_TCL_NUM_RING_MAX];
642 /* Other failures during dp_tx due to mem allocation failure
643 * idr unavailable etc.
644 */
645 atomic_t misc_fail;
646};
647
648struct ath11k_soc_dp_stats {
649 u32 err_ring_pkts;
650 u32 invalid_rbm;
651 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
652 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
653 u32 hal_reo_error[DP_REO_DST_RING_MAX];
654 struct ath11k_soc_dp_tx_err_stats tx_err;
655 struct ath11k_dp_ring_bp_stats bp_stats;
656};
657
658/* Master structure to hold the hw data which may be used in core module */
659struct ath11k_base {
660 enum ath11k_hw_rev hw_rev;
661 struct platform_device *pdev;
662 struct device *dev;
663 struct ath11k_qmi qmi;
664 struct ath11k_wmi_base wmi_ab;
665 struct completion fw_ready;
666 int num_radios;
667 /* HW channel counters frequency value in hertz common to all MACs */
668 u32 cc_freq_hz;
669
670 struct ath11k_htc htc;
671
672 struct ath11k_dp dp;
673
674 void __iomem *mem;
675 unsigned long mem_len;
676
677 struct {
678 enum ath11k_bus bus;
679 const struct ath11k_hif_ops *ops;
680 } hif;
681
682 struct {
683 struct completion wakeup_completed;
684 } wow;
685
686 struct ath11k_ce ce;
687 struct timer_list rx_replenish_retry;
688 struct ath11k_hal hal;
689 /* To synchronize core_start/core_stop */
690 struct mutex core_lock;
691 /* Protects data like peers */
692 spinlock_t base_lock;
693 struct ath11k_pdev pdevs[MAX_RADIOS];
694 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
695 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
696 unsigned long long free_vdev_map;
697 struct list_head peers;
698 wait_queue_head_t peer_mapping_wq;
699 u8 mac_addr[ETH_ALEN];
700 bool wmi_ready;
701 u32 wlan_init_status;
702 int irq_num[ATH11K_IRQ_NUM_MAX];
703 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
704 struct napi_struct *napi;
705 struct ath11k_targ_cap target_caps;
706 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
707 bool pdevs_macaddr_valid;
708 int bd_api;
709
710 struct ath11k_hw_params hw_params;
711 struct ath11k_bus_params bus_params;
712
713 const struct firmware *cal_file;
714
715 /* Below regd's are protected by ab->data_lock */
716 /* This is the regd set for every radio
717 * by the firmware during initializatin
718 */
719 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
720 /* This regd is set during dynamic country setting
721 * This may or may not be used during the runtime
722 */
723 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
724
725 /* Current DFS Regulatory */
726 enum ath11k_dfs_region dfs_region;
727#ifdef CONFIG_ATH11K_DEBUGFS
728 struct dentry *debugfs_soc;
729 struct dentry *debugfs_ath11k;
730#endif
731 struct ath11k_soc_dp_stats soc_stats;
732
733 unsigned long dev_flags;
734 struct completion driver_recovery;
735 struct workqueue_struct *workqueue;
736 struct work_struct restart_work;
737 struct {
738 /* protected by data_lock */
739 u32 fw_crash_counter;
740 } stats;
741 u32 pktlog_defs_checksum;
742
743 struct ath11k_dbring_cap *db_caps;
744 u32 num_db_cap;
745
746 struct timer_list mon_reap_timer;
747
748 struct completion htc_suspend;
749
750 /* must be last */
751 u8 drv_priv[0] __aligned(sizeof(void *));
752};
753
754struct ath11k_fw_stats_pdev {
755 struct list_head list;
756
757 /* PDEV stats */
758 s32 ch_noise_floor;
759 /* Cycles spent transmitting frames */
760 u32 tx_frame_count;
761 /* Cycles spent receiving frames */
762 u32 rx_frame_count;
763 /* Total channel busy time, evidently */
764 u32 rx_clear_count;
765 /* Total on-channel time */
766 u32 cycle_count;
767 u32 phy_err_count;
768 u32 chan_tx_power;
769 u32 ack_rx_bad;
770 u32 rts_bad;
771 u32 rts_good;
772 u32 fcs_bad;
773 u32 no_beacons;
774 u32 mib_int_count;
775
776 /* PDEV TX stats */
777 /* Num HTT cookies queued to dispatch list */
778 s32 comp_queued;
779 /* Num HTT cookies dispatched */
780 s32 comp_delivered;
781 /* Num MSDU queued to WAL */
782 s32 msdu_enqued;
783 /* Num MPDU queue to WAL */
784 s32 mpdu_enqued;
785 /* Num MSDUs dropped by WMM limit */
786 s32 wmm_drop;
787 /* Num Local frames queued */
788 s32 local_enqued;
789 /* Num Local frames done */
790 s32 local_freed;
791 /* Num queued to HW */
792 s32 hw_queued;
793 /* Num PPDU reaped from HW */
794 s32 hw_reaped;
795 /* Num underruns */
796 s32 underrun;
797 /* Num PPDUs cleaned up in TX abort */
798 s32 tx_abort;
799 /* Num MPDUs requeued by SW */
800 s32 mpdus_requeued;
801 /* excessive retries */
802 u32 tx_ko;
803 /* data hw rate code */
804 u32 data_rc;
805 /* Scheduler self triggers */
806 u32 self_triggers;
807 /* frames dropped due to excessive sw retries */
808 u32 sw_retry_failure;
809 /* illegal rate phy errors */
810 u32 illgl_rate_phy_err;
811 /* wal pdev continuous xretry */
812 u32 pdev_cont_xretry;
813 /* wal pdev tx timeouts */
814 u32 pdev_tx_timeout;
815 /* wal pdev resets */
816 u32 pdev_resets;
817 /* frames dropped due to non-availability of stateless TIDs */
818 u32 stateless_tid_alloc_failure;
819 /* PhY/BB underrun */
820 u32 phy_underrun;
821 /* MPDU is more than txop limit */
822 u32 txop_ovf;
823
824 /* PDEV RX stats */
825 /* Cnts any change in ring routing mid-ppdu */
826 s32 mid_ppdu_route_change;
827 /* Total number of statuses processed */
828 s32 status_rcvd;
829 /* Extra frags on rings 0-3 */
830 s32 r0_frags;
831 s32 r1_frags;
832 s32 r2_frags;
833 s32 r3_frags;
834 /* MSDUs / MPDUs delivered to HTT */
835 s32 htt_msdus;
836 s32 htt_mpdus;
837 /* MSDUs / MPDUs delivered to local stack */
838 s32 loc_msdus;
839 s32 loc_mpdus;
840 /* AMSDUs that have more MSDUs than the status ring size */
841 s32 oversize_amsdu;
842 /* Number of PHY errors */
843 s32 phy_errs;
844 /* Number of PHY errors drops */
845 s32 phy_err_drop;
846 /* Number of mpdu errors - FCS, MIC, ENC etc. */
847 s32 mpdu_errs;
848};
849
850struct ath11k_fw_stats_vdev {
851 struct list_head list;
852
853 u32 vdev_id;
854 u32 beacon_snr;
855 u32 data_snr;
856 u32 num_tx_frames[WLAN_MAX_AC];
857 u32 num_rx_frames;
858 u32 num_tx_frames_retries[WLAN_MAX_AC];
859 u32 num_tx_frames_failures[WLAN_MAX_AC];
860 u32 num_rts_fail;
861 u32 num_rts_success;
862 u32 num_rx_err;
863 u32 num_rx_discard;
864 u32 num_tx_not_acked;
865 u32 tx_rate_history[MAX_TX_RATE_VALUES];
866 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
867};
868
869struct ath11k_fw_stats_bcn {
870 struct list_head list;
871
872 u32 vdev_id;
873 u32 tx_bcn_succ_cnt;
874 u32 tx_bcn_outage_cnt;
875};
876
877extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
878extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
879extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
880
881extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
882extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
883
884extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
885extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
886int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
887int ath11k_core_pre_init(struct ath11k_base *ab);
888int ath11k_core_init(struct ath11k_base *ath11k);
889void ath11k_core_deinit(struct ath11k_base *ath11k);
890struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
891 enum ath11k_bus bus,
892 const struct ath11k_bus_params *bus_params);
893void ath11k_core_free(struct ath11k_base *ath11k);
894int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
895 struct ath11k_board_data *bd);
896void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
897int ath11k_core_check_dt(struct ath11k_base *ath11k);
898
899void ath11k_core_halt(struct ath11k *ar);
900int ath11k_core_resume(struct ath11k_base *ab);
901int ath11k_core_suspend(struct ath11k_base *ab);
902
903const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
904 const char *filename);
905
906static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
907{
908 switch (state) {
909 case ATH11K_SCAN_IDLE:
910 return "idle";
911 case ATH11K_SCAN_STARTING:
912 return "starting";
913 case ATH11K_SCAN_RUNNING:
914 return "running";
915 case ATH11K_SCAN_ABORTING:
916 return "aborting";
917 }
918
919 return "unknown";
920}
921
922static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
923{
924 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
925 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
926 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
927}
928
929static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
930{
931 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
932 return (struct ath11k_skb_rxcb *)skb->cb;
933}
934
935static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
936{
937 return (struct ath11k_vif *)vif->drv_priv;
938}
939
940static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
941 int mac_id)
942{
943 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
944}
945
946static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
947 const char *filename,
948 void *buf, size_t buf_len)
949{
950 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
951 ab->hw_params.fw.dir, filename);
952}
953
954static inline const char *ath11k_bus_str(enum ath11k_bus bus)
955{
956 switch (bus) {
957 case ATH11K_BUS_PCI:
958 return "pci";
959 case ATH11K_BUS_AHB:
960 return "ahb";
961 }
962
963 return "unknown";
964}
965
966#endif /* _CORE_H_ */