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1/*
2 * Based on documentation provided by Dave Jones. Thanks!
3 *
4 * Licensed under the terms of the GNU GPL License version 2.
5 *
6 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/cpufreq.h>
13#include <linux/ioport.h>
14#include <linux/slab.h>
15#include <linux/timex.h>
16#include <linux/io.h>
17#include <linux/delay.h>
18
19#include <asm/msr.h>
20#include <asm/tsc.h>
21
22#define EPS_BRAND_C7M 0
23#define EPS_BRAND_C7 1
24#define EPS_BRAND_EDEN 2
25#define EPS_BRAND_C3 3
26#define EPS_BRAND_C7D 4
27
28struct eps_cpu_data {
29 u32 fsb;
30 struct cpufreq_frequency_table freq_table[];
31};
32
33static struct eps_cpu_data *eps_cpu[NR_CPUS];
34
35
36static unsigned int eps_get(unsigned int cpu)
37{
38 struct eps_cpu_data *centaur;
39 u32 lo, hi;
40
41 if (cpu)
42 return 0;
43 centaur = eps_cpu[cpu];
44 if (centaur == NULL)
45 return 0;
46
47 /* Return current frequency */
48 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
49 return centaur->fsb * ((lo >> 8) & 0xff);
50}
51
52static int eps_set_state(struct eps_cpu_data *centaur,
53 unsigned int cpu,
54 u32 dest_state)
55{
56 struct cpufreq_freqs freqs;
57 u32 lo, hi;
58 int err = 0;
59 int i;
60
61 freqs.old = eps_get(cpu);
62 freqs.new = centaur->fsb * ((dest_state >> 8) & 0xff);
63 freqs.cpu = cpu;
64 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
65
66 /* Wait while CPU is busy */
67 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
68 i = 0;
69 while (lo & ((1 << 16) | (1 << 17))) {
70 udelay(16);
71 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
72 i++;
73 if (unlikely(i > 64)) {
74 err = -ENODEV;
75 goto postchange;
76 }
77 }
78 /* Set new multiplier and voltage */
79 wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
80 /* Wait until transition end */
81 i = 0;
82 do {
83 udelay(16);
84 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
85 i++;
86 if (unlikely(i > 64)) {
87 err = -ENODEV;
88 goto postchange;
89 }
90 } while (lo & ((1 << 16) | (1 << 17)));
91
92 /* Return current frequency */
93postchange:
94 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
95 freqs.new = centaur->fsb * ((lo >> 8) & 0xff);
96
97#ifdef DEBUG
98 {
99 u8 current_multiplier, current_voltage;
100
101 /* Print voltage and multiplier */
102 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
103 current_voltage = lo & 0xff;
104 printk(KERN_INFO "eps: Current voltage = %dmV\n",
105 current_voltage * 16 + 700);
106 current_multiplier = (lo >> 8) & 0xff;
107 printk(KERN_INFO "eps: Current multiplier = %d\n",
108 current_multiplier);
109 }
110#endif
111 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
112 return err;
113}
114
115static int eps_target(struct cpufreq_policy *policy,
116 unsigned int target_freq,
117 unsigned int relation)
118{
119 struct eps_cpu_data *centaur;
120 unsigned int newstate = 0;
121 unsigned int cpu = policy->cpu;
122 unsigned int dest_state;
123 int ret;
124
125 if (unlikely(eps_cpu[cpu] == NULL))
126 return -ENODEV;
127 centaur = eps_cpu[cpu];
128
129 if (unlikely(cpufreq_frequency_table_target(policy,
130 &eps_cpu[cpu]->freq_table[0],
131 target_freq,
132 relation,
133 &newstate))) {
134 return -EINVAL;
135 }
136
137 /* Make frequency transition */
138 dest_state = centaur->freq_table[newstate].index & 0xffff;
139 ret = eps_set_state(centaur, cpu, dest_state);
140 if (ret)
141 printk(KERN_ERR "eps: Timeout!\n");
142 return ret;
143}
144
145static int eps_verify(struct cpufreq_policy *policy)
146{
147 return cpufreq_frequency_table_verify(policy,
148 &eps_cpu[policy->cpu]->freq_table[0]);
149}
150
151static int eps_cpu_init(struct cpufreq_policy *policy)
152{
153 unsigned int i;
154 u32 lo, hi;
155 u64 val;
156 u8 current_multiplier, current_voltage;
157 u8 max_multiplier, max_voltage;
158 u8 min_multiplier, min_voltage;
159 u8 brand = 0;
160 u32 fsb;
161 struct eps_cpu_data *centaur;
162 struct cpuinfo_x86 *c = &cpu_data(0);
163 struct cpufreq_frequency_table *f_table;
164 int k, step, voltage;
165 int ret;
166 int states;
167
168 if (policy->cpu != 0)
169 return -ENODEV;
170
171 /* Check brand */
172 printk(KERN_INFO "eps: Detected VIA ");
173
174 switch (c->x86_model) {
175 case 10:
176 rdmsr(0x1153, lo, hi);
177 brand = (((lo >> 2) ^ lo) >> 18) & 3;
178 printk(KERN_CONT "Model A ");
179 break;
180 case 13:
181 rdmsr(0x1154, lo, hi);
182 brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
183 printk(KERN_CONT "Model D ");
184 break;
185 }
186
187 switch (brand) {
188 case EPS_BRAND_C7M:
189 printk(KERN_CONT "C7-M\n");
190 break;
191 case EPS_BRAND_C7:
192 printk(KERN_CONT "C7\n");
193 break;
194 case EPS_BRAND_EDEN:
195 printk(KERN_CONT "Eden\n");
196 break;
197 case EPS_BRAND_C7D:
198 printk(KERN_CONT "C7-D\n");
199 break;
200 case EPS_BRAND_C3:
201 printk(KERN_CONT "C3\n");
202 return -ENODEV;
203 break;
204 }
205 /* Enable Enhanced PowerSaver */
206 rdmsrl(MSR_IA32_MISC_ENABLE, val);
207 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
208 val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
209 wrmsrl(MSR_IA32_MISC_ENABLE, val);
210 /* Can be locked at 0 */
211 rdmsrl(MSR_IA32_MISC_ENABLE, val);
212 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
213 printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
214 return -ENODEV;
215 }
216 }
217
218 /* Print voltage and multiplier */
219 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
220 current_voltage = lo & 0xff;
221 printk(KERN_INFO "eps: Current voltage = %dmV\n",
222 current_voltage * 16 + 700);
223 current_multiplier = (lo >> 8) & 0xff;
224 printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
225
226 /* Print limits */
227 max_voltage = hi & 0xff;
228 printk(KERN_INFO "eps: Highest voltage = %dmV\n",
229 max_voltage * 16 + 700);
230 max_multiplier = (hi >> 8) & 0xff;
231 printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
232 min_voltage = (hi >> 16) & 0xff;
233 printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
234 min_voltage * 16 + 700);
235 min_multiplier = (hi >> 24) & 0xff;
236 printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
237
238 /* Sanity checks */
239 if (current_multiplier == 0 || max_multiplier == 0
240 || min_multiplier == 0)
241 return -EINVAL;
242 if (current_multiplier > max_multiplier
243 || max_multiplier <= min_multiplier)
244 return -EINVAL;
245 if (current_voltage > 0x1f || max_voltage > 0x1f)
246 return -EINVAL;
247 if (max_voltage < min_voltage)
248 return -EINVAL;
249
250 /* Calc FSB speed */
251 fsb = cpu_khz / current_multiplier;
252 /* Calc number of p-states supported */
253 if (brand == EPS_BRAND_C7M)
254 states = max_multiplier - min_multiplier + 1;
255 else
256 states = 2;
257
258 /* Allocate private data and frequency table for current cpu */
259 centaur = kzalloc(sizeof(struct eps_cpu_data)
260 + (states + 1) * sizeof(struct cpufreq_frequency_table),
261 GFP_KERNEL);
262 if (!centaur)
263 return -ENOMEM;
264 eps_cpu[0] = centaur;
265
266 /* Copy basic values */
267 centaur->fsb = fsb;
268
269 /* Fill frequency and MSR value table */
270 f_table = ¢aur->freq_table[0];
271 if (brand != EPS_BRAND_C7M) {
272 f_table[0].frequency = fsb * min_multiplier;
273 f_table[0].index = (min_multiplier << 8) | min_voltage;
274 f_table[1].frequency = fsb * max_multiplier;
275 f_table[1].index = (max_multiplier << 8) | max_voltage;
276 f_table[2].frequency = CPUFREQ_TABLE_END;
277 } else {
278 k = 0;
279 step = ((max_voltage - min_voltage) * 256)
280 / (max_multiplier - min_multiplier);
281 for (i = min_multiplier; i <= max_multiplier; i++) {
282 voltage = (k * step) / 256 + min_voltage;
283 f_table[k].frequency = fsb * i;
284 f_table[k].index = (i << 8) | voltage;
285 k++;
286 }
287 f_table[k].frequency = CPUFREQ_TABLE_END;
288 }
289
290 policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
291 policy->cur = fsb * current_multiplier;
292
293 ret = cpufreq_frequency_table_cpuinfo(policy, ¢aur->freq_table[0]);
294 if (ret) {
295 kfree(centaur);
296 return ret;
297 }
298
299 cpufreq_frequency_table_get_attr(¢aur->freq_table[0], policy->cpu);
300 return 0;
301}
302
303static int eps_cpu_exit(struct cpufreq_policy *policy)
304{
305 unsigned int cpu = policy->cpu;
306 struct eps_cpu_data *centaur;
307 u32 lo, hi;
308
309 if (eps_cpu[cpu] == NULL)
310 return -ENODEV;
311 centaur = eps_cpu[cpu];
312
313 /* Get max frequency */
314 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
315 /* Set max frequency */
316 eps_set_state(centaur, cpu, hi & 0xffff);
317 /* Bye */
318 cpufreq_frequency_table_put_attr(policy->cpu);
319 kfree(eps_cpu[cpu]);
320 eps_cpu[cpu] = NULL;
321 return 0;
322}
323
324static struct freq_attr *eps_attr[] = {
325 &cpufreq_freq_attr_scaling_available_freqs,
326 NULL,
327};
328
329static struct cpufreq_driver eps_driver = {
330 .verify = eps_verify,
331 .target = eps_target,
332 .init = eps_cpu_init,
333 .exit = eps_cpu_exit,
334 .get = eps_get,
335 .name = "e_powersaver",
336 .owner = THIS_MODULE,
337 .attr = eps_attr,
338};
339
340static int __init eps_init(void)
341{
342 struct cpuinfo_x86 *c = &cpu_data(0);
343
344 /* This driver will work only on Centaur C7 processors with
345 * Enhanced SpeedStep/PowerSaver registers */
346 if (c->x86_vendor != X86_VENDOR_CENTAUR
347 || c->x86 != 6 || c->x86_model < 10)
348 return -ENODEV;
349 if (!cpu_has(c, X86_FEATURE_EST))
350 return -ENODEV;
351
352 if (cpufreq_register_driver(&eps_driver))
353 return -EINVAL;
354 return 0;
355}
356
357static void __exit eps_exit(void)
358{
359 cpufreq_unregister_driver(&eps_driver);
360}
361
362MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
363MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
364MODULE_LICENSE("GPL");
365
366module_init(eps_init);
367module_exit(eps_exit);
1/*
2 * Based on documentation provided by Dave Jones. Thanks!
3 *
4 * Licensed under the terms of the GNU GPL License version 2.
5 *
6 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/cpufreq.h>
13#include <linux/ioport.h>
14#include <linux/slab.h>
15#include <linux/timex.h>
16#include <linux/io.h>
17#include <linux/delay.h>
18
19#include <asm/cpu_device_id.h>
20#include <asm/msr.h>
21#include <asm/tsc.h>
22
23#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
24#include <linux/acpi.h>
25#include <acpi/processor.h>
26#endif
27
28#define EPS_BRAND_C7M 0
29#define EPS_BRAND_C7 1
30#define EPS_BRAND_EDEN 2
31#define EPS_BRAND_C3 3
32#define EPS_BRAND_C7D 4
33
34struct eps_cpu_data {
35 u32 fsb;
36#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
37 u32 bios_limit;
38#endif
39 struct cpufreq_frequency_table freq_table[];
40};
41
42static struct eps_cpu_data *eps_cpu[NR_CPUS];
43
44/* Module parameters */
45static int freq_failsafe_off;
46static int voltage_failsafe_off;
47static int set_max_voltage;
48
49#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
50static int ignore_acpi_limit;
51
52static struct acpi_processor_performance *eps_acpi_cpu_perf;
53
54/* Minimum necessary to get acpi_processor_get_bios_limit() working */
55static int eps_acpi_init(void)
56{
57 eps_acpi_cpu_perf = kzalloc(sizeof(*eps_acpi_cpu_perf),
58 GFP_KERNEL);
59 if (!eps_acpi_cpu_perf)
60 return -ENOMEM;
61
62 if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
63 GFP_KERNEL)) {
64 kfree(eps_acpi_cpu_perf);
65 eps_acpi_cpu_perf = NULL;
66 return -ENOMEM;
67 }
68
69 if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
70 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
71 kfree(eps_acpi_cpu_perf);
72 eps_acpi_cpu_perf = NULL;
73 return -EIO;
74 }
75 return 0;
76}
77
78static int eps_acpi_exit(struct cpufreq_policy *policy)
79{
80 if (eps_acpi_cpu_perf) {
81 acpi_processor_unregister_performance(0);
82 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
83 kfree(eps_acpi_cpu_perf);
84 eps_acpi_cpu_perf = NULL;
85 }
86 return 0;
87}
88#endif
89
90static unsigned int eps_get(unsigned int cpu)
91{
92 struct eps_cpu_data *centaur;
93 u32 lo, hi;
94
95 if (cpu)
96 return 0;
97 centaur = eps_cpu[cpu];
98 if (centaur == NULL)
99 return 0;
100
101 /* Return current frequency */
102 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
103 return centaur->fsb * ((lo >> 8) & 0xff);
104}
105
106static int eps_set_state(struct eps_cpu_data *centaur,
107 struct cpufreq_policy *policy,
108 u32 dest_state)
109{
110 u32 lo, hi;
111 int i;
112
113 /* Wait while CPU is busy */
114 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
115 i = 0;
116 while (lo & ((1 << 16) | (1 << 17))) {
117 udelay(16);
118 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
119 i++;
120 if (unlikely(i > 64)) {
121 return -ENODEV;
122 }
123 }
124 /* Set new multiplier and voltage */
125 wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
126 /* Wait until transition end */
127 i = 0;
128 do {
129 udelay(16);
130 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
131 i++;
132 if (unlikely(i > 64)) {
133 return -ENODEV;
134 }
135 } while (lo & ((1 << 16) | (1 << 17)));
136
137#ifdef DEBUG
138 {
139 u8 current_multiplier, current_voltage;
140
141 /* Print voltage and multiplier */
142 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
143 current_voltage = lo & 0xff;
144 printk(KERN_INFO "eps: Current voltage = %dmV\n",
145 current_voltage * 16 + 700);
146 current_multiplier = (lo >> 8) & 0xff;
147 printk(KERN_INFO "eps: Current multiplier = %d\n",
148 current_multiplier);
149 }
150#endif
151 return 0;
152}
153
154static int eps_target(struct cpufreq_policy *policy, unsigned int index)
155{
156 struct eps_cpu_data *centaur;
157 unsigned int cpu = policy->cpu;
158 unsigned int dest_state;
159 int ret;
160
161 if (unlikely(eps_cpu[cpu] == NULL))
162 return -ENODEV;
163 centaur = eps_cpu[cpu];
164
165 /* Make frequency transition */
166 dest_state = centaur->freq_table[index].driver_data & 0xffff;
167 ret = eps_set_state(centaur, policy, dest_state);
168 if (ret)
169 printk(KERN_ERR "eps: Timeout!\n");
170 return ret;
171}
172
173static int eps_cpu_init(struct cpufreq_policy *policy)
174{
175 unsigned int i;
176 u32 lo, hi;
177 u64 val;
178 u8 current_multiplier, current_voltage;
179 u8 max_multiplier, max_voltage;
180 u8 min_multiplier, min_voltage;
181 u8 brand = 0;
182 u32 fsb;
183 struct eps_cpu_data *centaur;
184 struct cpuinfo_x86 *c = &cpu_data(0);
185 struct cpufreq_frequency_table *f_table;
186 int k, step, voltage;
187 int ret;
188 int states;
189#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
190 unsigned int limit;
191#endif
192
193 if (policy->cpu != 0)
194 return -ENODEV;
195
196 /* Check brand */
197 printk(KERN_INFO "eps: Detected VIA ");
198
199 switch (c->x86_model) {
200 case 10:
201 rdmsr(0x1153, lo, hi);
202 brand = (((lo >> 2) ^ lo) >> 18) & 3;
203 printk(KERN_CONT "Model A ");
204 break;
205 case 13:
206 rdmsr(0x1154, lo, hi);
207 brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
208 printk(KERN_CONT "Model D ");
209 break;
210 }
211
212 switch (brand) {
213 case EPS_BRAND_C7M:
214 printk(KERN_CONT "C7-M\n");
215 break;
216 case EPS_BRAND_C7:
217 printk(KERN_CONT "C7\n");
218 break;
219 case EPS_BRAND_EDEN:
220 printk(KERN_CONT "Eden\n");
221 break;
222 case EPS_BRAND_C7D:
223 printk(KERN_CONT "C7-D\n");
224 break;
225 case EPS_BRAND_C3:
226 printk(KERN_CONT "C3\n");
227 return -ENODEV;
228 break;
229 }
230 /* Enable Enhanced PowerSaver */
231 rdmsrl(MSR_IA32_MISC_ENABLE, val);
232 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
233 val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
234 wrmsrl(MSR_IA32_MISC_ENABLE, val);
235 /* Can be locked at 0 */
236 rdmsrl(MSR_IA32_MISC_ENABLE, val);
237 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
238 printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
239 return -ENODEV;
240 }
241 }
242
243 /* Print voltage and multiplier */
244 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
245 current_voltage = lo & 0xff;
246 printk(KERN_INFO "eps: Current voltage = %dmV\n",
247 current_voltage * 16 + 700);
248 current_multiplier = (lo >> 8) & 0xff;
249 printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
250
251 /* Print limits */
252 max_voltage = hi & 0xff;
253 printk(KERN_INFO "eps: Highest voltage = %dmV\n",
254 max_voltage * 16 + 700);
255 max_multiplier = (hi >> 8) & 0xff;
256 printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
257 min_voltage = (hi >> 16) & 0xff;
258 printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
259 min_voltage * 16 + 700);
260 min_multiplier = (hi >> 24) & 0xff;
261 printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
262
263 /* Sanity checks */
264 if (current_multiplier == 0 || max_multiplier == 0
265 || min_multiplier == 0)
266 return -EINVAL;
267 if (current_multiplier > max_multiplier
268 || max_multiplier <= min_multiplier)
269 return -EINVAL;
270 if (current_voltage > 0x1f || max_voltage > 0x1f)
271 return -EINVAL;
272 if (max_voltage < min_voltage
273 || current_voltage < min_voltage
274 || current_voltage > max_voltage)
275 return -EINVAL;
276
277 /* Check for systems using underclocked CPU */
278 if (!freq_failsafe_off && max_multiplier != current_multiplier) {
279 printk(KERN_INFO "eps: Your processor is running at different "
280 "frequency then its maximum. Aborting.\n");
281 printk(KERN_INFO "eps: You can use freq_failsafe_off option "
282 "to disable this check.\n");
283 return -EINVAL;
284 }
285 if (!voltage_failsafe_off && max_voltage != current_voltage) {
286 printk(KERN_INFO "eps: Your processor is running at different "
287 "voltage then its maximum. Aborting.\n");
288 printk(KERN_INFO "eps: You can use voltage_failsafe_off "
289 "option to disable this check.\n");
290 return -EINVAL;
291 }
292
293 /* Calc FSB speed */
294 fsb = cpu_khz / current_multiplier;
295
296#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
297 /* Check for ACPI processor speed limit */
298 if (!ignore_acpi_limit && !eps_acpi_init()) {
299 if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
300 printk(KERN_INFO "eps: ACPI limit %u.%uGHz\n",
301 limit/1000000,
302 (limit%1000000)/10000);
303 eps_acpi_exit(policy);
304 /* Check if max_multiplier is in BIOS limits */
305 if (limit && max_multiplier * fsb > limit) {
306 printk(KERN_INFO "eps: Aborting.\n");
307 return -EINVAL;
308 }
309 }
310 }
311#endif
312
313 /* Allow user to set lower maximum voltage then that reported
314 * by processor */
315 if (brand == EPS_BRAND_C7M && set_max_voltage) {
316 u32 v;
317
318 /* Change mV to something hardware can use */
319 v = (set_max_voltage - 700) / 16;
320 /* Check if voltage is within limits */
321 if (v >= min_voltage && v <= max_voltage) {
322 printk(KERN_INFO "eps: Setting %dmV as maximum.\n",
323 v * 16 + 700);
324 max_voltage = v;
325 }
326 }
327
328 /* Calc number of p-states supported */
329 if (brand == EPS_BRAND_C7M)
330 states = max_multiplier - min_multiplier + 1;
331 else
332 states = 2;
333
334 /* Allocate private data and frequency table for current cpu */
335 centaur = kzalloc(sizeof(*centaur)
336 + (states + 1) * sizeof(struct cpufreq_frequency_table),
337 GFP_KERNEL);
338 if (!centaur)
339 return -ENOMEM;
340 eps_cpu[0] = centaur;
341
342 /* Copy basic values */
343 centaur->fsb = fsb;
344#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
345 centaur->bios_limit = limit;
346#endif
347
348 /* Fill frequency and MSR value table */
349 f_table = ¢aur->freq_table[0];
350 if (brand != EPS_BRAND_C7M) {
351 f_table[0].frequency = fsb * min_multiplier;
352 f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
353 f_table[1].frequency = fsb * max_multiplier;
354 f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
355 f_table[2].frequency = CPUFREQ_TABLE_END;
356 } else {
357 k = 0;
358 step = ((max_voltage - min_voltage) * 256)
359 / (max_multiplier - min_multiplier);
360 for (i = min_multiplier; i <= max_multiplier; i++) {
361 voltage = (k * step) / 256 + min_voltage;
362 f_table[k].frequency = fsb * i;
363 f_table[k].driver_data = (i << 8) | voltage;
364 k++;
365 }
366 f_table[k].frequency = CPUFREQ_TABLE_END;
367 }
368
369 policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
370
371 ret = cpufreq_table_validate_and_show(policy, ¢aur->freq_table[0]);
372 if (ret) {
373 kfree(centaur);
374 return ret;
375 }
376
377 return 0;
378}
379
380static int eps_cpu_exit(struct cpufreq_policy *policy)
381{
382 unsigned int cpu = policy->cpu;
383
384 /* Bye */
385 kfree(eps_cpu[cpu]);
386 eps_cpu[cpu] = NULL;
387 return 0;
388}
389
390static struct cpufreq_driver eps_driver = {
391 .verify = cpufreq_generic_frequency_table_verify,
392 .target_index = eps_target,
393 .init = eps_cpu_init,
394 .exit = eps_cpu_exit,
395 .get = eps_get,
396 .name = "e_powersaver",
397 .attr = cpufreq_generic_attr,
398};
399
400
401/* This driver will work only on Centaur C7 processors with
402 * Enhanced SpeedStep/PowerSaver registers */
403static const struct x86_cpu_id eps_cpu_id[] = {
404 { X86_VENDOR_CENTAUR, 6, X86_MODEL_ANY, X86_FEATURE_EST },
405 {}
406};
407MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);
408
409static int __init eps_init(void)
410{
411 if (!x86_match_cpu(eps_cpu_id) || boot_cpu_data.x86_model < 10)
412 return -ENODEV;
413 if (cpufreq_register_driver(&eps_driver))
414 return -EINVAL;
415 return 0;
416}
417
418static void __exit eps_exit(void)
419{
420 cpufreq_unregister_driver(&eps_driver);
421}
422
423/* Allow user to overclock his machine or to change frequency to higher after
424 * unloading module */
425module_param(freq_failsafe_off, int, 0644);
426MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
427module_param(voltage_failsafe_off, int, 0644);
428MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
429#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
430module_param(ignore_acpi_limit, int, 0644);
431MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
432#endif
433module_param(set_max_voltage, int, 0644);
434MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
435
436MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
437MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
438MODULE_LICENSE("GPL");
439
440module_init(eps_init);
441module_exit(eps_exit);