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1/*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
37#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
38#include <linux/fs.h>
39#include <linux/bio.h>
40#include <linux/kernel.h>
41#include <linux/mm.h>
42#include <linux/mman.h>
43#include <linux/gfp.h>
44#include <linux/ioctl.h>
45#include <linux/module.h>
46#include <linux/init.h>
47#include <linux/interrupt.h>
48#include <linux/timer.h>
49#include <linux/pci.h>
50#include <linux/dma-mapping.h>
51
52#include <linux/fcntl.h> /* O_ACCMODE */
53#include <linux/hdreg.h> /* HDIO_GETGEO */
54
55#include "umem.h"
56
57#include <asm/uaccess.h>
58#include <asm/io.h>
59
60#define MM_MAXCARDS 4
61#define MM_RAHEAD 2 /* two sectors */
62#define MM_BLKSIZE 1024 /* 1k blocks */
63#define MM_HARDSECT 512 /* 512-byte hardware sectors */
64#define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66/*
67 * Version Information
68 */
69
70#define DRIVER_NAME "umem"
71#define DRIVER_VERSION "v2.3"
72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
74
75static int debug;
76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77#define HW_TRACE(x)
78
79#define DEBUG_LED_ON_TRANSFER 0x01
80#define DEBUG_BATTERY_POLLING 0x02
81
82module_param(debug, int, 0644);
83MODULE_PARM_DESC(debug, "Debug bitmask");
84
85static int pci_read_cmd = 0x0C; /* Read Multiple */
86module_param(pci_read_cmd, int, 0);
87MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
88
89static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90module_param(pci_write_cmd, int, 0);
91MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
92
93static int pci_cmds;
94
95static int major_nr;
96
97#include <linux/blkdev.h>
98#include <linux/blkpg.h>
99
100struct cardinfo {
101 struct pci_dev *dev;
102
103 unsigned char __iomem *csr_remap;
104 unsigned int mm_size; /* size in kbytes */
105
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
109 */
110 struct bio *bio, *currentbio, **biotail;
111 int current_idx;
112 sector_t current_sector;
113
114 struct request_queue *queue;
115
116 struct mm_page {
117 dma_addr_t page_dma;
118 struct mm_dma_desc *desc;
119 int cnt, headcnt;
120 struct bio *bio, **biotail;
121 int idx;
122 } mm_pages[2];
123#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
124
125 int Active, Ready;
126
127 struct tasklet_struct tasklet;
128 unsigned int dma_status;
129
130 struct {
131 int good;
132 int warned;
133 unsigned long last_change;
134 } battery[2];
135
136 spinlock_t lock;
137 int check_batteries;
138
139 int flags;
140};
141
142static struct cardinfo cards[MM_MAXCARDS];
143static struct timer_list battery_timer;
144
145static int num_cards;
146
147static struct gendisk *mm_gendisk[MM_MAXCARDS];
148
149static void check_batteries(struct cardinfo *card);
150
151static int get_userbit(struct cardinfo *card, int bit)
152{
153 unsigned char led;
154
155 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
156 return led & bit;
157}
158
159static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
160{
161 unsigned char led;
162
163 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
164 if (state)
165 led |= bit;
166 else
167 led &= ~bit;
168 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
169
170 return 0;
171}
172
173/*
174 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
175 */
176static void set_led(struct cardinfo *card, int shift, unsigned char state)
177{
178 unsigned char led;
179
180 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
181 if (state == LED_FLIP)
182 led ^= (1<<shift);
183 else {
184 led &= ~(0x03 << shift);
185 led |= (state << shift);
186 }
187 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
188
189}
190
191#ifdef MM_DIAG
192static void dump_regs(struct cardinfo *card)
193{
194 unsigned char *p;
195 int i, i1;
196
197 p = card->csr_remap;
198 for (i = 0; i < 8; i++) {
199 printk(KERN_DEBUG "%p ", p);
200
201 for (i1 = 0; i1 < 16; i1++)
202 printk("%02x ", *p++);
203
204 printk("\n");
205 }
206}
207#endif
208
209static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
210{
211 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
212 if (dmastat & DMASCR_ANY_ERR)
213 printk(KERN_CONT "ANY_ERR ");
214 if (dmastat & DMASCR_MBE_ERR)
215 printk(KERN_CONT "MBE_ERR ");
216 if (dmastat & DMASCR_PARITY_ERR_REP)
217 printk(KERN_CONT "PARITY_ERR_REP ");
218 if (dmastat & DMASCR_PARITY_ERR_DET)
219 printk(KERN_CONT "PARITY_ERR_DET ");
220 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
221 printk(KERN_CONT "SYSTEM_ERR_SIG ");
222 if (dmastat & DMASCR_TARGET_ABT)
223 printk(KERN_CONT "TARGET_ABT ");
224 if (dmastat & DMASCR_MASTER_ABT)
225 printk(KERN_CONT "MASTER_ABT ");
226 if (dmastat & DMASCR_CHAIN_COMPLETE)
227 printk(KERN_CONT "CHAIN_COMPLETE ");
228 if (dmastat & DMASCR_DMA_COMPLETE)
229 printk(KERN_CONT "DMA_COMPLETE ");
230 printk("\n");
231}
232
233/*
234 * Theory of request handling
235 *
236 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
237 * We have two pages of mm_dma_desc, holding about 64 descriptors
238 * each. These are allocated at init time.
239 * One page is "Ready" and is either full, or can have request added.
240 * The other page might be "Active", which DMA is happening on it.
241 *
242 * Whenever IO on the active page completes, the Ready page is activated
243 * and the ex-Active page is clean out and made Ready.
244 * Otherwise the Ready page is only activated when it becomes full.
245 *
246 * If a request arrives while both pages a full, it is queued, and b_rdev is
247 * overloaded to record whether it was a read or a write.
248 *
249 * The interrupt handler only polls the device to clear the interrupt.
250 * The processing of the result is done in a tasklet.
251 */
252
253static void mm_start_io(struct cardinfo *card)
254{
255 /* we have the lock, we know there is
256 * no IO active, and we know that card->Active
257 * is set
258 */
259 struct mm_dma_desc *desc;
260 struct mm_page *page;
261 int offset;
262
263 /* make the last descriptor end the chain */
264 page = &card->mm_pages[card->Active];
265 pr_debug("start_io: %d %d->%d\n",
266 card->Active, page->headcnt, page->cnt - 1);
267 desc = &page->desc[page->cnt-1];
268
269 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
270 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
271 desc->sem_control_bits = desc->control_bits;
272
273
274 if (debug & DEBUG_LED_ON_TRANSFER)
275 set_led(card, LED_REMOVE, LED_ON);
276
277 desc = &page->desc[page->headcnt];
278 writel(0, card->csr_remap + DMA_PCI_ADDR);
279 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
280
281 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
282 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
283
284 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
285 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
286
287 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
288 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
289
290 offset = ((char *)desc) - ((char *)page->desc);
291 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
292 card->csr_remap + DMA_DESCRIPTOR_ADDR);
293 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
294 * and on some ports will do nothing ! */
295 writel(cpu_to_le32(((u64)page->page_dma)>>32),
296 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
297
298 /* Go, go, go */
299 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
300 card->csr_remap + DMA_STATUS_CTRL);
301}
302
303static int add_bio(struct cardinfo *card);
304
305static void activate(struct cardinfo *card)
306{
307 /* if No page is Active, and Ready is
308 * not empty, then switch Ready page
309 * to active and start IO.
310 * Then add any bh's that are available to Ready
311 */
312
313 do {
314 while (add_bio(card))
315 ;
316
317 if (card->Active == -1 &&
318 card->mm_pages[card->Ready].cnt > 0) {
319 card->Active = card->Ready;
320 card->Ready = 1-card->Ready;
321 mm_start_io(card);
322 }
323
324 } while (card->Active == -1 && add_bio(card));
325}
326
327static inline void reset_page(struct mm_page *page)
328{
329 page->cnt = 0;
330 page->headcnt = 0;
331 page->bio = NULL;
332 page->biotail = &page->bio;
333}
334
335/*
336 * If there is room on Ready page, take
337 * one bh off list and add it.
338 * return 1 if there was room, else 0.
339 */
340static int add_bio(struct cardinfo *card)
341{
342 struct mm_page *p;
343 struct mm_dma_desc *desc;
344 dma_addr_t dma_handle;
345 int offset;
346 struct bio *bio;
347 struct bio_vec *vec;
348 int idx;
349 int rw;
350 int len;
351
352 bio = card->currentbio;
353 if (!bio && card->bio) {
354 card->currentbio = card->bio;
355 card->current_idx = card->bio->bi_idx;
356 card->current_sector = card->bio->bi_sector;
357 card->bio = card->bio->bi_next;
358 if (card->bio == NULL)
359 card->biotail = &card->bio;
360 card->currentbio->bi_next = NULL;
361 return 1;
362 }
363 if (!bio)
364 return 0;
365 idx = card->current_idx;
366
367 rw = bio_rw(bio);
368 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
369 return 0;
370
371 vec = bio_iovec_idx(bio, idx);
372 len = vec->bv_len;
373 dma_handle = pci_map_page(card->dev,
374 vec->bv_page,
375 vec->bv_offset,
376 len,
377 (rw == READ) ?
378 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
379
380 p = &card->mm_pages[card->Ready];
381 desc = &p->desc[p->cnt];
382 p->cnt++;
383 if (p->bio == NULL)
384 p->idx = idx;
385 if ((p->biotail) != &bio->bi_next) {
386 *(p->biotail) = bio;
387 p->biotail = &(bio->bi_next);
388 bio->bi_next = NULL;
389 }
390
391 desc->data_dma_handle = dma_handle;
392
393 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
394 desc->local_addr = cpu_to_le64(card->current_sector << 9);
395 desc->transfer_size = cpu_to_le32(len);
396 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
397 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
398 desc->zero1 = desc->zero2 = 0;
399 offset = (((char *)(desc+1)) - ((char *)p->desc));
400 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
401 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
402 DMASCR_PARITY_INT_EN|
403 DMASCR_CHAIN_EN |
404 DMASCR_SEM_EN |
405 pci_cmds);
406 if (rw == WRITE)
407 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
408 desc->sem_control_bits = desc->control_bits;
409
410 card->current_sector += (len >> 9);
411 idx++;
412 card->current_idx = idx;
413 if (idx >= bio->bi_vcnt)
414 card->currentbio = NULL;
415
416 return 1;
417}
418
419static void process_page(unsigned long data)
420{
421 /* check if any of the requests in the page are DMA_COMPLETE,
422 * and deal with them appropriately.
423 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
424 * dma must have hit an error on that descriptor, so use dma_status
425 * instead and assume that all following descriptors must be re-tried.
426 */
427 struct mm_page *page;
428 struct bio *return_bio = NULL;
429 struct cardinfo *card = (struct cardinfo *)data;
430 unsigned int dma_status = card->dma_status;
431
432 spin_lock_bh(&card->lock);
433 if (card->Active < 0)
434 goto out_unlock;
435 page = &card->mm_pages[card->Active];
436
437 while (page->headcnt < page->cnt) {
438 struct bio *bio = page->bio;
439 struct mm_dma_desc *desc = &page->desc[page->headcnt];
440 int control = le32_to_cpu(desc->sem_control_bits);
441 int last = 0;
442 int idx;
443
444 if (!(control & DMASCR_DMA_COMPLETE)) {
445 control = dma_status;
446 last = 1;
447 }
448 page->headcnt++;
449 idx = page->idx;
450 page->idx++;
451 if (page->idx >= bio->bi_vcnt) {
452 page->bio = bio->bi_next;
453 if (page->bio)
454 page->idx = page->bio->bi_idx;
455 }
456
457 pci_unmap_page(card->dev, desc->data_dma_handle,
458 bio_iovec_idx(bio, idx)->bv_len,
459 (control & DMASCR_TRANSFER_READ) ?
460 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
461 if (control & DMASCR_HARD_ERROR) {
462 /* error */
463 clear_bit(BIO_UPTODATE, &bio->bi_flags);
464 dev_printk(KERN_WARNING, &card->dev->dev,
465 "I/O error on sector %d/%d\n",
466 le32_to_cpu(desc->local_addr)>>9,
467 le32_to_cpu(desc->transfer_size));
468 dump_dmastat(card, control);
469 } else if ((bio->bi_rw & REQ_WRITE) &&
470 le32_to_cpu(desc->local_addr) >> 9 ==
471 card->init_size) {
472 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
473 if (card->init_size >> 1 >= card->mm_size) {
474 dev_printk(KERN_INFO, &card->dev->dev,
475 "memory now initialised\n");
476 set_userbit(card, MEMORY_INITIALIZED, 1);
477 }
478 }
479 if (bio != page->bio) {
480 bio->bi_next = return_bio;
481 return_bio = bio;
482 }
483
484 if (last)
485 break;
486 }
487
488 if (debug & DEBUG_LED_ON_TRANSFER)
489 set_led(card, LED_REMOVE, LED_OFF);
490
491 if (card->check_batteries) {
492 card->check_batteries = 0;
493 check_batteries(card);
494 }
495 if (page->headcnt >= page->cnt) {
496 reset_page(page);
497 card->Active = -1;
498 activate(card);
499 } else {
500 /* haven't finished with this one yet */
501 pr_debug("do some more\n");
502 mm_start_io(card);
503 }
504 out_unlock:
505 spin_unlock_bh(&card->lock);
506
507 while (return_bio) {
508 struct bio *bio = return_bio;
509
510 return_bio = bio->bi_next;
511 bio->bi_next = NULL;
512 bio_endio(bio, 0);
513 }
514}
515
516static int mm_make_request(struct request_queue *q, struct bio *bio)
517{
518 struct cardinfo *card = q->queuedata;
519 pr_debug("mm_make_request %llu %u\n",
520 (unsigned long long)bio->bi_sector, bio->bi_size);
521
522 spin_lock_irq(&card->lock);
523 *card->biotail = bio;
524 bio->bi_next = NULL;
525 card->biotail = &bio->bi_next;
526 spin_unlock_irq(&card->lock);
527
528 return 0;
529}
530
531static irqreturn_t mm_interrupt(int irq, void *__card)
532{
533 struct cardinfo *card = (struct cardinfo *) __card;
534 unsigned int dma_status;
535 unsigned short cfg_status;
536
537HW_TRACE(0x30);
538
539 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
540
541 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
542 /* interrupt wasn't for me ... */
543 return IRQ_NONE;
544 }
545
546 /* clear COMPLETION interrupts */
547 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
548 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
549 card->csr_remap + DMA_STATUS_CTRL);
550 else
551 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
552 card->csr_remap + DMA_STATUS_CTRL + 2);
553
554 /* log errors and clear interrupt status */
555 if (dma_status & DMASCR_ANY_ERR) {
556 unsigned int data_log1, data_log2;
557 unsigned int addr_log1, addr_log2;
558 unsigned char stat, count, syndrome, check;
559
560 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
561
562 data_log1 = le32_to_cpu(readl(card->csr_remap +
563 ERROR_DATA_LOG));
564 data_log2 = le32_to_cpu(readl(card->csr_remap +
565 ERROR_DATA_LOG + 4));
566 addr_log1 = le32_to_cpu(readl(card->csr_remap +
567 ERROR_ADDR_LOG));
568 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
569
570 count = readb(card->csr_remap + ERROR_COUNT);
571 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
572 check = readb(card->csr_remap + ERROR_CHECK);
573
574 dump_dmastat(card, dma_status);
575
576 if (stat & 0x01)
577 dev_printk(KERN_ERR, &card->dev->dev,
578 "Memory access error detected (err count %d)\n",
579 count);
580 if (stat & 0x02)
581 dev_printk(KERN_ERR, &card->dev->dev,
582 "Multi-bit EDC error\n");
583
584 dev_printk(KERN_ERR, &card->dev->dev,
585 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
586 addr_log2, addr_log1, data_log2, data_log1);
587 dev_printk(KERN_ERR, &card->dev->dev,
588 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
589 check, syndrome);
590
591 writeb(0, card->csr_remap + ERROR_COUNT);
592 }
593
594 if (dma_status & DMASCR_PARITY_ERR_REP) {
595 dev_printk(KERN_ERR, &card->dev->dev,
596 "PARITY ERROR REPORTED\n");
597 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
598 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
599 }
600
601 if (dma_status & DMASCR_PARITY_ERR_DET) {
602 dev_printk(KERN_ERR, &card->dev->dev,
603 "PARITY ERROR DETECTED\n");
604 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
605 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
606 }
607
608 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
609 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
610 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
611 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
612 }
613
614 if (dma_status & DMASCR_TARGET_ABT) {
615 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
616 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
617 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
618 }
619
620 if (dma_status & DMASCR_MASTER_ABT) {
621 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
622 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
623 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
624 }
625
626 /* and process the DMA descriptors */
627 card->dma_status = dma_status;
628 tasklet_schedule(&card->tasklet);
629
630HW_TRACE(0x36);
631
632 return IRQ_HANDLED;
633}
634
635/*
636 * If both batteries are good, no LED
637 * If either battery has been warned, solid LED
638 * If both batteries are bad, flash the LED quickly
639 * If either battery is bad, flash the LED semi quickly
640 */
641static void set_fault_to_battery_status(struct cardinfo *card)
642{
643 if (card->battery[0].good && card->battery[1].good)
644 set_led(card, LED_FAULT, LED_OFF);
645 else if (card->battery[0].warned || card->battery[1].warned)
646 set_led(card, LED_FAULT, LED_ON);
647 else if (!card->battery[0].good && !card->battery[1].good)
648 set_led(card, LED_FAULT, LED_FLASH_7_0);
649 else
650 set_led(card, LED_FAULT, LED_FLASH_3_5);
651}
652
653static void init_battery_timer(void);
654
655static int check_battery(struct cardinfo *card, int battery, int status)
656{
657 if (status != card->battery[battery].good) {
658 card->battery[battery].good = !card->battery[battery].good;
659 card->battery[battery].last_change = jiffies;
660
661 if (card->battery[battery].good) {
662 dev_printk(KERN_ERR, &card->dev->dev,
663 "Battery %d now good\n", battery + 1);
664 card->battery[battery].warned = 0;
665 } else
666 dev_printk(KERN_ERR, &card->dev->dev,
667 "Battery %d now FAILED\n", battery + 1);
668
669 return 1;
670 } else if (!card->battery[battery].good &&
671 !card->battery[battery].warned &&
672 time_after_eq(jiffies, card->battery[battery].last_change +
673 (HZ * 60 * 60 * 5))) {
674 dev_printk(KERN_ERR, &card->dev->dev,
675 "Battery %d still FAILED after 5 hours\n", battery + 1);
676 card->battery[battery].warned = 1;
677
678 return 1;
679 }
680
681 return 0;
682}
683
684static void check_batteries(struct cardinfo *card)
685{
686 /* NOTE: this must *never* be called while the card
687 * is doing (bus-to-card) DMA, or you will need the
688 * reset switch
689 */
690 unsigned char status;
691 int ret1, ret2;
692
693 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
694 if (debug & DEBUG_BATTERY_POLLING)
695 dev_printk(KERN_DEBUG, &card->dev->dev,
696 "checking battery status, 1 = %s, 2 = %s\n",
697 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
698 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
699
700 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
701 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
702
703 if (ret1 || ret2)
704 set_fault_to_battery_status(card);
705}
706
707static void check_all_batteries(unsigned long ptr)
708{
709 int i;
710
711 for (i = 0; i < num_cards; i++)
712 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
713 struct cardinfo *card = &cards[i];
714 spin_lock_bh(&card->lock);
715 if (card->Active >= 0)
716 card->check_batteries = 1;
717 else
718 check_batteries(card);
719 spin_unlock_bh(&card->lock);
720 }
721
722 init_battery_timer();
723}
724
725static void init_battery_timer(void)
726{
727 init_timer(&battery_timer);
728 battery_timer.function = check_all_batteries;
729 battery_timer.expires = jiffies + (HZ * 60);
730 add_timer(&battery_timer);
731}
732
733static void del_battery_timer(void)
734{
735 del_timer(&battery_timer);
736}
737
738/*
739 * Note no locks taken out here. In a worst case scenario, we could drop
740 * a chunk of system memory. But that should never happen, since validation
741 * happens at open or mount time, when locks are held.
742 *
743 * That's crap, since doing that while some partitions are opened
744 * or mounted will give you really nasty results.
745 */
746static int mm_revalidate(struct gendisk *disk)
747{
748 struct cardinfo *card = disk->private_data;
749 set_capacity(disk, card->mm_size << 1);
750 return 0;
751}
752
753static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
754{
755 struct cardinfo *card = bdev->bd_disk->private_data;
756 int size = card->mm_size * (1024 / MM_HARDSECT);
757
758 /*
759 * get geometry: we have to fake one... trim the size to a
760 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
761 * whatever cylinders.
762 */
763 geo->heads = 64;
764 geo->sectors = 32;
765 geo->cylinders = size / (geo->heads * geo->sectors);
766 return 0;
767}
768
769static const struct block_device_operations mm_fops = {
770 .owner = THIS_MODULE,
771 .getgeo = mm_getgeo,
772 .revalidate_disk = mm_revalidate,
773};
774
775static int __devinit mm_pci_probe(struct pci_dev *dev,
776 const struct pci_device_id *id)
777{
778 int ret = -ENODEV;
779 struct cardinfo *card = &cards[num_cards];
780 unsigned char mem_present;
781 unsigned char batt_status;
782 unsigned int saved_bar, data;
783 unsigned long csr_base;
784 unsigned long csr_len;
785 int magic_number;
786 static int printed_version;
787
788 if (!printed_version++)
789 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
790
791 ret = pci_enable_device(dev);
792 if (ret)
793 return ret;
794
795 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
796 pci_set_master(dev);
797
798 card->dev = dev;
799
800 csr_base = pci_resource_start(dev, 0);
801 csr_len = pci_resource_len(dev, 0);
802 if (!csr_base || !csr_len)
803 return -ENODEV;
804
805 dev_printk(KERN_INFO, &dev->dev,
806 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
807
808 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
809 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
810 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
811 return -ENOMEM;
812 }
813
814 ret = pci_request_regions(dev, DRIVER_NAME);
815 if (ret) {
816 dev_printk(KERN_ERR, &card->dev->dev,
817 "Unable to request memory region\n");
818 goto failed_req_csr;
819 }
820
821 card->csr_remap = ioremap_nocache(csr_base, csr_len);
822 if (!card->csr_remap) {
823 dev_printk(KERN_ERR, &card->dev->dev,
824 "Unable to remap memory region\n");
825 ret = -ENOMEM;
826
827 goto failed_remap_csr;
828 }
829
830 dev_printk(KERN_INFO, &card->dev->dev,
831 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
832 csr_base, card->csr_remap, csr_len);
833
834 switch (card->dev->device) {
835 case 0x5415:
836 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
837 magic_number = 0x59;
838 break;
839
840 case 0x5425:
841 card->flags |= UM_FLAG_NO_BYTE_STATUS;
842 magic_number = 0x5C;
843 break;
844
845 case 0x6155:
846 card->flags |= UM_FLAG_NO_BYTE_STATUS |
847 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
848 magic_number = 0x99;
849 break;
850
851 default:
852 magic_number = 0x100;
853 break;
854 }
855
856 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
857 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
858 ret = -ENOMEM;
859 goto failed_magic;
860 }
861
862 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
863 PAGE_SIZE * 2,
864 &card->mm_pages[0].page_dma);
865 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
866 PAGE_SIZE * 2,
867 &card->mm_pages[1].page_dma);
868 if (card->mm_pages[0].desc == NULL ||
869 card->mm_pages[1].desc == NULL) {
870 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
871 goto failed_alloc;
872 }
873 reset_page(&card->mm_pages[0]);
874 reset_page(&card->mm_pages[1]);
875 card->Ready = 0; /* page 0 is ready */
876 card->Active = -1; /* no page is active */
877 card->bio = NULL;
878 card->biotail = &card->bio;
879
880 card->queue = blk_alloc_queue(GFP_KERNEL);
881 if (!card->queue)
882 goto failed_alloc;
883
884 blk_queue_make_request(card->queue, mm_make_request);
885 card->queue->queue_lock = &card->lock;
886 card->queue->queuedata = card;
887
888 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
889
890 card->check_batteries = 0;
891
892 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
893 switch (mem_present) {
894 case MEM_128_MB:
895 card->mm_size = 1024 * 128;
896 break;
897 case MEM_256_MB:
898 card->mm_size = 1024 * 256;
899 break;
900 case MEM_512_MB:
901 card->mm_size = 1024 * 512;
902 break;
903 case MEM_1_GB:
904 card->mm_size = 1024 * 1024;
905 break;
906 case MEM_2_GB:
907 card->mm_size = 1024 * 2048;
908 break;
909 default:
910 card->mm_size = 0;
911 break;
912 }
913
914 /* Clear the LED's we control */
915 set_led(card, LED_REMOVE, LED_OFF);
916 set_led(card, LED_FAULT, LED_OFF);
917
918 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
919
920 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
921 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
922 card->battery[0].last_change = card->battery[1].last_change = jiffies;
923
924 if (card->flags & UM_FLAG_NO_BATT)
925 dev_printk(KERN_INFO, &card->dev->dev,
926 "Size %d KB\n", card->mm_size);
927 else {
928 dev_printk(KERN_INFO, &card->dev->dev,
929 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
930 card->mm_size,
931 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
932 card->battery[0].good ? "OK" : "FAILURE",
933 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
934 card->battery[1].good ? "OK" : "FAILURE");
935
936 set_fault_to_battery_status(card);
937 }
938
939 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
940 data = 0xffffffff;
941 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
942 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
943 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
944 data &= 0xfffffff0;
945 data = ~data;
946 data += 1;
947
948 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
949 card)) {
950 dev_printk(KERN_ERR, &card->dev->dev,
951 "Unable to allocate IRQ\n");
952 ret = -ENODEV;
953 goto failed_req_irq;
954 }
955
956 dev_printk(KERN_INFO, &card->dev->dev,
957 "Window size %d bytes, IRQ %d\n", data, dev->irq);
958
959 spin_lock_init(&card->lock);
960
961 pci_set_drvdata(dev, card);
962
963 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
964 pci_write_cmd = 0x07; /* then Memory Write command */
965
966 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
967 unsigned short cfg_command;
968 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
969 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
970 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
971 }
972 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
973
974 num_cards++;
975
976 if (!get_userbit(card, MEMORY_INITIALIZED)) {
977 dev_printk(KERN_INFO, &card->dev->dev,
978 "memory NOT initialized. Consider over-writing whole device.\n");
979 card->init_size = 0;
980 } else {
981 dev_printk(KERN_INFO, &card->dev->dev,
982 "memory already initialized\n");
983 card->init_size = card->mm_size;
984 }
985
986 /* Enable ECC */
987 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
988
989 return 0;
990
991 failed_req_irq:
992 failed_alloc:
993 if (card->mm_pages[0].desc)
994 pci_free_consistent(card->dev, PAGE_SIZE*2,
995 card->mm_pages[0].desc,
996 card->mm_pages[0].page_dma);
997 if (card->mm_pages[1].desc)
998 pci_free_consistent(card->dev, PAGE_SIZE*2,
999 card->mm_pages[1].desc,
1000 card->mm_pages[1].page_dma);
1001 failed_magic:
1002 iounmap(card->csr_remap);
1003 failed_remap_csr:
1004 pci_release_regions(dev);
1005 failed_req_csr:
1006
1007 return ret;
1008}
1009
1010static void mm_pci_remove(struct pci_dev *dev)
1011{
1012 struct cardinfo *card = pci_get_drvdata(dev);
1013
1014 tasklet_kill(&card->tasklet);
1015 free_irq(dev->irq, card);
1016 iounmap(card->csr_remap);
1017
1018 if (card->mm_pages[0].desc)
1019 pci_free_consistent(card->dev, PAGE_SIZE*2,
1020 card->mm_pages[0].desc,
1021 card->mm_pages[0].page_dma);
1022 if (card->mm_pages[1].desc)
1023 pci_free_consistent(card->dev, PAGE_SIZE*2,
1024 card->mm_pages[1].desc,
1025 card->mm_pages[1].page_dma);
1026 blk_cleanup_queue(card->queue);
1027
1028 pci_release_regions(dev);
1029 pci_disable_device(dev);
1030}
1031
1032static const struct pci_device_id mm_pci_ids[] = {
1033 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1034 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1035 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
1036 {
1037 .vendor = 0x8086,
1038 .device = 0xB555,
1039 .subvendor = 0x1332,
1040 .subdevice = 0x5460,
1041 .class = 0x050000,
1042 .class_mask = 0,
1043 }, { /* end: all zeroes */ }
1044};
1045
1046MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1047
1048static struct pci_driver mm_pci_driver = {
1049 .name = DRIVER_NAME,
1050 .id_table = mm_pci_ids,
1051 .probe = mm_pci_probe,
1052 .remove = mm_pci_remove,
1053};
1054
1055static int __init mm_init(void)
1056{
1057 int retval, i;
1058 int err;
1059
1060 retval = pci_register_driver(&mm_pci_driver);
1061 if (retval)
1062 return -ENOMEM;
1063
1064 err = major_nr = register_blkdev(0, DRIVER_NAME);
1065 if (err < 0) {
1066 pci_unregister_driver(&mm_pci_driver);
1067 return -EIO;
1068 }
1069
1070 for (i = 0; i < num_cards; i++) {
1071 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1072 if (!mm_gendisk[i])
1073 goto out;
1074 }
1075
1076 for (i = 0; i < num_cards; i++) {
1077 struct gendisk *disk = mm_gendisk[i];
1078 sprintf(disk->disk_name, "umem%c", 'a'+i);
1079 spin_lock_init(&cards[i].lock);
1080 disk->major = major_nr;
1081 disk->first_minor = i << MM_SHIFT;
1082 disk->fops = &mm_fops;
1083 disk->private_data = &cards[i];
1084 disk->queue = cards[i].queue;
1085 set_capacity(disk, cards[i].mm_size << 1);
1086 add_disk(disk);
1087 }
1088
1089 init_battery_timer();
1090 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1091/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1092 return 0;
1093
1094out:
1095 pci_unregister_driver(&mm_pci_driver);
1096 unregister_blkdev(major_nr, DRIVER_NAME);
1097 while (i--)
1098 put_disk(mm_gendisk[i]);
1099 return -ENOMEM;
1100}
1101
1102static void __exit mm_cleanup(void)
1103{
1104 int i;
1105
1106 del_battery_timer();
1107
1108 for (i = 0; i < num_cards ; i++) {
1109 del_gendisk(mm_gendisk[i]);
1110 put_disk(mm_gendisk[i]);
1111 }
1112
1113 pci_unregister_driver(&mm_pci_driver);
1114
1115 unregister_blkdev(major_nr, DRIVER_NAME);
1116}
1117
1118module_init(mm_init);
1119module_exit(mm_cleanup);
1120
1121MODULE_AUTHOR(DRIVER_AUTHOR);
1122MODULE_DESCRIPTION(DRIVER_DESC);
1123MODULE_LICENSE("GPL");
1/*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
37#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
38#include <linux/fs.h>
39#include <linux/bio.h>
40#include <linux/kernel.h>
41#include <linux/mm.h>
42#include <linux/mman.h>
43#include <linux/gfp.h>
44#include <linux/ioctl.h>
45#include <linux/module.h>
46#include <linux/init.h>
47#include <linux/interrupt.h>
48#include <linux/timer.h>
49#include <linux/pci.h>
50#include <linux/dma-mapping.h>
51
52#include <linux/fcntl.h> /* O_ACCMODE */
53#include <linux/hdreg.h> /* HDIO_GETGEO */
54
55#include "umem.h"
56
57#include <asm/uaccess.h>
58#include <asm/io.h>
59
60#define MM_MAXCARDS 4
61#define MM_RAHEAD 2 /* two sectors */
62#define MM_BLKSIZE 1024 /* 1k blocks */
63#define MM_HARDSECT 512 /* 512-byte hardware sectors */
64#define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66/*
67 * Version Information
68 */
69
70#define DRIVER_NAME "umem"
71#define DRIVER_VERSION "v2.3"
72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
74
75static int debug;
76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77#define HW_TRACE(x)
78
79#define DEBUG_LED_ON_TRANSFER 0x01
80#define DEBUG_BATTERY_POLLING 0x02
81
82module_param(debug, int, 0644);
83MODULE_PARM_DESC(debug, "Debug bitmask");
84
85static int pci_read_cmd = 0x0C; /* Read Multiple */
86module_param(pci_read_cmd, int, 0);
87MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
88
89static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90module_param(pci_write_cmd, int, 0);
91MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
92
93static int pci_cmds;
94
95static int major_nr;
96
97#include <linux/blkdev.h>
98#include <linux/blkpg.h>
99
100struct cardinfo {
101 struct pci_dev *dev;
102
103 unsigned char __iomem *csr_remap;
104 unsigned int mm_size; /* size in kbytes */
105
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
109 */
110 struct bio *bio, *currentbio, **biotail;
111 struct bvec_iter current_iter;
112
113 struct request_queue *queue;
114
115 struct mm_page {
116 dma_addr_t page_dma;
117 struct mm_dma_desc *desc;
118 int cnt, headcnt;
119 struct bio *bio, **biotail;
120 struct bvec_iter iter;
121 } mm_pages[2];
122#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
123
124 int Active, Ready;
125
126 struct tasklet_struct tasklet;
127 unsigned int dma_status;
128
129 struct {
130 int good;
131 int warned;
132 unsigned long last_change;
133 } battery[2];
134
135 spinlock_t lock;
136 int check_batteries;
137
138 int flags;
139};
140
141static struct cardinfo cards[MM_MAXCARDS];
142static struct timer_list battery_timer;
143
144static int num_cards;
145
146static struct gendisk *mm_gendisk[MM_MAXCARDS];
147
148static void check_batteries(struct cardinfo *card);
149
150static int get_userbit(struct cardinfo *card, int bit)
151{
152 unsigned char led;
153
154 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
155 return led & bit;
156}
157
158static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
159{
160 unsigned char led;
161
162 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
163 if (state)
164 led |= bit;
165 else
166 led &= ~bit;
167 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
168
169 return 0;
170}
171
172/*
173 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
174 */
175static void set_led(struct cardinfo *card, int shift, unsigned char state)
176{
177 unsigned char led;
178
179 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
180 if (state == LED_FLIP)
181 led ^= (1<<shift);
182 else {
183 led &= ~(0x03 << shift);
184 led |= (state << shift);
185 }
186 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
187
188}
189
190#ifdef MM_DIAG
191static void dump_regs(struct cardinfo *card)
192{
193 unsigned char *p;
194 int i, i1;
195
196 p = card->csr_remap;
197 for (i = 0; i < 8; i++) {
198 printk(KERN_DEBUG "%p ", p);
199
200 for (i1 = 0; i1 < 16; i1++)
201 printk("%02x ", *p++);
202
203 printk("\n");
204 }
205}
206#endif
207
208static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
209{
210 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
211 if (dmastat & DMASCR_ANY_ERR)
212 printk(KERN_CONT "ANY_ERR ");
213 if (dmastat & DMASCR_MBE_ERR)
214 printk(KERN_CONT "MBE_ERR ");
215 if (dmastat & DMASCR_PARITY_ERR_REP)
216 printk(KERN_CONT "PARITY_ERR_REP ");
217 if (dmastat & DMASCR_PARITY_ERR_DET)
218 printk(KERN_CONT "PARITY_ERR_DET ");
219 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
220 printk(KERN_CONT "SYSTEM_ERR_SIG ");
221 if (dmastat & DMASCR_TARGET_ABT)
222 printk(KERN_CONT "TARGET_ABT ");
223 if (dmastat & DMASCR_MASTER_ABT)
224 printk(KERN_CONT "MASTER_ABT ");
225 if (dmastat & DMASCR_CHAIN_COMPLETE)
226 printk(KERN_CONT "CHAIN_COMPLETE ");
227 if (dmastat & DMASCR_DMA_COMPLETE)
228 printk(KERN_CONT "DMA_COMPLETE ");
229 printk("\n");
230}
231
232/*
233 * Theory of request handling
234 *
235 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
236 * We have two pages of mm_dma_desc, holding about 64 descriptors
237 * each. These are allocated at init time.
238 * One page is "Ready" and is either full, or can have request added.
239 * The other page might be "Active", which DMA is happening on it.
240 *
241 * Whenever IO on the active page completes, the Ready page is activated
242 * and the ex-Active page is clean out and made Ready.
243 * Otherwise the Ready page is only activated when it becomes full.
244 *
245 * If a request arrives while both pages a full, it is queued, and b_rdev is
246 * overloaded to record whether it was a read or a write.
247 *
248 * The interrupt handler only polls the device to clear the interrupt.
249 * The processing of the result is done in a tasklet.
250 */
251
252static void mm_start_io(struct cardinfo *card)
253{
254 /* we have the lock, we know there is
255 * no IO active, and we know that card->Active
256 * is set
257 */
258 struct mm_dma_desc *desc;
259 struct mm_page *page;
260 int offset;
261
262 /* make the last descriptor end the chain */
263 page = &card->mm_pages[card->Active];
264 pr_debug("start_io: %d %d->%d\n",
265 card->Active, page->headcnt, page->cnt - 1);
266 desc = &page->desc[page->cnt-1];
267
268 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
269 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
270 desc->sem_control_bits = desc->control_bits;
271
272
273 if (debug & DEBUG_LED_ON_TRANSFER)
274 set_led(card, LED_REMOVE, LED_ON);
275
276 desc = &page->desc[page->headcnt];
277 writel(0, card->csr_remap + DMA_PCI_ADDR);
278 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
279
280 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
281 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
282
283 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
284 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
285
286 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
287 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
288
289 offset = ((char *)desc) - ((char *)page->desc);
290 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
291 card->csr_remap + DMA_DESCRIPTOR_ADDR);
292 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
293 * and on some ports will do nothing ! */
294 writel(cpu_to_le32(((u64)page->page_dma)>>32),
295 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
296
297 /* Go, go, go */
298 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
299 card->csr_remap + DMA_STATUS_CTRL);
300}
301
302static int add_bio(struct cardinfo *card);
303
304static void activate(struct cardinfo *card)
305{
306 /* if No page is Active, and Ready is
307 * not empty, then switch Ready page
308 * to active and start IO.
309 * Then add any bh's that are available to Ready
310 */
311
312 do {
313 while (add_bio(card))
314 ;
315
316 if (card->Active == -1 &&
317 card->mm_pages[card->Ready].cnt > 0) {
318 card->Active = card->Ready;
319 card->Ready = 1-card->Ready;
320 mm_start_io(card);
321 }
322
323 } while (card->Active == -1 && add_bio(card));
324}
325
326static inline void reset_page(struct mm_page *page)
327{
328 page->cnt = 0;
329 page->headcnt = 0;
330 page->bio = NULL;
331 page->biotail = &page->bio;
332}
333
334/*
335 * If there is room on Ready page, take
336 * one bh off list and add it.
337 * return 1 if there was room, else 0.
338 */
339static int add_bio(struct cardinfo *card)
340{
341 struct mm_page *p;
342 struct mm_dma_desc *desc;
343 dma_addr_t dma_handle;
344 int offset;
345 struct bio *bio;
346 struct bio_vec vec;
347 int rw;
348
349 bio = card->currentbio;
350 if (!bio && card->bio) {
351 card->currentbio = card->bio;
352 card->current_iter = card->bio->bi_iter;
353 card->bio = card->bio->bi_next;
354 if (card->bio == NULL)
355 card->biotail = &card->bio;
356 card->currentbio->bi_next = NULL;
357 return 1;
358 }
359 if (!bio)
360 return 0;
361
362 rw = bio_rw(bio);
363 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
364 return 0;
365
366 vec = bio_iter_iovec(bio, card->current_iter);
367
368 dma_handle = pci_map_page(card->dev,
369 vec.bv_page,
370 vec.bv_offset,
371 vec.bv_len,
372 (rw == READ) ?
373 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
374
375 p = &card->mm_pages[card->Ready];
376 desc = &p->desc[p->cnt];
377 p->cnt++;
378 if (p->bio == NULL)
379 p->iter = card->current_iter;
380 if ((p->biotail) != &bio->bi_next) {
381 *(p->biotail) = bio;
382 p->biotail = &(bio->bi_next);
383 bio->bi_next = NULL;
384 }
385
386 desc->data_dma_handle = dma_handle;
387
388 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
389 desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
390 desc->transfer_size = cpu_to_le32(vec.bv_len);
391 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
392 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
393 desc->zero1 = desc->zero2 = 0;
394 offset = (((char *)(desc+1)) - ((char *)p->desc));
395 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
396 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
397 DMASCR_PARITY_INT_EN|
398 DMASCR_CHAIN_EN |
399 DMASCR_SEM_EN |
400 pci_cmds);
401 if (rw == WRITE)
402 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
403 desc->sem_control_bits = desc->control_bits;
404
405
406 bio_advance_iter(bio, &card->current_iter, vec.bv_len);
407 if (!card->current_iter.bi_size)
408 card->currentbio = NULL;
409
410 return 1;
411}
412
413static void process_page(unsigned long data)
414{
415 /* check if any of the requests in the page are DMA_COMPLETE,
416 * and deal with them appropriately.
417 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
418 * dma must have hit an error on that descriptor, so use dma_status
419 * instead and assume that all following descriptors must be re-tried.
420 */
421 struct mm_page *page;
422 struct bio *return_bio = NULL;
423 struct cardinfo *card = (struct cardinfo *)data;
424 unsigned int dma_status = card->dma_status;
425
426 spin_lock_bh(&card->lock);
427 if (card->Active < 0)
428 goto out_unlock;
429 page = &card->mm_pages[card->Active];
430
431 while (page->headcnt < page->cnt) {
432 struct bio *bio = page->bio;
433 struct mm_dma_desc *desc = &page->desc[page->headcnt];
434 int control = le32_to_cpu(desc->sem_control_bits);
435 int last = 0;
436 struct bio_vec vec;
437
438 if (!(control & DMASCR_DMA_COMPLETE)) {
439 control = dma_status;
440 last = 1;
441 }
442
443 page->headcnt++;
444 vec = bio_iter_iovec(bio, page->iter);
445 bio_advance_iter(bio, &page->iter, vec.bv_len);
446
447 if (!page->iter.bi_size) {
448 page->bio = bio->bi_next;
449 if (page->bio)
450 page->iter = page->bio->bi_iter;
451 }
452
453 pci_unmap_page(card->dev, desc->data_dma_handle,
454 vec.bv_len,
455 (control & DMASCR_TRANSFER_READ) ?
456 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
457 if (control & DMASCR_HARD_ERROR) {
458 /* error */
459 bio->bi_error = -EIO;
460 dev_printk(KERN_WARNING, &card->dev->dev,
461 "I/O error on sector %d/%d\n",
462 le32_to_cpu(desc->local_addr)>>9,
463 le32_to_cpu(desc->transfer_size));
464 dump_dmastat(card, control);
465 } else if ((bio->bi_rw & REQ_WRITE) &&
466 le32_to_cpu(desc->local_addr) >> 9 ==
467 card->init_size) {
468 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
469 if (card->init_size >> 1 >= card->mm_size) {
470 dev_printk(KERN_INFO, &card->dev->dev,
471 "memory now initialised\n");
472 set_userbit(card, MEMORY_INITIALIZED, 1);
473 }
474 }
475 if (bio != page->bio) {
476 bio->bi_next = return_bio;
477 return_bio = bio;
478 }
479
480 if (last)
481 break;
482 }
483
484 if (debug & DEBUG_LED_ON_TRANSFER)
485 set_led(card, LED_REMOVE, LED_OFF);
486
487 if (card->check_batteries) {
488 card->check_batteries = 0;
489 check_batteries(card);
490 }
491 if (page->headcnt >= page->cnt) {
492 reset_page(page);
493 card->Active = -1;
494 activate(card);
495 } else {
496 /* haven't finished with this one yet */
497 pr_debug("do some more\n");
498 mm_start_io(card);
499 }
500 out_unlock:
501 spin_unlock_bh(&card->lock);
502
503 while (return_bio) {
504 struct bio *bio = return_bio;
505
506 return_bio = bio->bi_next;
507 bio->bi_next = NULL;
508 bio_endio(bio);
509 }
510}
511
512static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
513{
514 struct cardinfo *card = cb->data;
515
516 spin_lock_irq(&card->lock);
517 activate(card);
518 spin_unlock_irq(&card->lock);
519 kfree(cb);
520}
521
522static int mm_check_plugged(struct cardinfo *card)
523{
524 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
525}
526
527static blk_qc_t mm_make_request(struct request_queue *q, struct bio *bio)
528{
529 struct cardinfo *card = q->queuedata;
530 pr_debug("mm_make_request %llu %u\n",
531 (unsigned long long)bio->bi_iter.bi_sector,
532 bio->bi_iter.bi_size);
533
534 blk_queue_split(q, &bio, q->bio_split);
535
536 spin_lock_irq(&card->lock);
537 *card->biotail = bio;
538 bio->bi_next = NULL;
539 card->biotail = &bio->bi_next;
540 if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card))
541 activate(card);
542 spin_unlock_irq(&card->lock);
543
544 return BLK_QC_T_NONE;
545}
546
547static irqreturn_t mm_interrupt(int irq, void *__card)
548{
549 struct cardinfo *card = (struct cardinfo *) __card;
550 unsigned int dma_status;
551 unsigned short cfg_status;
552
553HW_TRACE(0x30);
554
555 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
556
557 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
558 /* interrupt wasn't for me ... */
559 return IRQ_NONE;
560 }
561
562 /* clear COMPLETION interrupts */
563 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
564 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
565 card->csr_remap + DMA_STATUS_CTRL);
566 else
567 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
568 card->csr_remap + DMA_STATUS_CTRL + 2);
569
570 /* log errors and clear interrupt status */
571 if (dma_status & DMASCR_ANY_ERR) {
572 unsigned int data_log1, data_log2;
573 unsigned int addr_log1, addr_log2;
574 unsigned char stat, count, syndrome, check;
575
576 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
577
578 data_log1 = le32_to_cpu(readl(card->csr_remap +
579 ERROR_DATA_LOG));
580 data_log2 = le32_to_cpu(readl(card->csr_remap +
581 ERROR_DATA_LOG + 4));
582 addr_log1 = le32_to_cpu(readl(card->csr_remap +
583 ERROR_ADDR_LOG));
584 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
585
586 count = readb(card->csr_remap + ERROR_COUNT);
587 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
588 check = readb(card->csr_remap + ERROR_CHECK);
589
590 dump_dmastat(card, dma_status);
591
592 if (stat & 0x01)
593 dev_printk(KERN_ERR, &card->dev->dev,
594 "Memory access error detected (err count %d)\n",
595 count);
596 if (stat & 0x02)
597 dev_printk(KERN_ERR, &card->dev->dev,
598 "Multi-bit EDC error\n");
599
600 dev_printk(KERN_ERR, &card->dev->dev,
601 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
602 addr_log2, addr_log1, data_log2, data_log1);
603 dev_printk(KERN_ERR, &card->dev->dev,
604 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
605 check, syndrome);
606
607 writeb(0, card->csr_remap + ERROR_COUNT);
608 }
609
610 if (dma_status & DMASCR_PARITY_ERR_REP) {
611 dev_printk(KERN_ERR, &card->dev->dev,
612 "PARITY ERROR REPORTED\n");
613 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
614 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
615 }
616
617 if (dma_status & DMASCR_PARITY_ERR_DET) {
618 dev_printk(KERN_ERR, &card->dev->dev,
619 "PARITY ERROR DETECTED\n");
620 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
621 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
622 }
623
624 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
625 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
626 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
627 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
628 }
629
630 if (dma_status & DMASCR_TARGET_ABT) {
631 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
632 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
633 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
634 }
635
636 if (dma_status & DMASCR_MASTER_ABT) {
637 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
638 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
639 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
640 }
641
642 /* and process the DMA descriptors */
643 card->dma_status = dma_status;
644 tasklet_schedule(&card->tasklet);
645
646HW_TRACE(0x36);
647
648 return IRQ_HANDLED;
649}
650
651/*
652 * If both batteries are good, no LED
653 * If either battery has been warned, solid LED
654 * If both batteries are bad, flash the LED quickly
655 * If either battery is bad, flash the LED semi quickly
656 */
657static void set_fault_to_battery_status(struct cardinfo *card)
658{
659 if (card->battery[0].good && card->battery[1].good)
660 set_led(card, LED_FAULT, LED_OFF);
661 else if (card->battery[0].warned || card->battery[1].warned)
662 set_led(card, LED_FAULT, LED_ON);
663 else if (!card->battery[0].good && !card->battery[1].good)
664 set_led(card, LED_FAULT, LED_FLASH_7_0);
665 else
666 set_led(card, LED_FAULT, LED_FLASH_3_5);
667}
668
669static void init_battery_timer(void);
670
671static int check_battery(struct cardinfo *card, int battery, int status)
672{
673 if (status != card->battery[battery].good) {
674 card->battery[battery].good = !card->battery[battery].good;
675 card->battery[battery].last_change = jiffies;
676
677 if (card->battery[battery].good) {
678 dev_printk(KERN_ERR, &card->dev->dev,
679 "Battery %d now good\n", battery + 1);
680 card->battery[battery].warned = 0;
681 } else
682 dev_printk(KERN_ERR, &card->dev->dev,
683 "Battery %d now FAILED\n", battery + 1);
684
685 return 1;
686 } else if (!card->battery[battery].good &&
687 !card->battery[battery].warned &&
688 time_after_eq(jiffies, card->battery[battery].last_change +
689 (HZ * 60 * 60 * 5))) {
690 dev_printk(KERN_ERR, &card->dev->dev,
691 "Battery %d still FAILED after 5 hours\n", battery + 1);
692 card->battery[battery].warned = 1;
693
694 return 1;
695 }
696
697 return 0;
698}
699
700static void check_batteries(struct cardinfo *card)
701{
702 /* NOTE: this must *never* be called while the card
703 * is doing (bus-to-card) DMA, or you will need the
704 * reset switch
705 */
706 unsigned char status;
707 int ret1, ret2;
708
709 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
710 if (debug & DEBUG_BATTERY_POLLING)
711 dev_printk(KERN_DEBUG, &card->dev->dev,
712 "checking battery status, 1 = %s, 2 = %s\n",
713 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
714 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
715
716 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
717 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
718
719 if (ret1 || ret2)
720 set_fault_to_battery_status(card);
721}
722
723static void check_all_batteries(unsigned long ptr)
724{
725 int i;
726
727 for (i = 0; i < num_cards; i++)
728 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
729 struct cardinfo *card = &cards[i];
730 spin_lock_bh(&card->lock);
731 if (card->Active >= 0)
732 card->check_batteries = 1;
733 else
734 check_batteries(card);
735 spin_unlock_bh(&card->lock);
736 }
737
738 init_battery_timer();
739}
740
741static void init_battery_timer(void)
742{
743 init_timer(&battery_timer);
744 battery_timer.function = check_all_batteries;
745 battery_timer.expires = jiffies + (HZ * 60);
746 add_timer(&battery_timer);
747}
748
749static void del_battery_timer(void)
750{
751 del_timer(&battery_timer);
752}
753
754/*
755 * Note no locks taken out here. In a worst case scenario, we could drop
756 * a chunk of system memory. But that should never happen, since validation
757 * happens at open or mount time, when locks are held.
758 *
759 * That's crap, since doing that while some partitions are opened
760 * or mounted will give you really nasty results.
761 */
762static int mm_revalidate(struct gendisk *disk)
763{
764 struct cardinfo *card = disk->private_data;
765 set_capacity(disk, card->mm_size << 1);
766 return 0;
767}
768
769static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
770{
771 struct cardinfo *card = bdev->bd_disk->private_data;
772 int size = card->mm_size * (1024 / MM_HARDSECT);
773
774 /*
775 * get geometry: we have to fake one... trim the size to a
776 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
777 * whatever cylinders.
778 */
779 geo->heads = 64;
780 geo->sectors = 32;
781 geo->cylinders = size / (geo->heads * geo->sectors);
782 return 0;
783}
784
785static const struct block_device_operations mm_fops = {
786 .owner = THIS_MODULE,
787 .getgeo = mm_getgeo,
788 .revalidate_disk = mm_revalidate,
789};
790
791static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
792{
793 int ret = -ENODEV;
794 struct cardinfo *card = &cards[num_cards];
795 unsigned char mem_present;
796 unsigned char batt_status;
797 unsigned int saved_bar, data;
798 unsigned long csr_base;
799 unsigned long csr_len;
800 int magic_number;
801 static int printed_version;
802
803 if (!printed_version++)
804 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
805
806 ret = pci_enable_device(dev);
807 if (ret)
808 return ret;
809
810 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
811 pci_set_master(dev);
812
813 card->dev = dev;
814
815 csr_base = pci_resource_start(dev, 0);
816 csr_len = pci_resource_len(dev, 0);
817 if (!csr_base || !csr_len)
818 return -ENODEV;
819
820 dev_printk(KERN_INFO, &dev->dev,
821 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
822
823 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
824 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
825 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
826 return -ENOMEM;
827 }
828
829 ret = pci_request_regions(dev, DRIVER_NAME);
830 if (ret) {
831 dev_printk(KERN_ERR, &card->dev->dev,
832 "Unable to request memory region\n");
833 goto failed_req_csr;
834 }
835
836 card->csr_remap = ioremap_nocache(csr_base, csr_len);
837 if (!card->csr_remap) {
838 dev_printk(KERN_ERR, &card->dev->dev,
839 "Unable to remap memory region\n");
840 ret = -ENOMEM;
841
842 goto failed_remap_csr;
843 }
844
845 dev_printk(KERN_INFO, &card->dev->dev,
846 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
847 csr_base, card->csr_remap, csr_len);
848
849 switch (card->dev->device) {
850 case 0x5415:
851 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
852 magic_number = 0x59;
853 break;
854
855 case 0x5425:
856 card->flags |= UM_FLAG_NO_BYTE_STATUS;
857 magic_number = 0x5C;
858 break;
859
860 case 0x6155:
861 card->flags |= UM_FLAG_NO_BYTE_STATUS |
862 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
863 magic_number = 0x99;
864 break;
865
866 default:
867 magic_number = 0x100;
868 break;
869 }
870
871 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
872 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
873 ret = -ENOMEM;
874 goto failed_magic;
875 }
876
877 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
878 PAGE_SIZE * 2,
879 &card->mm_pages[0].page_dma);
880 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
881 PAGE_SIZE * 2,
882 &card->mm_pages[1].page_dma);
883 if (card->mm_pages[0].desc == NULL ||
884 card->mm_pages[1].desc == NULL) {
885 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
886 goto failed_alloc;
887 }
888 reset_page(&card->mm_pages[0]);
889 reset_page(&card->mm_pages[1]);
890 card->Ready = 0; /* page 0 is ready */
891 card->Active = -1; /* no page is active */
892 card->bio = NULL;
893 card->biotail = &card->bio;
894
895 card->queue = blk_alloc_queue(GFP_KERNEL);
896 if (!card->queue)
897 goto failed_alloc;
898
899 blk_queue_make_request(card->queue, mm_make_request);
900 card->queue->queue_lock = &card->lock;
901 card->queue->queuedata = card;
902
903 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
904
905 card->check_batteries = 0;
906
907 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
908 switch (mem_present) {
909 case MEM_128_MB:
910 card->mm_size = 1024 * 128;
911 break;
912 case MEM_256_MB:
913 card->mm_size = 1024 * 256;
914 break;
915 case MEM_512_MB:
916 card->mm_size = 1024 * 512;
917 break;
918 case MEM_1_GB:
919 card->mm_size = 1024 * 1024;
920 break;
921 case MEM_2_GB:
922 card->mm_size = 1024 * 2048;
923 break;
924 default:
925 card->mm_size = 0;
926 break;
927 }
928
929 /* Clear the LED's we control */
930 set_led(card, LED_REMOVE, LED_OFF);
931 set_led(card, LED_FAULT, LED_OFF);
932
933 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
934
935 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
936 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
937 card->battery[0].last_change = card->battery[1].last_change = jiffies;
938
939 if (card->flags & UM_FLAG_NO_BATT)
940 dev_printk(KERN_INFO, &card->dev->dev,
941 "Size %d KB\n", card->mm_size);
942 else {
943 dev_printk(KERN_INFO, &card->dev->dev,
944 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
945 card->mm_size,
946 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
947 card->battery[0].good ? "OK" : "FAILURE",
948 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
949 card->battery[1].good ? "OK" : "FAILURE");
950
951 set_fault_to_battery_status(card);
952 }
953
954 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
955 data = 0xffffffff;
956 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
957 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
958 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
959 data &= 0xfffffff0;
960 data = ~data;
961 data += 1;
962
963 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
964 card)) {
965 dev_printk(KERN_ERR, &card->dev->dev,
966 "Unable to allocate IRQ\n");
967 ret = -ENODEV;
968 goto failed_req_irq;
969 }
970
971 dev_printk(KERN_INFO, &card->dev->dev,
972 "Window size %d bytes, IRQ %d\n", data, dev->irq);
973
974 spin_lock_init(&card->lock);
975
976 pci_set_drvdata(dev, card);
977
978 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
979 pci_write_cmd = 0x07; /* then Memory Write command */
980
981 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
982 unsigned short cfg_command;
983 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
984 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
985 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
986 }
987 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
988
989 num_cards++;
990
991 if (!get_userbit(card, MEMORY_INITIALIZED)) {
992 dev_printk(KERN_INFO, &card->dev->dev,
993 "memory NOT initialized. Consider over-writing whole device.\n");
994 card->init_size = 0;
995 } else {
996 dev_printk(KERN_INFO, &card->dev->dev,
997 "memory already initialized\n");
998 card->init_size = card->mm_size;
999 }
1000
1001 /* Enable ECC */
1002 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1003
1004 return 0;
1005
1006 failed_req_irq:
1007 failed_alloc:
1008 if (card->mm_pages[0].desc)
1009 pci_free_consistent(card->dev, PAGE_SIZE*2,
1010 card->mm_pages[0].desc,
1011 card->mm_pages[0].page_dma);
1012 if (card->mm_pages[1].desc)
1013 pci_free_consistent(card->dev, PAGE_SIZE*2,
1014 card->mm_pages[1].desc,
1015 card->mm_pages[1].page_dma);
1016 failed_magic:
1017 iounmap(card->csr_remap);
1018 failed_remap_csr:
1019 pci_release_regions(dev);
1020 failed_req_csr:
1021
1022 return ret;
1023}
1024
1025static void mm_pci_remove(struct pci_dev *dev)
1026{
1027 struct cardinfo *card = pci_get_drvdata(dev);
1028
1029 tasklet_kill(&card->tasklet);
1030 free_irq(dev->irq, card);
1031 iounmap(card->csr_remap);
1032
1033 if (card->mm_pages[0].desc)
1034 pci_free_consistent(card->dev, PAGE_SIZE*2,
1035 card->mm_pages[0].desc,
1036 card->mm_pages[0].page_dma);
1037 if (card->mm_pages[1].desc)
1038 pci_free_consistent(card->dev, PAGE_SIZE*2,
1039 card->mm_pages[1].desc,
1040 card->mm_pages[1].page_dma);
1041 blk_cleanup_queue(card->queue);
1042
1043 pci_release_regions(dev);
1044 pci_disable_device(dev);
1045}
1046
1047static const struct pci_device_id mm_pci_ids[] = {
1048 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1049 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1050 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
1051 {
1052 .vendor = 0x8086,
1053 .device = 0xB555,
1054 .subvendor = 0x1332,
1055 .subdevice = 0x5460,
1056 .class = 0x050000,
1057 .class_mask = 0,
1058 }, { /* end: all zeroes */ }
1059};
1060
1061MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1062
1063static struct pci_driver mm_pci_driver = {
1064 .name = DRIVER_NAME,
1065 .id_table = mm_pci_ids,
1066 .probe = mm_pci_probe,
1067 .remove = mm_pci_remove,
1068};
1069
1070static int __init mm_init(void)
1071{
1072 int retval, i;
1073 int err;
1074
1075 retval = pci_register_driver(&mm_pci_driver);
1076 if (retval)
1077 return -ENOMEM;
1078
1079 err = major_nr = register_blkdev(0, DRIVER_NAME);
1080 if (err < 0) {
1081 pci_unregister_driver(&mm_pci_driver);
1082 return -EIO;
1083 }
1084
1085 for (i = 0; i < num_cards; i++) {
1086 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1087 if (!mm_gendisk[i])
1088 goto out;
1089 }
1090
1091 for (i = 0; i < num_cards; i++) {
1092 struct gendisk *disk = mm_gendisk[i];
1093 sprintf(disk->disk_name, "umem%c", 'a'+i);
1094 spin_lock_init(&cards[i].lock);
1095 disk->major = major_nr;
1096 disk->first_minor = i << MM_SHIFT;
1097 disk->fops = &mm_fops;
1098 disk->private_data = &cards[i];
1099 disk->queue = cards[i].queue;
1100 set_capacity(disk, cards[i].mm_size << 1);
1101 add_disk(disk);
1102 }
1103
1104 init_battery_timer();
1105 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1106/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1107 return 0;
1108
1109out:
1110 pci_unregister_driver(&mm_pci_driver);
1111 unregister_blkdev(major_nr, DRIVER_NAME);
1112 while (i--)
1113 put_disk(mm_gendisk[i]);
1114 return -ENOMEM;
1115}
1116
1117static void __exit mm_cleanup(void)
1118{
1119 int i;
1120
1121 del_battery_timer();
1122
1123 for (i = 0; i < num_cards ; i++) {
1124 del_gendisk(mm_gendisk[i]);
1125 put_disk(mm_gendisk[i]);
1126 }
1127
1128 pci_unregister_driver(&mm_pci_driver);
1129
1130 unregister_blkdev(major_nr, DRIVER_NAME);
1131}
1132
1133module_init(mm_init);
1134module_exit(mm_cleanup);
1135
1136MODULE_AUTHOR(DRIVER_AUTHOR);
1137MODULE_DESCRIPTION(DRIVER_DESC);
1138MODULE_LICENSE("GPL");