1/*
  2 *  This program is free software; you can redistribute it and/or modify it
  3 *  under the terms of the GNU General Public License version 2 as published
  4 *  by the Free Software Foundation.
  5 *
  6 *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 
  7 *  Based on EP93xx wdt driver
  8 */
  9
 
 
 10#include <linux/module.h>
 11#include <linux/fs.h>
 12#include <linux/miscdevice.h>
 13#include <linux/watchdog.h>
 14#include <linux/platform_device.h>
 15#include <linux/uaccess.h>
 16#include <linux/clk.h>
 17#include <linux/io.h>
 
 
 
 
 
 
 
 18
 19#include <lantiq.h>
 
 
 
 
 20
 21/* Section 3.4 of the datasheet
 
 22 * The password sequence protects the WDT control register from unintended
 23 * write actions, which might cause malfunction of the WDT.
 24 *
 25 * essentially the following two magic passwords need to be written to allow
 26 * IO access to the WDT core
 27 */
 28#define LTQ_WDT_PW1		0x00BE0000
 29#define LTQ_WDT_PW2		0x00DC0000
 30
 31#define LTQ_WDT_CR		0x0	/* watchdog control register */
 32#define LTQ_WDT_SR		0x8	/* watchdog status register */
 33
 34#define LTQ_WDT_SR_EN		(0x1 << 31)	/* enable bit */
 35#define LTQ_WDT_SR_PWD		(0x3 << 26)	/* turn on power */
 36#define LTQ_WDT_SR_CLKDIV	(0x3 << 24)	/* turn on clock and set */
 37						/* divider to 0x40000 */
 38#define LTQ_WDT_DIVIDER		0x40000
 39#define LTQ_MAX_TIMEOUT		((1 << 16) - 1)	/* the reload field is 16 bit */
 40
 41static int nowayout = WATCHDOG_NOWAYOUT;
 42
 43static void __iomem *ltq_wdt_membase;
 44static unsigned long ltq_io_region_clk_rate;
 45
 46static unsigned long ltq_wdt_bootstatus;
 47static unsigned long ltq_wdt_in_use;
 48static int ltq_wdt_timeout = 30;
 49static int ltq_wdt_ok_to_close;
 50
 51static void
 52ltq_wdt_enable(void)
 53{
 54	unsigned long int timeout = ltq_wdt_timeout *
 55			(ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
 56	if (timeout > LTQ_MAX_TIMEOUT)
 57		timeout = LTQ_MAX_TIMEOUT;
 58
 59	/* write the first password magic */
 60	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
 61	/* write the second magic plus the configuration and new timeout */
 62	ltq_w32(LTQ_WDT_SR_EN | LTQ_WDT_SR_PWD | LTQ_WDT_SR_CLKDIV |
 63		LTQ_WDT_PW2 | timeout, ltq_wdt_membase + LTQ_WDT_CR);
 64}
 65
 66static void
 67ltq_wdt_disable(void)
 68{
 69	/* write the first password magic */
 70	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
 71	/* write the second password magic with no config
 
 72	 * this turns the watchdog off
 73	 */
 74	ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
 75}
 76
 77static ssize_t
 78ltq_wdt_write(struct file *file, const char __user *data,
 79		size_t len, loff_t *ppos)
 80{
 81	if (len) {
 82		if (!nowayout) {
 83			size_t i;
 84
 85			ltq_wdt_ok_to_close = 0;
 86			for (i = 0; i != len; i++) {
 87				char c;
 88
 89				if (get_user(c, data + i))
 90					return -EFAULT;
 91				if (c == 'V')
 92					ltq_wdt_ok_to_close = 1;
 93				else
 94					ltq_wdt_ok_to_close = 0;
 95			}
 96		}
 97		ltq_wdt_enable();
 98	}
 99
100	return len;
101}
102
103static struct watchdog_info ident = {
104	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
105			WDIOF_CARDRESET,
106	.identity = "ltq_wdt",
107};
108
109static long
110ltq_wdt_ioctl(struct file *file,
111		unsigned int cmd, unsigned long arg)
112{
113	int ret = -ENOTTY;
114
115	switch (cmd) {
116	case WDIOC_GETSUPPORT:
117		ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
118				sizeof(ident)) ? -EFAULT : 0;
119		break;
120
121	case WDIOC_GETBOOTSTATUS:
122		ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
123		break;
124
125	case WDIOC_GETSTATUS:
126		ret = put_user(0, (int __user *)arg);
127		break;
128
129	case WDIOC_SETTIMEOUT:
130		ret = get_user(ltq_wdt_timeout, (int __user *)arg);
131		if (!ret)
132			ltq_wdt_enable();
133		/* intentional drop through */
134	case WDIOC_GETTIMEOUT:
135		ret = put_user(ltq_wdt_timeout, (int __user *)arg);
136		break;
137
138	case WDIOC_KEEPALIVE:
139		ltq_wdt_enable();
140		ret = 0;
141		break;
142	}
143	return ret;
144}
145
146static int
147ltq_wdt_open(struct inode *inode, struct file *file)
148{
149	if (test_and_set_bit(0, &ltq_wdt_in_use))
150		return -EBUSY;
151	ltq_wdt_in_use = 1;
152	ltq_wdt_enable();
153
154	return nonseekable_open(inode, file);
155}
156
157static int
158ltq_wdt_release(struct inode *inode, struct file *file)
159{
160	if (ltq_wdt_ok_to_close)
161		ltq_wdt_disable();
162	else
163		pr_err("ltq_wdt: watchdog closed without warning\n");
164	ltq_wdt_ok_to_close = 0;
165	clear_bit(0, &ltq_wdt_in_use);
166
167	return 0;
168}
169
170static const struct file_operations ltq_wdt_fops = {
171	.owner		= THIS_MODULE,
172	.write		= ltq_wdt_write,
173	.unlocked_ioctl	= ltq_wdt_ioctl,
174	.open		= ltq_wdt_open,
175	.release	= ltq_wdt_release,
176	.llseek		= no_llseek,
177};
178
179static struct miscdevice ltq_wdt_miscdev = {
180	.minor	= WATCHDOG_MINOR,
181	.name	= "watchdog",
182	.fops	= &ltq_wdt_fops,
183};
184
185static int __init
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
186ltq_wdt_probe(struct platform_device *pdev)
187{
188	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
189	struct clk *clk;
 
 
190
191	if (!res) {
192		dev_err(&pdev->dev, "cannot obtain I/O memory region");
193		return -ENOENT;
194	}
195	res = devm_request_mem_region(&pdev->dev, res->start,
196		resource_size(res), dev_name(&pdev->dev));
197	if (!res) {
198		dev_err(&pdev->dev, "cannot request I/O memory region");
199		return -EBUSY;
200	}
201	ltq_wdt_membase = devm_ioremap_nocache(&pdev->dev, res->start,
202		resource_size(res));
203	if (!ltq_wdt_membase) {
204		dev_err(&pdev->dev, "cannot remap I/O memory region\n");
205		return -ENOMEM;
206	}
207
208	/* we do not need to enable the clock as it is always running */
209	clk = clk_get(&pdev->dev, "io");
210	WARN_ON(!clk);
 
 
 
211	ltq_io_region_clk_rate = clk_get_rate(clk);
212	clk_put(clk);
213
214	if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST)
215		ltq_wdt_bootstatus = WDIOF_CARDRESET;
216
217	return misc_register(&ltq_wdt_miscdev);
218}
219
220static int __devexit
221ltq_wdt_remove(struct platform_device *pdev)
222{
223	misc_deregister(&ltq_wdt_miscdev);
224
225	if (ltq_wdt_membase)
226		iounmap(ltq_wdt_membase);
227
228	return 0;
229}
230
 
 
 
 
 
 
 
231
232static struct platform_driver ltq_wdt_driver = {
233	.remove = __devexit_p(ltq_wdt_remove),
 
234	.driver = {
235		.name = "ltq_wdt",
236		.owner = THIS_MODULE,
237	},
238};
239
240static int __init
241init_ltq_wdt(void)
242{
243	return platform_driver_probe(&ltq_wdt_driver, ltq_wdt_probe);
244}
245
246static void __exit
247exit_ltq_wdt(void)
248{
249	return platform_driver_unregister(&ltq_wdt_driver);
250}
251
252module_init(init_ltq_wdt);
253module_exit(exit_ltq_wdt);
254
255module_param(nowayout, int, 0);
256MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
257
258MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
259MODULE_DESCRIPTION("Lantiq SoC Watchdog");
260MODULE_LICENSE("GPL");
261MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

  1/*
  2 *  This program is free software; you can redistribute it and/or modify it
  3 *  under the terms of the GNU General Public License version 2 as published
  4 *  by the Free Software Foundation.
  5 *
  6 *  Copyright (C) 2010 John Crispin <john@phrozen.org>
  7 *  Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
  8 *  Based on EP93xx wdt driver
  9 */
 10
 11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 12
 13#include <linux/module.h>
 14#include <linux/fs.h>
 15#include <linux/miscdevice.h>
 16#include <linux/watchdog.h>
 17#include <linux/of_platform.h>
 18#include <linux/uaccess.h>
 19#include <linux/clk.h>
 20#include <linux/io.h>
 21#include <linux/regmap.h>
 22#include <linux/mfd/syscon.h>
 23
 24#include <lantiq_soc.h>
 25
 26#define LTQ_XRX_RCU_RST_STAT		0x0014
 27#define LTQ_XRX_RCU_RST_STAT_WDT	BIT(31)
 28
 29/* CPU0 Reset Source Register */
 30#define LTQ_FALCON_SYS1_CPU0RS		0x0060
 31/* reset cause mask */
 32#define LTQ_FALCON_SYS1_CPU0RS_MASK	0x0007
 33#define LTQ_FALCON_SYS1_CPU0RS_WDT	0x02
 34
 35/*
 36 * Section 3.4 of the datasheet
 37 * The password sequence protects the WDT control register from unintended
 38 * write actions, which might cause malfunction of the WDT.
 39 *
 40 * essentially the following two magic passwords need to be written to allow
 41 * IO access to the WDT core
 42 */
 43#define LTQ_WDT_PW1		0x00BE0000
 44#define LTQ_WDT_PW2		0x00DC0000
 45
 46#define LTQ_WDT_CR		0x0	/* watchdog control register */
 47#define LTQ_WDT_SR		0x8	/* watchdog status register */
 48
 49#define LTQ_WDT_SR_EN		(0x1 << 31)	/* enable bit */
 50#define LTQ_WDT_SR_PWD		(0x3 << 26)	/* turn on power */
 51#define LTQ_WDT_SR_CLKDIV	(0x3 << 24)	/* turn on clock and set */
 52						/* divider to 0x40000 */
 53#define LTQ_WDT_DIVIDER		0x40000
 54#define LTQ_MAX_TIMEOUT		((1 << 16) - 1)	/* the reload field is 16 bit */
 55
 56static bool nowayout = WATCHDOG_NOWAYOUT;
 57
 58static void __iomem *ltq_wdt_membase;
 59static unsigned long ltq_io_region_clk_rate;
 60
 61static unsigned long ltq_wdt_bootstatus;
 62static unsigned long ltq_wdt_in_use;
 63static int ltq_wdt_timeout = 30;
 64static int ltq_wdt_ok_to_close;
 65
 66static void
 67ltq_wdt_enable(void)
 68{
 69	unsigned long int timeout = ltq_wdt_timeout *
 70			(ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
 71	if (timeout > LTQ_MAX_TIMEOUT)
 72		timeout = LTQ_MAX_TIMEOUT;
 73
 74	/* write the first password magic */
 75	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
 76	/* write the second magic plus the configuration and new timeout */
 77	ltq_w32(LTQ_WDT_SR_EN | LTQ_WDT_SR_PWD | LTQ_WDT_SR_CLKDIV |
 78		LTQ_WDT_PW2 | timeout, ltq_wdt_membase + LTQ_WDT_CR);
 79}
 80
 81static void
 82ltq_wdt_disable(void)
 83{
 84	/* write the first password magic */
 85	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
 86	/*
 87	 * write the second password magic with no config
 88	 * this turns the watchdog off
 89	 */
 90	ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
 91}
 92
 93static ssize_t
 94ltq_wdt_write(struct file *file, const char __user *data,
 95		size_t len, loff_t *ppos)
 96{
 97	if (len) {
 98		if (!nowayout) {
 99			size_t i;
100
101			ltq_wdt_ok_to_close = 0;
102			for (i = 0; i != len; i++) {
103				char c;
104
105				if (get_user(c, data + i))
106					return -EFAULT;
107				if (c == 'V')
108					ltq_wdt_ok_to_close = 1;
109				else
110					ltq_wdt_ok_to_close = 0;
111			}
112		}
113		ltq_wdt_enable();
114	}
115
116	return len;
117}
118
119static struct watchdog_info ident = {
120	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
121			WDIOF_CARDRESET,
122	.identity = "ltq_wdt",
123};
124
125static long
126ltq_wdt_ioctl(struct file *file,
127		unsigned int cmd, unsigned long arg)
128{
129	int ret = -ENOTTY;
130
131	switch (cmd) {
132	case WDIOC_GETSUPPORT:
133		ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
134				sizeof(ident)) ? -EFAULT : 0;
135		break;
136
137	case WDIOC_GETBOOTSTATUS:
138		ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
139		break;
140
141	case WDIOC_GETSTATUS:
142		ret = put_user(0, (int __user *)arg);
143		break;
144
145	case WDIOC_SETTIMEOUT:
146		ret = get_user(ltq_wdt_timeout, (int __user *)arg);
147		if (!ret)
148			ltq_wdt_enable();
149		/* intentional drop through */
150	case WDIOC_GETTIMEOUT:
151		ret = put_user(ltq_wdt_timeout, (int __user *)arg);
152		break;
153
154	case WDIOC_KEEPALIVE:
155		ltq_wdt_enable();
156		ret = 0;
157		break;
158	}
159	return ret;
160}
161
162static int
163ltq_wdt_open(struct inode *inode, struct file *file)
164{
165	if (test_and_set_bit(0, &ltq_wdt_in_use))
166		return -EBUSY;
167	ltq_wdt_in_use = 1;
168	ltq_wdt_enable();
169
170	return nonseekable_open(inode, file);
171}
172
173static int
174ltq_wdt_release(struct inode *inode, struct file *file)
175{
176	if (ltq_wdt_ok_to_close)
177		ltq_wdt_disable();
178	else
179		pr_err("watchdog closed without warning\n");
180	ltq_wdt_ok_to_close = 0;
181	clear_bit(0, &ltq_wdt_in_use);
182
183	return 0;
184}
185
186static const struct file_operations ltq_wdt_fops = {
187	.owner		= THIS_MODULE,
188	.write		= ltq_wdt_write,
189	.unlocked_ioctl	= ltq_wdt_ioctl,
190	.open		= ltq_wdt_open,
191	.release	= ltq_wdt_release,
192	.llseek		= no_llseek,
193};
194
195static struct miscdevice ltq_wdt_miscdev = {
196	.minor	= WATCHDOG_MINOR,
197	.name	= "watchdog",
198	.fops	= &ltq_wdt_fops,
199};
200
201typedef int (*ltq_wdt_bootstatus_set)(struct platform_device *pdev);
202
203static int ltq_wdt_bootstatus_xrx(struct platform_device *pdev)
204{
205	struct device *dev = &pdev->dev;
206	struct regmap *rcu_regmap;
207	u32 val;
208	int err;
209
210	rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap");
211	if (IS_ERR(rcu_regmap))
212		return PTR_ERR(rcu_regmap);
213
214	err = regmap_read(rcu_regmap, LTQ_XRX_RCU_RST_STAT, &val);
215	if (err)
216		return err;
217
218	if (val & LTQ_XRX_RCU_RST_STAT_WDT)
219		ltq_wdt_bootstatus = WDIOF_CARDRESET;
220
221	return 0;
222}
223
224static int ltq_wdt_bootstatus_falcon(struct platform_device *pdev)
225{
226	struct device *dev = &pdev->dev;
227	struct regmap *rcu_regmap;
228	u32 val;
229	int err;
230
231	rcu_regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
232						     "lantiq,rcu");
233	if (IS_ERR(rcu_regmap))
234		return PTR_ERR(rcu_regmap);
235
236	err = regmap_read(rcu_regmap, LTQ_FALCON_SYS1_CPU0RS, &val);
237	if (err)
238		return err;
239
240	if ((val & LTQ_FALCON_SYS1_CPU0RS_MASK) == LTQ_FALCON_SYS1_CPU0RS_WDT)
241		ltq_wdt_bootstatus = WDIOF_CARDRESET;
242
243	return 0;
244}
245
246static int
247ltq_wdt_probe(struct platform_device *pdev)
248{
249	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
250	struct clk *clk;
251	ltq_wdt_bootstatus_set ltq_wdt_bootstatus_set;
252	int ret;
253
254	ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res);
255	if (IS_ERR(ltq_wdt_membase))
256		return PTR_ERR(ltq_wdt_membase);
257
258	ltq_wdt_bootstatus_set = of_device_get_match_data(&pdev->dev);
259	if (ltq_wdt_bootstatus_set) {
260		ret = ltq_wdt_bootstatus_set(pdev);
261		if (ret)
262			return ret;
 
 
 
 
 
 
263	}
264
265	/* we do not need to enable the clock as it is always running */
266	clk = clk_get_io();
267	if (IS_ERR(clk)) {
268		dev_err(&pdev->dev, "Failed to get clock\n");
269		return -ENOENT;
270	}
271	ltq_io_region_clk_rate = clk_get_rate(clk);
272	clk_put(clk);
273
274	dev_info(&pdev->dev, "Init done\n");
 
 
275	return misc_register(&ltq_wdt_miscdev);
276}
277
278static int
279ltq_wdt_remove(struct platform_device *pdev)
280{
281	misc_deregister(&ltq_wdt_miscdev);
282
 
 
 
283	return 0;
284}
285
286static const struct of_device_id ltq_wdt_match[] = {
287	{ .compatible = "lantiq,wdt", .data = NULL},
288	{ .compatible = "lantiq,xrx100-wdt", .data = ltq_wdt_bootstatus_xrx },
289	{ .compatible = "lantiq,falcon-wdt", .data = ltq_wdt_bootstatus_falcon },
290	{},
291};
292MODULE_DEVICE_TABLE(of, ltq_wdt_match);
293
294static struct platform_driver ltq_wdt_driver = {
295	.probe = ltq_wdt_probe,
296	.remove = ltq_wdt_remove,
297	.driver = {
298		.name = "wdt",
299		.of_match_table = ltq_wdt_match,
300	},
301};
302
303module_platform_driver(ltq_wdt_driver);
 
 
 
 
304
305module_param(nowayout, bool, 0);
 
 
 
 
 
 
 
 
 
306MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
307MODULE_AUTHOR("John Crispin <john@phrozen.org>");
 
308MODULE_DESCRIPTION("Lantiq SoC Watchdog");
309MODULE_LICENSE("GPL");