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1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22#include <linux/err.h>
23#include <linux/fs.h>
24#include <linux/init.h>
25#include <linux/io.h>
26#include <linux/ioport.h>
27#include <linux/miscdevice.h>
28#include <linux/module.h>
29#include <linux/mutex.h>
30#include <linux/notifier.h>
31#include <linux/reboot.h>
32#include <linux/uaccess.h>
33#include <linux/watchdog.h>
34
35#define DRVNAME "f71808e_wdt"
36
37#define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
38#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
39#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
40
41#define SIO_REG_LDSEL 0x07 /* Logical device select */
42#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
43#define SIO_REG_DEVREV 0x22 /* Device revision */
44#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
45#define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
46#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
47#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
48#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
49#define SIO_REG_ENABLE 0x30 /* Logical device enable */
50#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
51
52#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
53#define SIO_F71808_ID 0x0901 /* Chipset ID */
54#define SIO_F71858_ID 0x0507 /* Chipset ID */
55#define SIO_F71862_ID 0x0601 /* Chipset ID */
56#define SIO_F71869_ID 0x0814 /* Chipset ID */
57#define SIO_F71882_ID 0x0541 /* Chipset ID */
58#define SIO_F71889_ID 0x0723 /* Chipset ID */
59
60#define F71808FG_REG_WDO_CONF 0xf0
61#define F71808FG_REG_WDT_CONF 0xf5
62#define F71808FG_REG_WD_TIME 0xf6
63
64#define F71808FG_FLAG_WDOUT_EN 7
65
66#define F71808FG_FLAG_WDTMOUT_STS 5
67#define F71808FG_FLAG_WD_EN 5
68#define F71808FG_FLAG_WD_PULSE 4
69#define F71808FG_FLAG_WD_UNIT 3
70
71/* Default values */
72#define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
73#define WATCHDOG_MAX_TIMEOUT (60 * 255)
74#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
75 watchdog signal */
76#define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
77 pin number 63 */
78
79static unsigned short force_id;
80module_param(force_id, ushort, 0);
81MODULE_PARM_DESC(force_id, "Override the detected device ID");
82
83static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
84static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
85module_param(timeout, int, 0);
86MODULE_PARM_DESC(timeout,
87 "Watchdog timeout in seconds. 1<= timeout <="
88 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
89 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
90
91static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
92module_param(pulse_width, uint, 0);
93MODULE_PARM_DESC(pulse_width,
94 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
95 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
96
97static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
98module_param(f71862fg_pin, uint, 0);
99MODULE_PARM_DESC(f71862fg_pin,
100 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
101 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
102
103static int nowayout = WATCHDOG_NOWAYOUT;
104module_param(nowayout, bool, 0444);
105MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
106
107static unsigned int start_withtimeout;
108module_param(start_withtimeout, uint, 0);
109MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
110 " given initial timeout. Zero (default) disables this feature.");
111
112enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
113
114static const char *f71808e_names[] = {
115 "f71808fg",
116 "f71858fg",
117 "f71862fg",
118 "f71869",
119 "f71882fg",
120 "f71889fg",
121};
122
123/* Super-I/O Function prototypes */
124static inline int superio_inb(int base, int reg);
125static inline int superio_inw(int base, int reg);
126static inline void superio_outb(int base, int reg, u8 val);
127static inline void superio_set_bit(int base, int reg, int bit);
128static inline void superio_clear_bit(int base, int reg, int bit);
129static inline int superio_enter(int base);
130static inline void superio_select(int base, int ld);
131static inline void superio_exit(int base);
132
133struct watchdog_data {
134 unsigned short sioaddr;
135 enum chips type;
136 unsigned long opened;
137 struct mutex lock;
138 char expect_close;
139 struct watchdog_info ident;
140
141 unsigned short timeout;
142 u8 timer_val; /* content for the wd_time register */
143 char minutes_mode;
144 u8 pulse_val; /* pulse width flag */
145 char pulse_mode; /* enable pulse output mode? */
146 char caused_reboot; /* last reboot was by the watchdog */
147};
148
149static struct watchdog_data watchdog = {
150 .lock = __MUTEX_INITIALIZER(watchdog.lock),
151};
152
153/* Super I/O functions */
154static inline int superio_inb(int base, int reg)
155{
156 outb(reg, base);
157 return inb(base + 1);
158}
159
160static int superio_inw(int base, int reg)
161{
162 int val;
163 val = superio_inb(base, reg) << 8;
164 val |= superio_inb(base, reg + 1);
165 return val;
166}
167
168static inline void superio_outb(int base, int reg, u8 val)
169{
170 outb(reg, base);
171 outb(val, base + 1);
172}
173
174static inline void superio_set_bit(int base, int reg, int bit)
175{
176 unsigned long val = superio_inb(base, reg);
177 __set_bit(bit, &val);
178 superio_outb(base, reg, val);
179}
180
181static inline void superio_clear_bit(int base, int reg, int bit)
182{
183 unsigned long val = superio_inb(base, reg);
184 __clear_bit(bit, &val);
185 superio_outb(base, reg, val);
186}
187
188static inline int superio_enter(int base)
189{
190 /* Don't step on other drivers' I/O space by accident */
191 if (!request_muxed_region(base, 2, DRVNAME)) {
192 printk(KERN_ERR DRVNAME ": I/O address 0x%04x already in use\n",
193 (int)base);
194 return -EBUSY;
195 }
196
197 /* according to the datasheet the key must be send twice! */
198 outb(SIO_UNLOCK_KEY, base);
199 outb(SIO_UNLOCK_KEY, base);
200
201 return 0;
202}
203
204static inline void superio_select(int base, int ld)
205{
206 outb(SIO_REG_LDSEL, base);
207 outb(ld, base + 1);
208}
209
210static inline void superio_exit(int base)
211{
212 outb(SIO_LOCK_KEY, base);
213 release_region(base, 2);
214}
215
216static int watchdog_set_timeout(int timeout)
217{
218 if (timeout <= 0
219 || timeout > max_timeout) {
220 printk(KERN_ERR DRVNAME ": watchdog timeout out of range\n");
221 return -EINVAL;
222 }
223
224 mutex_lock(&watchdog.lock);
225
226 watchdog.timeout = timeout;
227 if (timeout > 0xff) {
228 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
229 watchdog.minutes_mode = true;
230 } else {
231 watchdog.timer_val = timeout;
232 watchdog.minutes_mode = false;
233 }
234
235 mutex_unlock(&watchdog.lock);
236
237 return 0;
238}
239
240static int watchdog_set_pulse_width(unsigned int pw)
241{
242 int err = 0;
243
244 mutex_lock(&watchdog.lock);
245
246 if (pw <= 1) {
247 watchdog.pulse_val = 0;
248 } else if (pw <= 25) {
249 watchdog.pulse_val = 1;
250 } else if (pw <= 125) {
251 watchdog.pulse_val = 2;
252 } else if (pw <= 5000) {
253 watchdog.pulse_val = 3;
254 } else {
255 printk(KERN_ERR DRVNAME ": pulse width out of range\n");
256 err = -EINVAL;
257 goto exit_unlock;
258 }
259
260 watchdog.pulse_mode = pw;
261
262exit_unlock:
263 mutex_unlock(&watchdog.lock);
264 return err;
265}
266
267static int watchdog_keepalive(void)
268{
269 int err = 0;
270
271 mutex_lock(&watchdog.lock);
272 err = superio_enter(watchdog.sioaddr);
273 if (err)
274 goto exit_unlock;
275 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
276
277 if (watchdog.minutes_mode)
278 /* select minutes for timer units */
279 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
280 F71808FG_FLAG_WD_UNIT);
281 else
282 /* select seconds for timer units */
283 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
284 F71808FG_FLAG_WD_UNIT);
285
286 /* Set timer value */
287 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
288 watchdog.timer_val);
289
290 superio_exit(watchdog.sioaddr);
291
292exit_unlock:
293 mutex_unlock(&watchdog.lock);
294 return err;
295}
296
297static int f71862fg_pin_configure(unsigned short ioaddr)
298{
299 /* When ioaddr is non-zero the calling function has to take care of
300 mutex handling and superio preparation! */
301
302 if (f71862fg_pin == 63) {
303 if (ioaddr) {
304 /* SPI must be disabled first to use this pin! */
305 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
306 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
307 }
308 } else if (f71862fg_pin == 56) {
309 if (ioaddr)
310 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
311 } else {
312 printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",
313 f71862fg_pin);
314 return -EINVAL;
315 }
316 return 0;
317}
318
319static int watchdog_start(void)
320{
321 /* Make sure we don't die as soon as the watchdog is enabled below */
322 int err = watchdog_keepalive();
323 if (err)
324 return err;
325
326 mutex_lock(&watchdog.lock);
327 err = superio_enter(watchdog.sioaddr);
328 if (err)
329 goto exit_unlock;
330 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
331
332 /* Watchdog pin configuration */
333 switch (watchdog.type) {
334 case f71808fg:
335 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
336 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
337 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
338 break;
339
340 case f71862fg:
341 err = f71862fg_pin_configure(watchdog.sioaddr);
342 if (err)
343 goto exit_superio;
344 break;
345
346 case f71869:
347 /* GPIO14 --> WDTRST# */
348 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
349 break;
350
351 case f71882fg:
352 /* Set pin 56 to WDTRST# */
353 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
354 break;
355
356 case f71889fg:
357 /* set pin 40 to WDTRST# */
358 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
359 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
360 break;
361
362 default:
363 /*
364 * 'default' label to shut up the compiler and catch
365 * programmer errors
366 */
367 err = -ENODEV;
368 goto exit_superio;
369 }
370
371 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
372 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
373 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
374 F71808FG_FLAG_WDOUT_EN);
375
376 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
377 F71808FG_FLAG_WD_EN);
378
379 if (watchdog.pulse_mode) {
380 /* Select "pulse" output mode with given duration */
381 u8 wdt_conf = superio_inb(watchdog.sioaddr,
382 F71808FG_REG_WDT_CONF);
383
384 /* Set WD_PSWIDTH bits (1:0) */
385 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
386 /* Set WD_PULSE to "pulse" mode */
387 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
388
389 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
390 wdt_conf);
391 } else {
392 /* Select "level" output mode */
393 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
394 F71808FG_FLAG_WD_PULSE);
395 }
396
397exit_superio:
398 superio_exit(watchdog.sioaddr);
399exit_unlock:
400 mutex_unlock(&watchdog.lock);
401
402 return err;
403}
404
405static int watchdog_stop(void)
406{
407 int err = 0;
408
409 mutex_lock(&watchdog.lock);
410 err = superio_enter(watchdog.sioaddr);
411 if (err)
412 goto exit_unlock;
413 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
414
415 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
416 F71808FG_FLAG_WD_EN);
417
418 superio_exit(watchdog.sioaddr);
419
420exit_unlock:
421 mutex_unlock(&watchdog.lock);
422
423 return err;
424}
425
426static int watchdog_get_status(void)
427{
428 int status = 0;
429
430 mutex_lock(&watchdog.lock);
431 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
432 mutex_unlock(&watchdog.lock);
433
434 return status;
435}
436
437static bool watchdog_is_running(void)
438{
439 /*
440 * if we fail to determine the watchdog's status assume it to be
441 * running to be on the safe side
442 */
443 bool is_running = true;
444
445 mutex_lock(&watchdog.lock);
446 if (superio_enter(watchdog.sioaddr))
447 goto exit_unlock;
448 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
449
450 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
451 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
452 & F71808FG_FLAG_WD_EN);
453
454 superio_exit(watchdog.sioaddr);
455
456exit_unlock:
457 mutex_unlock(&watchdog.lock);
458 return is_running;
459}
460
461/* /dev/watchdog api */
462
463static int watchdog_open(struct inode *inode, struct file *file)
464{
465 int err;
466
467 /* If the watchdog is alive we don't need to start it again */
468 if (test_and_set_bit(0, &watchdog.opened))
469 return -EBUSY;
470
471 err = watchdog_start();
472 if (err) {
473 clear_bit(0, &watchdog.opened);
474 return err;
475 }
476
477 if (nowayout)
478 __module_get(THIS_MODULE);
479
480 watchdog.expect_close = 0;
481 return nonseekable_open(inode, file);
482}
483
484static int watchdog_release(struct inode *inode, struct file *file)
485{
486 clear_bit(0, &watchdog.opened);
487
488 if (!watchdog.expect_close) {
489 watchdog_keepalive();
490 printk(KERN_CRIT DRVNAME
491 ": Unexpected close, not stopping watchdog!\n");
492 } else if (!nowayout) {
493 watchdog_stop();
494 }
495 return 0;
496}
497
498/*
499 * watchdog_write:
500 * @file: file handle to the watchdog
501 * @buf: buffer to write
502 * @count: count of bytes
503 * @ppos: pointer to the position to write. No seeks allowed
504 *
505 * A write to a watchdog device is defined as a keepalive signal. Any
506 * write of data will do, as we we don't define content meaning.
507 */
508
509static ssize_t watchdog_write(struct file *file, const char __user *buf,
510 size_t count, loff_t *ppos)
511{
512 if (count) {
513 if (!nowayout) {
514 size_t i;
515
516 /* In case it was set long ago */
517 bool expect_close = false;
518
519 for (i = 0; i != count; i++) {
520 char c;
521 if (get_user(c, buf + i))
522 return -EFAULT;
523 expect_close = (c == 'V');
524 }
525
526 /* Properly order writes across fork()ed processes */
527 mutex_lock(&watchdog.lock);
528 watchdog.expect_close = expect_close;
529 mutex_unlock(&watchdog.lock);
530 }
531
532 /* someone wrote to us, we should restart timer */
533 watchdog_keepalive();
534 }
535 return count;
536}
537
538/*
539 * watchdog_ioctl:
540 * @inode: inode of the device
541 * @file: file handle to the device
542 * @cmd: watchdog command
543 * @arg: argument pointer
544 *
545 * The watchdog API defines a common set of functions for all watchdogs
546 * according to their available features.
547 */
548static long watchdog_ioctl(struct file *file, unsigned int cmd,
549 unsigned long arg)
550{
551 int status;
552 int new_options;
553 int new_timeout;
554 union {
555 struct watchdog_info __user *ident;
556 int __user *i;
557 } uarg;
558
559 uarg.i = (int __user *)arg;
560
561 switch (cmd) {
562 case WDIOC_GETSUPPORT:
563 return copy_to_user(uarg.ident, &watchdog.ident,
564 sizeof(watchdog.ident)) ? -EFAULT : 0;
565
566 case WDIOC_GETSTATUS:
567 status = watchdog_get_status();
568 if (status < 0)
569 return status;
570 return put_user(status, uarg.i);
571
572 case WDIOC_GETBOOTSTATUS:
573 return put_user(0, uarg.i);
574
575 case WDIOC_SETOPTIONS:
576 if (get_user(new_options, uarg.i))
577 return -EFAULT;
578
579 if (new_options & WDIOS_DISABLECARD)
580 watchdog_stop();
581
582 if (new_options & WDIOS_ENABLECARD)
583 return watchdog_start();
584
585
586 case WDIOC_KEEPALIVE:
587 watchdog_keepalive();
588 return 0;
589
590 case WDIOC_SETTIMEOUT:
591 if (get_user(new_timeout, uarg.i))
592 return -EFAULT;
593
594 if (watchdog_set_timeout(new_timeout))
595 return -EINVAL;
596
597 watchdog_keepalive();
598 /* Fall */
599
600 case WDIOC_GETTIMEOUT:
601 return put_user(watchdog.timeout, uarg.i);
602
603 default:
604 return -ENOTTY;
605
606 }
607}
608
609static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
610 void *unused)
611{
612 if (code == SYS_DOWN || code == SYS_HALT)
613 watchdog_stop();
614 return NOTIFY_DONE;
615}
616
617static const struct file_operations watchdog_fops = {
618 .owner = THIS_MODULE,
619 .llseek = no_llseek,
620 .open = watchdog_open,
621 .release = watchdog_release,
622 .write = watchdog_write,
623 .unlocked_ioctl = watchdog_ioctl,
624};
625
626static struct miscdevice watchdog_miscdev = {
627 .minor = WATCHDOG_MINOR,
628 .name = "watchdog",
629 .fops = &watchdog_fops,
630};
631
632static struct notifier_block watchdog_notifier = {
633 .notifier_call = watchdog_notify_sys,
634};
635
636static int __init watchdog_init(int sioaddr)
637{
638 int wdt_conf, err = 0;
639
640 /* No need to lock watchdog.lock here because no entry points
641 * into the module have been registered yet.
642 */
643 watchdog.sioaddr = sioaddr;
644 watchdog.ident.options = WDIOC_SETTIMEOUT
645 | WDIOF_MAGICCLOSE
646 | WDIOF_KEEPALIVEPING;
647
648 snprintf(watchdog.ident.identity,
649 sizeof(watchdog.ident.identity), "%s watchdog",
650 f71808e_names[watchdog.type]);
651
652 err = superio_enter(sioaddr);
653 if (err)
654 return err;
655 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
656
657 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
658 watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
659
660 superio_exit(sioaddr);
661
662 err = watchdog_set_timeout(timeout);
663 if (err)
664 return err;
665 err = watchdog_set_pulse_width(pulse_width);
666 if (err)
667 return err;
668
669 err = register_reboot_notifier(&watchdog_notifier);
670 if (err)
671 return err;
672
673 err = misc_register(&watchdog_miscdev);
674 if (err) {
675 printk(KERN_ERR DRVNAME
676 ": cannot register miscdev on minor=%d\n",
677 watchdog_miscdev.minor);
678 goto exit_reboot;
679 }
680
681 if (start_withtimeout) {
682 if (start_withtimeout <= 0
683 || start_withtimeout > max_timeout) {
684 printk(KERN_ERR DRVNAME
685 ": starting timeout out of range\n");
686 err = -EINVAL;
687 goto exit_miscdev;
688 }
689
690 err = watchdog_start();
691 if (err) {
692 printk(KERN_ERR DRVNAME
693 ": cannot start watchdog timer\n");
694 goto exit_miscdev;
695 }
696
697 mutex_lock(&watchdog.lock);
698 err = superio_enter(sioaddr);
699 if (err)
700 goto exit_unlock;
701 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
702
703 if (start_withtimeout > 0xff) {
704 /* select minutes for timer units */
705 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
706 F71808FG_FLAG_WD_UNIT);
707 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
708 DIV_ROUND_UP(start_withtimeout, 60));
709 } else {
710 /* select seconds for timer units */
711 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
712 F71808FG_FLAG_WD_UNIT);
713 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
714 start_withtimeout);
715 }
716
717 superio_exit(sioaddr);
718 mutex_unlock(&watchdog.lock);
719
720 if (nowayout)
721 __module_get(THIS_MODULE);
722
723 printk(KERN_INFO DRVNAME
724 ": watchdog started with initial timeout of %u sec\n",
725 start_withtimeout);
726 }
727
728 return 0;
729
730exit_unlock:
731 mutex_unlock(&watchdog.lock);
732exit_miscdev:
733 misc_deregister(&watchdog_miscdev);
734exit_reboot:
735 unregister_reboot_notifier(&watchdog_notifier);
736
737 return err;
738}
739
740static int __init f71808e_find(int sioaddr)
741{
742 u16 devid;
743 int err = superio_enter(sioaddr);
744 if (err)
745 return err;
746
747 devid = superio_inw(sioaddr, SIO_REG_MANID);
748 if (devid != SIO_FINTEK_ID) {
749 pr_debug(DRVNAME ": Not a Fintek device\n");
750 err = -ENODEV;
751 goto exit;
752 }
753
754 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
755 switch (devid) {
756 case SIO_F71808_ID:
757 watchdog.type = f71808fg;
758 break;
759 case SIO_F71862_ID:
760 watchdog.type = f71862fg;
761 err = f71862fg_pin_configure(0); /* validate module parameter */
762 break;
763 case SIO_F71869_ID:
764 watchdog.type = f71869;
765 break;
766 case SIO_F71882_ID:
767 watchdog.type = f71882fg;
768 break;
769 case SIO_F71889_ID:
770 watchdog.type = f71889fg;
771 break;
772 case SIO_F71858_ID:
773 /* Confirmed (by datasheet) not to have a watchdog. */
774 err = -ENODEV;
775 goto exit;
776 default:
777 printk(KERN_INFO DRVNAME ": Unrecognized Fintek device: %04x\n",
778 (unsigned int)devid);
779 err = -ENODEV;
780 goto exit;
781 }
782
783 printk(KERN_INFO DRVNAME ": Found %s watchdog chip, revision %d\n",
784 f71808e_names[watchdog.type],
785 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
786exit:
787 superio_exit(sioaddr);
788 return err;
789}
790
791static int __init f71808e_init(void)
792{
793 static const unsigned short addrs[] = { 0x2e, 0x4e };
794 int err = -ENODEV;
795 int i;
796
797 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
798 err = f71808e_find(addrs[i]);
799 if (err == 0)
800 break;
801 }
802 if (i == ARRAY_SIZE(addrs))
803 return err;
804
805 return watchdog_init(addrs[i]);
806}
807
808static void __exit f71808e_exit(void)
809{
810 if (watchdog_is_running()) {
811 printk(KERN_WARNING DRVNAME
812 ": Watchdog timer still running, stopping it\n");
813 watchdog_stop();
814 }
815 misc_deregister(&watchdog_miscdev);
816 unregister_reboot_notifier(&watchdog_notifier);
817}
818
819MODULE_DESCRIPTION("F71808E Watchdog Driver");
820MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
821MODULE_LICENSE("GPL");
822
823module_init(f71808e_init);
824module_exit(f71808e_exit);
1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/err.h>
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/io.h>
28#include <linux/ioport.h>
29#include <linux/miscdevice.h>
30#include <linux/module.h>
31#include <linux/mutex.h>
32#include <linux/notifier.h>
33#include <linux/reboot.h>
34#include <linux/uaccess.h>
35#include <linux/watchdog.h>
36
37#define DRVNAME "f71808e_wdt"
38
39#define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
42
43#define SIO_REG_LDSEL 0x07 /* Logical device select */
44#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45#define SIO_REG_DEVREV 0x22 /* Device revision */
46#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47#define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48#define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
49#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
50#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
51#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
52#define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */
53#define SIO_REG_ENABLE 0x30 /* Logical device enable */
54#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
55
56#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
57#define SIO_F71808_ID 0x0901 /* Chipset ID */
58#define SIO_F71858_ID 0x0507 /* Chipset ID */
59#define SIO_F71862_ID 0x0601 /* Chipset ID */
60#define SIO_F71868_ID 0x1106 /* Chipset ID */
61#define SIO_F71869_ID 0x0814 /* Chipset ID */
62#define SIO_F71869A_ID 0x1007 /* Chipset ID */
63#define SIO_F71882_ID 0x0541 /* Chipset ID */
64#define SIO_F71889_ID 0x0723 /* Chipset ID */
65#define SIO_F81865_ID 0x0704 /* Chipset ID */
66#define SIO_F81866_ID 0x1010 /* Chipset ID */
67
68#define F71808FG_REG_WDO_CONF 0xf0
69#define F71808FG_REG_WDT_CONF 0xf5
70#define F71808FG_REG_WD_TIME 0xf6
71
72#define F71808FG_FLAG_WDOUT_EN 7
73
74#define F71808FG_FLAG_WDTMOUT_STS 6
75#define F71808FG_FLAG_WD_EN 5
76#define F71808FG_FLAG_WD_PULSE 4
77#define F71808FG_FLAG_WD_UNIT 3
78
79#define F81865_REG_WDO_CONF 0xfa
80#define F81865_FLAG_WDOUT_EN 0
81
82/* Default values */
83#define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
84#define WATCHDOG_MAX_TIMEOUT (60 * 255)
85#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
86 watchdog signal */
87#define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
88 pin number 63 */
89
90static unsigned short force_id;
91module_param(force_id, ushort, 0);
92MODULE_PARM_DESC(force_id, "Override the detected device ID");
93
94static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
95static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
96module_param(timeout, int, 0);
97MODULE_PARM_DESC(timeout,
98 "Watchdog timeout in seconds. 1<= timeout <="
99 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
100 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
101
102static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
103module_param(pulse_width, uint, 0);
104MODULE_PARM_DESC(pulse_width,
105 "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
106 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
107
108static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
109module_param(f71862fg_pin, uint, 0);
110MODULE_PARM_DESC(f71862fg_pin,
111 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
112 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
113
114static bool nowayout = WATCHDOG_NOWAYOUT;
115module_param(nowayout, bool, 0444);
116MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
117
118static unsigned int start_withtimeout;
119module_param(start_withtimeout, uint, 0);
120MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
121 " given initial timeout. Zero (default) disables this feature.");
122
123enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
124 f81865, f81866};
125
126static const char *f71808e_names[] = {
127 "f71808fg",
128 "f71858fg",
129 "f71862fg",
130 "f71868",
131 "f71869",
132 "f71882fg",
133 "f71889fg",
134 "f81865",
135 "f81866",
136};
137
138/* Super-I/O Function prototypes */
139static inline int superio_inb(int base, int reg);
140static inline int superio_inw(int base, int reg);
141static inline void superio_outb(int base, int reg, u8 val);
142static inline void superio_set_bit(int base, int reg, int bit);
143static inline void superio_clear_bit(int base, int reg, int bit);
144static inline int superio_enter(int base);
145static inline void superio_select(int base, int ld);
146static inline void superio_exit(int base);
147
148struct watchdog_data {
149 unsigned short sioaddr;
150 enum chips type;
151 unsigned long opened;
152 struct mutex lock;
153 char expect_close;
154 struct watchdog_info ident;
155
156 unsigned short timeout;
157 u8 timer_val; /* content for the wd_time register */
158 char minutes_mode;
159 u8 pulse_val; /* pulse width flag */
160 char pulse_mode; /* enable pulse output mode? */
161 char caused_reboot; /* last reboot was by the watchdog */
162};
163
164static struct watchdog_data watchdog = {
165 .lock = __MUTEX_INITIALIZER(watchdog.lock),
166};
167
168/* Super I/O functions */
169static inline int superio_inb(int base, int reg)
170{
171 outb(reg, base);
172 return inb(base + 1);
173}
174
175static int superio_inw(int base, int reg)
176{
177 int val;
178 val = superio_inb(base, reg) << 8;
179 val |= superio_inb(base, reg + 1);
180 return val;
181}
182
183static inline void superio_outb(int base, int reg, u8 val)
184{
185 outb(reg, base);
186 outb(val, base + 1);
187}
188
189static inline void superio_set_bit(int base, int reg, int bit)
190{
191 unsigned long val = superio_inb(base, reg);
192 __set_bit(bit, &val);
193 superio_outb(base, reg, val);
194}
195
196static inline void superio_clear_bit(int base, int reg, int bit)
197{
198 unsigned long val = superio_inb(base, reg);
199 __clear_bit(bit, &val);
200 superio_outb(base, reg, val);
201}
202
203static inline int superio_enter(int base)
204{
205 /* Don't step on other drivers' I/O space by accident */
206 if (!request_muxed_region(base, 2, DRVNAME)) {
207 pr_err("I/O address 0x%04x already in use\n", (int)base);
208 return -EBUSY;
209 }
210
211 /* according to the datasheet the key must be sent twice! */
212 outb(SIO_UNLOCK_KEY, base);
213 outb(SIO_UNLOCK_KEY, base);
214
215 return 0;
216}
217
218static inline void superio_select(int base, int ld)
219{
220 outb(SIO_REG_LDSEL, base);
221 outb(ld, base + 1);
222}
223
224static inline void superio_exit(int base)
225{
226 outb(SIO_LOCK_KEY, base);
227 release_region(base, 2);
228}
229
230static int watchdog_set_timeout(int timeout)
231{
232 if (timeout <= 0
233 || timeout > max_timeout) {
234 pr_err("watchdog timeout out of range\n");
235 return -EINVAL;
236 }
237
238 mutex_lock(&watchdog.lock);
239
240 watchdog.timeout = timeout;
241 if (timeout > 0xff) {
242 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
243 watchdog.minutes_mode = true;
244 } else {
245 watchdog.timer_val = timeout;
246 watchdog.minutes_mode = false;
247 }
248
249 mutex_unlock(&watchdog.lock);
250
251 return 0;
252}
253
254static int watchdog_set_pulse_width(unsigned int pw)
255{
256 int err = 0;
257 unsigned int t1 = 25, t2 = 125, t3 = 5000;
258
259 if (watchdog.type == f71868) {
260 t1 = 30;
261 t2 = 150;
262 t3 = 6000;
263 }
264
265 mutex_lock(&watchdog.lock);
266
267 if (pw <= 1) {
268 watchdog.pulse_val = 0;
269 } else if (pw <= t1) {
270 watchdog.pulse_val = 1;
271 } else if (pw <= t2) {
272 watchdog.pulse_val = 2;
273 } else if (pw <= t3) {
274 watchdog.pulse_val = 3;
275 } else {
276 pr_err("pulse width out of range\n");
277 err = -EINVAL;
278 goto exit_unlock;
279 }
280
281 watchdog.pulse_mode = pw;
282
283exit_unlock:
284 mutex_unlock(&watchdog.lock);
285 return err;
286}
287
288static int watchdog_keepalive(void)
289{
290 int err = 0;
291
292 mutex_lock(&watchdog.lock);
293 err = superio_enter(watchdog.sioaddr);
294 if (err)
295 goto exit_unlock;
296 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
297
298 if (watchdog.minutes_mode)
299 /* select minutes for timer units */
300 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
301 F71808FG_FLAG_WD_UNIT);
302 else
303 /* select seconds for timer units */
304 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
305 F71808FG_FLAG_WD_UNIT);
306
307 /* Set timer value */
308 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
309 watchdog.timer_val);
310
311 superio_exit(watchdog.sioaddr);
312
313exit_unlock:
314 mutex_unlock(&watchdog.lock);
315 return err;
316}
317
318static int f71862fg_pin_configure(unsigned short ioaddr)
319{
320 /* When ioaddr is non-zero the calling function has to take care of
321 mutex handling and superio preparation! */
322
323 if (f71862fg_pin == 63) {
324 if (ioaddr) {
325 /* SPI must be disabled first to use this pin! */
326 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
327 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
328 }
329 } else if (f71862fg_pin == 56) {
330 if (ioaddr)
331 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
332 } else {
333 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
334 return -EINVAL;
335 }
336 return 0;
337}
338
339static int watchdog_start(void)
340{
341 /* Make sure we don't die as soon as the watchdog is enabled below */
342 int err = watchdog_keepalive();
343 if (err)
344 return err;
345
346 mutex_lock(&watchdog.lock);
347 err = superio_enter(watchdog.sioaddr);
348 if (err)
349 goto exit_unlock;
350 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
351
352 /* Watchdog pin configuration */
353 switch (watchdog.type) {
354 case f71808fg:
355 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
356 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
357 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
358 break;
359
360 case f71862fg:
361 err = f71862fg_pin_configure(watchdog.sioaddr);
362 if (err)
363 goto exit_superio;
364 break;
365
366 case f71868:
367 case f71869:
368 /* GPIO14 --> WDTRST# */
369 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
370 break;
371
372 case f71882fg:
373 /* Set pin 56 to WDTRST# */
374 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
375 break;
376
377 case f71889fg:
378 /* set pin 40 to WDTRST# */
379 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
380 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
381 break;
382
383 case f81865:
384 /* Set pin 70 to WDTRST# */
385 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
386 break;
387
388 case f81866:
389 /* Set pin 70 to WDTRST# */
390 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
391 BIT(3) | BIT(0));
392 superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
393 BIT(2));
394 /*
395 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
396 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
397 * BIT5: 0 -> WDTRST#
398 * 1 -> GPIO15
399 */
400 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1,
401 BIT(5));
402 break;
403
404 default:
405 /*
406 * 'default' label to shut up the compiler and catch
407 * programmer errors
408 */
409 err = -ENODEV;
410 goto exit_superio;
411 }
412
413 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
414 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
415
416 if (watchdog.type == f81865 || watchdog.type == f81866)
417 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
418 F81865_FLAG_WDOUT_EN);
419 else
420 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
421 F71808FG_FLAG_WDOUT_EN);
422
423 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
424 F71808FG_FLAG_WD_EN);
425
426 if (watchdog.pulse_mode) {
427 /* Select "pulse" output mode with given duration */
428 u8 wdt_conf = superio_inb(watchdog.sioaddr,
429 F71808FG_REG_WDT_CONF);
430
431 /* Set WD_PSWIDTH bits (1:0) */
432 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
433 /* Set WD_PULSE to "pulse" mode */
434 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
435
436 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
437 wdt_conf);
438 } else {
439 /* Select "level" output mode */
440 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
441 F71808FG_FLAG_WD_PULSE);
442 }
443
444exit_superio:
445 superio_exit(watchdog.sioaddr);
446exit_unlock:
447 mutex_unlock(&watchdog.lock);
448
449 return err;
450}
451
452static int watchdog_stop(void)
453{
454 int err = 0;
455
456 mutex_lock(&watchdog.lock);
457 err = superio_enter(watchdog.sioaddr);
458 if (err)
459 goto exit_unlock;
460 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
461
462 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
463 F71808FG_FLAG_WD_EN);
464
465 superio_exit(watchdog.sioaddr);
466
467exit_unlock:
468 mutex_unlock(&watchdog.lock);
469
470 return err;
471}
472
473static int watchdog_get_status(void)
474{
475 int status = 0;
476
477 mutex_lock(&watchdog.lock);
478 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
479 mutex_unlock(&watchdog.lock);
480
481 return status;
482}
483
484static bool watchdog_is_running(void)
485{
486 /*
487 * if we fail to determine the watchdog's status assume it to be
488 * running to be on the safe side
489 */
490 bool is_running = true;
491
492 mutex_lock(&watchdog.lock);
493 if (superio_enter(watchdog.sioaddr))
494 goto exit_unlock;
495 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
496
497 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
498 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
499 & BIT(F71808FG_FLAG_WD_EN));
500
501 superio_exit(watchdog.sioaddr);
502
503exit_unlock:
504 mutex_unlock(&watchdog.lock);
505 return is_running;
506}
507
508/* /dev/watchdog api */
509
510static int watchdog_open(struct inode *inode, struct file *file)
511{
512 int err;
513
514 /* If the watchdog is alive we don't need to start it again */
515 if (test_and_set_bit(0, &watchdog.opened))
516 return -EBUSY;
517
518 err = watchdog_start();
519 if (err) {
520 clear_bit(0, &watchdog.opened);
521 return err;
522 }
523
524 if (nowayout)
525 __module_get(THIS_MODULE);
526
527 watchdog.expect_close = 0;
528 return nonseekable_open(inode, file);
529}
530
531static int watchdog_release(struct inode *inode, struct file *file)
532{
533 clear_bit(0, &watchdog.opened);
534
535 if (!watchdog.expect_close) {
536 watchdog_keepalive();
537 pr_crit("Unexpected close, not stopping watchdog!\n");
538 } else if (!nowayout) {
539 watchdog_stop();
540 }
541 return 0;
542}
543
544/*
545 * watchdog_write:
546 * @file: file handle to the watchdog
547 * @buf: buffer to write
548 * @count: count of bytes
549 * @ppos: pointer to the position to write. No seeks allowed
550 *
551 * A write to a watchdog device is defined as a keepalive signal. Any
552 * write of data will do, as we we don't define content meaning.
553 */
554
555static ssize_t watchdog_write(struct file *file, const char __user *buf,
556 size_t count, loff_t *ppos)
557{
558 if (count) {
559 if (!nowayout) {
560 size_t i;
561
562 /* In case it was set long ago */
563 bool expect_close = false;
564
565 for (i = 0; i != count; i++) {
566 char c;
567 if (get_user(c, buf + i))
568 return -EFAULT;
569 if (c == 'V')
570 expect_close = true;
571 }
572
573 /* Properly order writes across fork()ed processes */
574 mutex_lock(&watchdog.lock);
575 watchdog.expect_close = expect_close;
576 mutex_unlock(&watchdog.lock);
577 }
578
579 /* someone wrote to us, we should restart timer */
580 watchdog_keepalive();
581 }
582 return count;
583}
584
585/*
586 * watchdog_ioctl:
587 * @inode: inode of the device
588 * @file: file handle to the device
589 * @cmd: watchdog command
590 * @arg: argument pointer
591 *
592 * The watchdog API defines a common set of functions for all watchdogs
593 * according to their available features.
594 */
595static long watchdog_ioctl(struct file *file, unsigned int cmd,
596 unsigned long arg)
597{
598 int status;
599 int new_options;
600 int new_timeout;
601 union {
602 struct watchdog_info __user *ident;
603 int __user *i;
604 } uarg;
605
606 uarg.i = (int __user *)arg;
607
608 switch (cmd) {
609 case WDIOC_GETSUPPORT:
610 return copy_to_user(uarg.ident, &watchdog.ident,
611 sizeof(watchdog.ident)) ? -EFAULT : 0;
612
613 case WDIOC_GETSTATUS:
614 status = watchdog_get_status();
615 if (status < 0)
616 return status;
617 return put_user(status, uarg.i);
618
619 case WDIOC_GETBOOTSTATUS:
620 return put_user(0, uarg.i);
621
622 case WDIOC_SETOPTIONS:
623 if (get_user(new_options, uarg.i))
624 return -EFAULT;
625
626 if (new_options & WDIOS_DISABLECARD)
627 watchdog_stop();
628
629 if (new_options & WDIOS_ENABLECARD)
630 return watchdog_start();
631 /* fall through */
632
633 case WDIOC_KEEPALIVE:
634 watchdog_keepalive();
635 return 0;
636
637 case WDIOC_SETTIMEOUT:
638 if (get_user(new_timeout, uarg.i))
639 return -EFAULT;
640
641 if (watchdog_set_timeout(new_timeout))
642 return -EINVAL;
643
644 watchdog_keepalive();
645 /* fall through */
646
647 case WDIOC_GETTIMEOUT:
648 return put_user(watchdog.timeout, uarg.i);
649
650 default:
651 return -ENOTTY;
652
653 }
654}
655
656static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
657 void *unused)
658{
659 if (code == SYS_DOWN || code == SYS_HALT)
660 watchdog_stop();
661 return NOTIFY_DONE;
662}
663
664static const struct file_operations watchdog_fops = {
665 .owner = THIS_MODULE,
666 .llseek = no_llseek,
667 .open = watchdog_open,
668 .release = watchdog_release,
669 .write = watchdog_write,
670 .unlocked_ioctl = watchdog_ioctl,
671};
672
673static struct miscdevice watchdog_miscdev = {
674 .minor = WATCHDOG_MINOR,
675 .name = "watchdog",
676 .fops = &watchdog_fops,
677};
678
679static struct notifier_block watchdog_notifier = {
680 .notifier_call = watchdog_notify_sys,
681};
682
683static int __init watchdog_init(int sioaddr)
684{
685 int wdt_conf, err = 0;
686
687 /* No need to lock watchdog.lock here because no entry points
688 * into the module have been registered yet.
689 */
690 watchdog.sioaddr = sioaddr;
691 watchdog.ident.options = WDIOC_SETTIMEOUT
692 | WDIOF_MAGICCLOSE
693 | WDIOF_KEEPALIVEPING;
694
695 snprintf(watchdog.ident.identity,
696 sizeof(watchdog.ident.identity), "%s watchdog",
697 f71808e_names[watchdog.type]);
698
699 err = superio_enter(sioaddr);
700 if (err)
701 return err;
702 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
703
704 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
705 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
706
707 superio_exit(sioaddr);
708
709 err = watchdog_set_timeout(timeout);
710 if (err)
711 return err;
712 err = watchdog_set_pulse_width(pulse_width);
713 if (err)
714 return err;
715
716 err = register_reboot_notifier(&watchdog_notifier);
717 if (err)
718 return err;
719
720 err = misc_register(&watchdog_miscdev);
721 if (err) {
722 pr_err("cannot register miscdev on minor=%d\n",
723 watchdog_miscdev.minor);
724 goto exit_reboot;
725 }
726
727 if (start_withtimeout) {
728 if (start_withtimeout <= 0
729 || start_withtimeout > max_timeout) {
730 pr_err("starting timeout out of range\n");
731 err = -EINVAL;
732 goto exit_miscdev;
733 }
734
735 err = watchdog_start();
736 if (err) {
737 pr_err("cannot start watchdog timer\n");
738 goto exit_miscdev;
739 }
740
741 mutex_lock(&watchdog.lock);
742 err = superio_enter(sioaddr);
743 if (err)
744 goto exit_unlock;
745 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
746
747 if (start_withtimeout > 0xff) {
748 /* select minutes for timer units */
749 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
750 F71808FG_FLAG_WD_UNIT);
751 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
752 DIV_ROUND_UP(start_withtimeout, 60));
753 } else {
754 /* select seconds for timer units */
755 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
756 F71808FG_FLAG_WD_UNIT);
757 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
758 start_withtimeout);
759 }
760
761 superio_exit(sioaddr);
762 mutex_unlock(&watchdog.lock);
763
764 if (nowayout)
765 __module_get(THIS_MODULE);
766
767 pr_info("watchdog started with initial timeout of %u sec\n",
768 start_withtimeout);
769 }
770
771 return 0;
772
773exit_unlock:
774 mutex_unlock(&watchdog.lock);
775exit_miscdev:
776 misc_deregister(&watchdog_miscdev);
777exit_reboot:
778 unregister_reboot_notifier(&watchdog_notifier);
779
780 return err;
781}
782
783static int __init f71808e_find(int sioaddr)
784{
785 u16 devid;
786 int err = superio_enter(sioaddr);
787 if (err)
788 return err;
789
790 devid = superio_inw(sioaddr, SIO_REG_MANID);
791 if (devid != SIO_FINTEK_ID) {
792 pr_debug("Not a Fintek device\n");
793 err = -ENODEV;
794 goto exit;
795 }
796
797 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
798 switch (devid) {
799 case SIO_F71808_ID:
800 watchdog.type = f71808fg;
801 break;
802 case SIO_F71862_ID:
803 watchdog.type = f71862fg;
804 err = f71862fg_pin_configure(0); /* validate module parameter */
805 break;
806 case SIO_F71868_ID:
807 watchdog.type = f71868;
808 break;
809 case SIO_F71869_ID:
810 case SIO_F71869A_ID:
811 watchdog.type = f71869;
812 break;
813 case SIO_F71882_ID:
814 watchdog.type = f71882fg;
815 break;
816 case SIO_F71889_ID:
817 watchdog.type = f71889fg;
818 break;
819 case SIO_F71858_ID:
820 /* Confirmed (by datasheet) not to have a watchdog. */
821 err = -ENODEV;
822 goto exit;
823 case SIO_F81865_ID:
824 watchdog.type = f81865;
825 break;
826 case SIO_F81866_ID:
827 watchdog.type = f81866;
828 break;
829 default:
830 pr_info("Unrecognized Fintek device: %04x\n",
831 (unsigned int)devid);
832 err = -ENODEV;
833 goto exit;
834 }
835
836 pr_info("Found %s watchdog chip, revision %d\n",
837 f71808e_names[watchdog.type],
838 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
839exit:
840 superio_exit(sioaddr);
841 return err;
842}
843
844static int __init f71808e_init(void)
845{
846 static const unsigned short addrs[] = { 0x2e, 0x4e };
847 int err = -ENODEV;
848 int i;
849
850 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
851 err = f71808e_find(addrs[i]);
852 if (err == 0)
853 break;
854 }
855 if (i == ARRAY_SIZE(addrs))
856 return err;
857
858 return watchdog_init(addrs[i]);
859}
860
861static void __exit f71808e_exit(void)
862{
863 if (watchdog_is_running()) {
864 pr_warn("Watchdog timer still running, stopping it\n");
865 watchdog_stop();
866 }
867 misc_deregister(&watchdog_miscdev);
868 unregister_reboot_notifier(&watchdog_notifier);
869}
870
871MODULE_DESCRIPTION("F71808E Watchdog Driver");
872MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
873MODULE_LICENSE("GPL");
874
875module_init(f71808e_init);
876module_exit(f71808e_exit);