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1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include "smsc75xx.h"
33
34#define SMSC_CHIPNAME "smsc75xx"
35#define SMSC_DRIVER_VERSION "1.0.0"
36#define HS_USB_PKT_SIZE (512)
37#define FS_USB_PKT_SIZE (64)
38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40#define DEFAULT_BULK_IN_DELAY (0x00002000)
41#define MAX_SINGLE_PACKET_SIZE (9000)
42#define LAN75XX_EEPROM_MAGIC (0x7500)
43#define EEPROM_MAC_OFFSET (0x01)
44#define DEFAULT_TX_CSUM_ENABLE (true)
45#define DEFAULT_RX_CSUM_ENABLE (true)
46#define DEFAULT_TSO_ENABLE (true)
47#define SMSC75XX_INTERNAL_PHY_ID (1)
48#define SMSC75XX_TX_OVERHEAD (8)
49#define MAX_RX_FIFO_SIZE (20 * 1024)
50#define MAX_TX_FIFO_SIZE (12 * 1024)
51#define USB_VENDOR_ID_SMSC (0x0424)
52#define USB_PRODUCT_ID_LAN7500 (0x7500)
53#define USB_PRODUCT_ID_LAN7505 (0x7505)
54
55#define check_warn(ret, fmt, args...) \
56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
57
58#define check_warn_return(ret, fmt, args...) \
59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
60
61#define check_warn_goto_done(ret, fmt, args...) \
62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
63
64struct smsc75xx_priv {
65 struct usbnet *dev;
66 u32 rfe_ctl;
67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
68 struct mutex dataport_mutex;
69 spinlock_t rfe_ctl_lock;
70 struct work_struct set_multicast;
71};
72
73struct usb_context {
74 struct usb_ctrlrequest req;
75 struct usbnet *dev;
76};
77
78static int turbo_mode = true;
79module_param(turbo_mode, bool, 0644);
80MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
81
82static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
83 u32 *data)
84{
85 u32 *buf = kmalloc(4, GFP_KERNEL);
86 int ret;
87
88 BUG_ON(!dev);
89
90 if (!buf)
91 return -ENOMEM;
92
93 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
94 USB_VENDOR_REQUEST_READ_REGISTER,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
97
98 if (unlikely(ret < 0))
99 netdev_warn(dev->net,
100 "Failed to read register index 0x%08x", index);
101
102 le32_to_cpus(buf);
103 *data = *buf;
104 kfree(buf);
105
106 return ret;
107}
108
109static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
110 u32 data)
111{
112 u32 *buf = kmalloc(4, GFP_KERNEL);
113 int ret;
114
115 BUG_ON(!dev);
116
117 if (!buf)
118 return -ENOMEM;
119
120 *buf = data;
121 cpu_to_le32s(buf);
122
123 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
124 USB_VENDOR_REQUEST_WRITE_REGISTER,
125 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
126 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
127
128 if (unlikely(ret < 0))
129 netdev_warn(dev->net,
130 "Failed to write register index 0x%08x", index);
131
132 kfree(buf);
133
134 return ret;
135}
136
137/* Loop until the read is completed with timeout
138 * called with phy_mutex held */
139static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
140{
141 unsigned long start_time = jiffies;
142 u32 val;
143 int ret;
144
145 do {
146 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
147 check_warn_return(ret, "Error reading MII_ACCESS");
148
149 if (!(val & MII_ACCESS_BUSY))
150 return 0;
151 } while (!time_after(jiffies, start_time + HZ));
152
153 return -EIO;
154}
155
156static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
157{
158 struct usbnet *dev = netdev_priv(netdev);
159 u32 val, addr;
160 int ret;
161
162 mutex_lock(&dev->phy_mutex);
163
164 /* confirm MII not busy */
165 ret = smsc75xx_phy_wait_not_busy(dev);
166 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
167
168 /* set the address, index & direction (read from PHY) */
169 phy_id &= dev->mii.phy_id_mask;
170 idx &= dev->mii.reg_num_mask;
171 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
172 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
173 | MII_ACCESS_READ;
174 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
175 check_warn_goto_done(ret, "Error writing MII_ACCESS");
176
177 ret = smsc75xx_phy_wait_not_busy(dev);
178 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
179
180 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
181 check_warn_goto_done(ret, "Error reading MII_DATA");
182
183 ret = (u16)(val & 0xFFFF);
184
185done:
186 mutex_unlock(&dev->phy_mutex);
187 return ret;
188}
189
190static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
191 int regval)
192{
193 struct usbnet *dev = netdev_priv(netdev);
194 u32 val, addr;
195 int ret;
196
197 mutex_lock(&dev->phy_mutex);
198
199 /* confirm MII not busy */
200 ret = smsc75xx_phy_wait_not_busy(dev);
201 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
202
203 val = regval;
204 ret = smsc75xx_write_reg(dev, MII_DATA, val);
205 check_warn_goto_done(ret, "Error writing MII_DATA");
206
207 /* set the address, index & direction (write to PHY) */
208 phy_id &= dev->mii.phy_id_mask;
209 idx &= dev->mii.reg_num_mask;
210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
212 | MII_ACCESS_WRITE;
213 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
214 check_warn_goto_done(ret, "Error writing MII_ACCESS");
215
216 ret = smsc75xx_phy_wait_not_busy(dev);
217 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
218
219done:
220 mutex_unlock(&dev->phy_mutex);
221}
222
223static int smsc75xx_wait_eeprom(struct usbnet *dev)
224{
225 unsigned long start_time = jiffies;
226 u32 val;
227 int ret;
228
229 do {
230 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
231 check_warn_return(ret, "Error reading E2P_CMD");
232
233 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
234 break;
235 udelay(40);
236 } while (!time_after(jiffies, start_time + HZ));
237
238 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
239 netdev_warn(dev->net, "EEPROM read operation timeout");
240 return -EIO;
241 }
242
243 return 0;
244}
245
246static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
247{
248 unsigned long start_time = jiffies;
249 u32 val;
250 int ret;
251
252 do {
253 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
254 check_warn_return(ret, "Error reading E2P_CMD");
255
256 if (!(val & E2P_CMD_BUSY))
257 return 0;
258
259 udelay(40);
260 } while (!time_after(jiffies, start_time + HZ));
261
262 netdev_warn(dev->net, "EEPROM is busy");
263 return -EIO;
264}
265
266static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
267 u8 *data)
268{
269 u32 val;
270 int i, ret;
271
272 BUG_ON(!dev);
273 BUG_ON(!data);
274
275 ret = smsc75xx_eeprom_confirm_not_busy(dev);
276 if (ret)
277 return ret;
278
279 for (i = 0; i < length; i++) {
280 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
281 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
282 check_warn_return(ret, "Error writing E2P_CMD");
283
284 ret = smsc75xx_wait_eeprom(dev);
285 if (ret < 0)
286 return ret;
287
288 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
289 check_warn_return(ret, "Error reading E2P_DATA");
290
291 data[i] = val & 0xFF;
292 offset++;
293 }
294
295 return 0;
296}
297
298static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
299 u8 *data)
300{
301 u32 val;
302 int i, ret;
303
304 BUG_ON(!dev);
305 BUG_ON(!data);
306
307 ret = smsc75xx_eeprom_confirm_not_busy(dev);
308 if (ret)
309 return ret;
310
311 /* Issue write/erase enable command */
312 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
313 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
314 check_warn_return(ret, "Error writing E2P_CMD");
315
316 ret = smsc75xx_wait_eeprom(dev);
317 if (ret < 0)
318 return ret;
319
320 for (i = 0; i < length; i++) {
321
322 /* Fill data register */
323 val = data[i];
324 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
325 check_warn_return(ret, "Error writing E2P_DATA");
326
327 /* Send "write" command */
328 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
329 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
330 check_warn_return(ret, "Error writing E2P_CMD");
331
332 ret = smsc75xx_wait_eeprom(dev);
333 if (ret < 0)
334 return ret;
335
336 offset++;
337 }
338
339 return 0;
340}
341
342static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
343{
344 int i, ret;
345
346 for (i = 0; i < 100; i++) {
347 u32 dp_sel;
348 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
349 check_warn_return(ret, "Error reading DP_SEL");
350
351 if (dp_sel & DP_SEL_DPRDY)
352 return 0;
353
354 udelay(40);
355 }
356
357 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
358
359 return -EIO;
360}
361
362static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
363 u32 length, u32 *buf)
364{
365 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
366 u32 dp_sel;
367 int i, ret;
368
369 mutex_lock(&pdata->dataport_mutex);
370
371 ret = smsc75xx_dataport_wait_not_busy(dev);
372 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
373
374 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
375 check_warn_goto_done(ret, "Error reading DP_SEL");
376
377 dp_sel &= ~DP_SEL_RSEL;
378 dp_sel |= ram_select;
379 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
380 check_warn_goto_done(ret, "Error writing DP_SEL");
381
382 for (i = 0; i < length; i++) {
383 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
384 check_warn_goto_done(ret, "Error writing DP_ADDR");
385
386 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
387 check_warn_goto_done(ret, "Error writing DP_DATA");
388
389 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
390 check_warn_goto_done(ret, "Error writing DP_CMD");
391
392 ret = smsc75xx_dataport_wait_not_busy(dev);
393 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
394 }
395
396done:
397 mutex_unlock(&pdata->dataport_mutex);
398 return ret;
399}
400
401/* returns hash bit number for given MAC address */
402static u32 smsc75xx_hash(char addr[ETH_ALEN])
403{
404 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
405}
406
407static void smsc75xx_deferred_multicast_write(struct work_struct *param)
408{
409 struct smsc75xx_priv *pdata =
410 container_of(param, struct smsc75xx_priv, set_multicast);
411 struct usbnet *dev = pdata->dev;
412 int ret;
413
414 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
415 pdata->rfe_ctl);
416
417 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
418 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
419
420 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
421 check_warn(ret, "Error writing RFE_CRL");
422}
423
424static void smsc75xx_set_multicast(struct net_device *netdev)
425{
426 struct usbnet *dev = netdev_priv(netdev);
427 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
428 unsigned long flags;
429 int i;
430
431 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
432
433 pdata->rfe_ctl &=
434 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
435 pdata->rfe_ctl |= RFE_CTL_AB;
436
437 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
438 pdata->multicast_hash_table[i] = 0;
439
440 if (dev->net->flags & IFF_PROMISC) {
441 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
442 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
443 } else if (dev->net->flags & IFF_ALLMULTI) {
444 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
445 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
446 } else if (!netdev_mc_empty(dev->net)) {
447 struct netdev_hw_addr *ha;
448
449 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
450
451 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
452
453 netdev_for_each_mc_addr(ha, netdev) {
454 u32 bitnum = smsc75xx_hash(ha->addr);
455 pdata->multicast_hash_table[bitnum / 32] |=
456 (1 << (bitnum % 32));
457 }
458 } else {
459 netif_dbg(dev, drv, dev->net, "receive own packets only");
460 pdata->rfe_ctl |= RFE_CTL_DPF;
461 }
462
463 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
464
465 /* defer register writes to a sleepable context */
466 schedule_work(&pdata->set_multicast);
467}
468
469static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
470 u16 lcladv, u16 rmtadv)
471{
472 u32 flow = 0, fct_flow = 0;
473 int ret;
474
475 if (duplex == DUPLEX_FULL) {
476 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
477
478 if (cap & FLOW_CTRL_TX) {
479 flow = (FLOW_TX_FCEN | 0xFFFF);
480 /* set fct_flow thresholds to 20% and 80% */
481 fct_flow = (8 << 8) | 32;
482 }
483
484 if (cap & FLOW_CTRL_RX)
485 flow |= FLOW_RX_FCEN;
486
487 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
488 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
489 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
490 } else {
491 netif_dbg(dev, link, dev->net, "half duplex");
492 }
493
494 ret = smsc75xx_write_reg(dev, FLOW, flow);
495 check_warn_return(ret, "Error writing FLOW");
496
497 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
498 check_warn_return(ret, "Error writing FCT_FLOW");
499
500 return 0;
501}
502
503static int smsc75xx_link_reset(struct usbnet *dev)
504{
505 struct mii_if_info *mii = &dev->mii;
506 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
507 u16 lcladv, rmtadv;
508 int ret;
509
510 /* clear interrupt status */
511 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
512 check_warn_return(ret, "Error reading PHY_INT_SRC");
513
514 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
515 check_warn_return(ret, "Error writing INT_STS");
516
517 mii_check_media(mii, 1, 1);
518 mii_ethtool_gset(&dev->mii, &ecmd);
519 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
520 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
521
522 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
523 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
524 ecmd.duplex, lcladv, rmtadv);
525
526 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
527}
528
529static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
530{
531 u32 intdata;
532
533 if (urb->actual_length != 4) {
534 netdev_warn(dev->net,
535 "unexpected urb length %d", urb->actual_length);
536 return;
537 }
538
539 memcpy(&intdata, urb->transfer_buffer, 4);
540 le32_to_cpus(&intdata);
541
542 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
543
544 if (intdata & INT_ENP_PHY_INT)
545 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
546 else
547 netdev_warn(dev->net,
548 "unexpected interrupt, intdata=0x%08X", intdata);
549}
550
551static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
552{
553 return MAX_EEPROM_SIZE;
554}
555
556static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
557 struct ethtool_eeprom *ee, u8 *data)
558{
559 struct usbnet *dev = netdev_priv(netdev);
560
561 ee->magic = LAN75XX_EEPROM_MAGIC;
562
563 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
564}
565
566static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
567 struct ethtool_eeprom *ee, u8 *data)
568{
569 struct usbnet *dev = netdev_priv(netdev);
570
571 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
572 netdev_warn(dev->net,
573 "EEPROM: magic value mismatch: 0x%x", ee->magic);
574 return -EINVAL;
575 }
576
577 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
578}
579
580static const struct ethtool_ops smsc75xx_ethtool_ops = {
581 .get_link = usbnet_get_link,
582 .nway_reset = usbnet_nway_reset,
583 .get_drvinfo = usbnet_get_drvinfo,
584 .get_msglevel = usbnet_get_msglevel,
585 .set_msglevel = usbnet_set_msglevel,
586 .get_settings = usbnet_get_settings,
587 .set_settings = usbnet_set_settings,
588 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
589 .get_eeprom = smsc75xx_ethtool_get_eeprom,
590 .set_eeprom = smsc75xx_ethtool_set_eeprom,
591};
592
593static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
594{
595 struct usbnet *dev = netdev_priv(netdev);
596
597 if (!netif_running(netdev))
598 return -EINVAL;
599
600 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
601}
602
603static void smsc75xx_init_mac_address(struct usbnet *dev)
604{
605 /* try reading mac address from EEPROM */
606 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
607 dev->net->dev_addr) == 0) {
608 if (is_valid_ether_addr(dev->net->dev_addr)) {
609 /* eeprom values are valid so use them */
610 netif_dbg(dev, ifup, dev->net,
611 "MAC address read from EEPROM");
612 return;
613 }
614 }
615
616 /* no eeprom, or eeprom values are invalid. generate random MAC */
617 random_ether_addr(dev->net->dev_addr);
618 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr");
619}
620
621static int smsc75xx_set_mac_address(struct usbnet *dev)
622{
623 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
624 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
625 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
626
627 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
628 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
629
630 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
631 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
632
633 addr_hi |= ADDR_FILTX_FB_VALID;
634 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
635 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
636
637 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
638 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
639
640 return 0;
641}
642
643static int smsc75xx_phy_initialize(struct usbnet *dev)
644{
645 int bmcr, timeout = 0;
646
647 /* Initialize MII structure */
648 dev->mii.dev = dev->net;
649 dev->mii.mdio_read = smsc75xx_mdio_read;
650 dev->mii.mdio_write = smsc75xx_mdio_write;
651 dev->mii.phy_id_mask = 0x1f;
652 dev->mii.reg_num_mask = 0x1f;
653 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
654
655 /* reset phy and wait for reset to complete */
656 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
657
658 do {
659 msleep(10);
660 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
661 check_warn_return(bmcr, "Error reading MII_BMCR");
662 timeout++;
663 } while ((bmcr & MII_BMCR) && (timeout < 100));
664
665 if (timeout >= 100) {
666 netdev_warn(dev->net, "timeout on PHY Reset");
667 return -EIO;
668 }
669
670 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
671 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
672 ADVERTISE_PAUSE_ASYM);
673
674 /* read to clear */
675 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
676 check_warn_return(bmcr, "Error reading PHY_INT_SRC");
677
678 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
679 PHY_INT_MASK_DEFAULT);
680 mii_nway_restart(&dev->mii);
681
682 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
683 return 0;
684}
685
686static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
687{
688 int ret = 0;
689 u32 buf;
690 bool rxenabled;
691
692 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
693 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
694
695 rxenabled = ((buf & MAC_RX_RXEN) != 0);
696
697 if (rxenabled) {
698 buf &= ~MAC_RX_RXEN;
699 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
700 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
701 }
702
703 /* add 4 to size for FCS */
704 buf &= ~MAC_RX_MAX_SIZE;
705 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
706
707 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
708 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
709
710 if (rxenabled) {
711 buf |= MAC_RX_RXEN;
712 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
714 }
715
716 return 0;
717}
718
719static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
720{
721 struct usbnet *dev = netdev_priv(netdev);
722
723 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
724 check_warn_return(ret, "Failed to set mac rx frame length");
725
726 return usbnet_change_mtu(netdev, new_mtu);
727}
728
729/* Enable or disable Rx checksum offload engine */
730static int smsc75xx_set_features(struct net_device *netdev, u32 features)
731{
732 struct usbnet *dev = netdev_priv(netdev);
733 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
734 unsigned long flags;
735 int ret;
736
737 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
738
739 if (features & NETIF_F_RXCSUM)
740 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
741 else
742 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
743
744 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
745 /* it's racing here! */
746
747 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
748 check_warn_return(ret, "Error writing RFE_CTL");
749
750 return 0;
751}
752
753static int smsc75xx_reset(struct usbnet *dev)
754{
755 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
756 u32 buf;
757 int ret = 0, timeout;
758
759 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
760
761 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
762 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
763
764 buf |= HW_CFG_LRST;
765
766 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
767 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
768
769 timeout = 0;
770 do {
771 msleep(10);
772 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
773 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
774 timeout++;
775 } while ((buf & HW_CFG_LRST) && (timeout < 100));
776
777 if (timeout >= 100) {
778 netdev_warn(dev->net, "timeout on completion of Lite Reset");
779 return -EIO;
780 }
781
782 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
783
784 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
785 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
786
787 buf |= PMT_CTL_PHY_RST;
788
789 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
790 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
791
792 timeout = 0;
793 do {
794 msleep(10);
795 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
796 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
797 timeout++;
798 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
799
800 if (timeout >= 100) {
801 netdev_warn(dev->net, "timeout waiting for PHY Reset");
802 return -EIO;
803 }
804
805 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
806
807 smsc75xx_init_mac_address(dev);
808
809 ret = smsc75xx_set_mac_address(dev);
810 check_warn_return(ret, "Failed to set mac address");
811
812 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
813
814 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
815 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
816
817 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
818
819 buf |= HW_CFG_BIR;
820
821 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
822 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
823
824 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
825 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
826
827 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
828 "writing HW_CFG_BIR: 0x%08x", buf);
829
830 if (!turbo_mode) {
831 buf = 0;
832 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
833 } else if (dev->udev->speed == USB_SPEED_HIGH) {
834 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
835 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
836 } else {
837 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
838 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
839 }
840
841 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
842 (ulong)dev->rx_urb_size);
843
844 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
845 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
846
847 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
848 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
849
850 netif_dbg(dev, ifup, dev->net,
851 "Read Value from BURST_CAP after writing: 0x%08x", buf);
852
853 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
854 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
855
856 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
857 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
858
859 netif_dbg(dev, ifup, dev->net,
860 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
861
862 if (turbo_mode) {
863 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
864 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
865
866 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
867
868 buf |= (HW_CFG_MEF | HW_CFG_BCE);
869
870 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
871 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
872
873 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
874 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
875
876 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
877 }
878
879 /* set FIFO sizes */
880 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
881 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
882 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
883
884 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
885
886 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
887 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
888 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
889
890 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
891
892 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
893 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
894
895 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
896 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
897
898 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
899
900 /* Configure GPIO pins as LED outputs */
901 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
902 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
903
904 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
905 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
906
907 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
908 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
909
910 ret = smsc75xx_write_reg(dev, FLOW, 0);
911 check_warn_return(ret, "Failed to write FLOW: %d", ret);
912
913 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
914 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
915
916 /* Don't need rfe_ctl_lock during initialisation */
917 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
918 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
919
920 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
921
922 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
923 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
924
925 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
926 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
927
928 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
929
930 /* Enable or disable checksum offload engines */
931 smsc75xx_set_features(dev->net, dev->net->features);
932
933 smsc75xx_set_multicast(dev->net);
934
935 ret = smsc75xx_phy_initialize(dev);
936 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
937
938 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
939 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
940
941 /* enable PHY interrupts */
942 buf |= INT_ENP_PHY_INT;
943
944 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
945 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
946
947 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
948 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
949
950 buf |= MAC_TX_TXEN;
951
952 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
953 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
954
955 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
956
957 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
958 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
959
960 buf |= FCT_TX_CTL_EN;
961
962 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
963 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
964
965 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
966
967 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
968 check_warn_return(ret, "Failed to set max rx frame length");
969
970 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
971 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
972
973 buf |= MAC_RX_RXEN;
974
975 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
976 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
977
978 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
979
980 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
981 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
982
983 buf |= FCT_RX_CTL_EN;
984
985 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
986 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
987
988 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
989
990 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
991 return 0;
992}
993
994static const struct net_device_ops smsc75xx_netdev_ops = {
995 .ndo_open = usbnet_open,
996 .ndo_stop = usbnet_stop,
997 .ndo_start_xmit = usbnet_start_xmit,
998 .ndo_tx_timeout = usbnet_tx_timeout,
999 .ndo_change_mtu = smsc75xx_change_mtu,
1000 .ndo_set_mac_address = eth_mac_addr,
1001 .ndo_validate_addr = eth_validate_addr,
1002 .ndo_do_ioctl = smsc75xx_ioctl,
1003 .ndo_set_multicast_list = smsc75xx_set_multicast,
1004 .ndo_set_features = smsc75xx_set_features,
1005};
1006
1007static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1008{
1009 struct smsc75xx_priv *pdata = NULL;
1010 int ret;
1011
1012 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1013
1014 ret = usbnet_get_endpoints(dev, intf);
1015 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1016
1017 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1018 GFP_KERNEL);
1019
1020 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1021 if (!pdata) {
1022 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1023 return -ENOMEM;
1024 }
1025
1026 pdata->dev = dev;
1027
1028 spin_lock_init(&pdata->rfe_ctl_lock);
1029 mutex_init(&pdata->dataport_mutex);
1030
1031 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1032
1033 if (DEFAULT_TX_CSUM_ENABLE) {
1034 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1035 if (DEFAULT_TSO_ENABLE)
1036 dev->net->features |= NETIF_F_SG |
1037 NETIF_F_TSO | NETIF_F_TSO6;
1038 }
1039 if (DEFAULT_RX_CSUM_ENABLE)
1040 dev->net->features |= NETIF_F_RXCSUM;
1041
1042 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1043 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1044
1045 /* Init all registers */
1046 ret = smsc75xx_reset(dev);
1047
1048 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1049 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1050 dev->net->flags |= IFF_MULTICAST;
1051 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1052 return 0;
1053}
1054
1055static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1056{
1057 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1058 if (pdata) {
1059 netif_dbg(dev, ifdown, dev->net, "free pdata");
1060 kfree(pdata);
1061 pdata = NULL;
1062 dev->data[0] = 0;
1063 }
1064}
1065
1066static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1067 u32 rx_cmd_a, u32 rx_cmd_b)
1068{
1069 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1070 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1071 skb->ip_summed = CHECKSUM_NONE;
1072 } else {
1073 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1074 skb->ip_summed = CHECKSUM_COMPLETE;
1075 }
1076}
1077
1078static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1079{
1080 while (skb->len > 0) {
1081 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1082 struct sk_buff *ax_skb;
1083 unsigned char *packet;
1084
1085 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1086 le32_to_cpus(&rx_cmd_a);
1087 skb_pull(skb, 4);
1088
1089 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1090 le32_to_cpus(&rx_cmd_b);
1091 skb_pull(skb, 4 + NET_IP_ALIGN);
1092
1093 packet = skb->data;
1094
1095 /* get the packet length */
1096 size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN;
1097 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1098
1099 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1100 netif_dbg(dev, rx_err, dev->net,
1101 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1102 dev->net->stats.rx_errors++;
1103 dev->net->stats.rx_dropped++;
1104
1105 if (rx_cmd_a & RX_CMD_A_FCS)
1106 dev->net->stats.rx_crc_errors++;
1107 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1108 dev->net->stats.rx_frame_errors++;
1109 } else {
1110 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1111 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1112 netif_dbg(dev, rx_err, dev->net,
1113 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1114 return 0;
1115 }
1116
1117 /* last frame in this batch */
1118 if (skb->len == size) {
1119 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1120 rx_cmd_b);
1121
1122 skb_trim(skb, skb->len - 4); /* remove fcs */
1123 skb->truesize = size + sizeof(struct sk_buff);
1124
1125 return 1;
1126 }
1127
1128 ax_skb = skb_clone(skb, GFP_ATOMIC);
1129 if (unlikely(!ax_skb)) {
1130 netdev_warn(dev->net, "Error allocating skb");
1131 return 0;
1132 }
1133
1134 ax_skb->len = size;
1135 ax_skb->data = packet;
1136 skb_set_tail_pointer(ax_skb, size);
1137
1138 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1139 rx_cmd_b);
1140
1141 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1142 ax_skb->truesize = size + sizeof(struct sk_buff);
1143
1144 usbnet_skb_return(dev, ax_skb);
1145 }
1146
1147 skb_pull(skb, size);
1148
1149 /* padding bytes before the next frame starts */
1150 if (skb->len)
1151 skb_pull(skb, align_count);
1152 }
1153
1154 if (unlikely(skb->len < 0)) {
1155 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1156 return 0;
1157 }
1158
1159 return 1;
1160}
1161
1162static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1163 struct sk_buff *skb, gfp_t flags)
1164{
1165 u32 tx_cmd_a, tx_cmd_b;
1166
1167 skb_linearize(skb);
1168
1169 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1170 struct sk_buff *skb2 =
1171 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1172 dev_kfree_skb_any(skb);
1173 skb = skb2;
1174 if (!skb)
1175 return NULL;
1176 }
1177
1178 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1179
1180 if (skb->ip_summed == CHECKSUM_PARTIAL)
1181 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1182
1183 if (skb_is_gso(skb)) {
1184 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1185 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1186
1187 tx_cmd_a |= TX_CMD_A_LSO;
1188 } else {
1189 tx_cmd_b = 0;
1190 }
1191
1192 skb_push(skb, 4);
1193 cpu_to_le32s(&tx_cmd_b);
1194 memcpy(skb->data, &tx_cmd_b, 4);
1195
1196 skb_push(skb, 4);
1197 cpu_to_le32s(&tx_cmd_a);
1198 memcpy(skb->data, &tx_cmd_a, 4);
1199
1200 return skb;
1201}
1202
1203static const struct driver_info smsc75xx_info = {
1204 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1205 .bind = smsc75xx_bind,
1206 .unbind = smsc75xx_unbind,
1207 .link_reset = smsc75xx_link_reset,
1208 .reset = smsc75xx_reset,
1209 .rx_fixup = smsc75xx_rx_fixup,
1210 .tx_fixup = smsc75xx_tx_fixup,
1211 .status = smsc75xx_status,
1212 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1213};
1214
1215static const struct usb_device_id products[] = {
1216 {
1217 /* SMSC7500 USB Gigabit Ethernet Device */
1218 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1219 .driver_info = (unsigned long) &smsc75xx_info,
1220 },
1221 {
1222 /* SMSC7500 USB Gigabit Ethernet Device */
1223 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1224 .driver_info = (unsigned long) &smsc75xx_info,
1225 },
1226 { }, /* END */
1227};
1228MODULE_DEVICE_TABLE(usb, products);
1229
1230static struct usb_driver smsc75xx_driver = {
1231 .name = SMSC_CHIPNAME,
1232 .id_table = products,
1233 .probe = usbnet_probe,
1234 .suspend = usbnet_suspend,
1235 .resume = usbnet_resume,
1236 .disconnect = usbnet_disconnect,
1237};
1238
1239static int __init smsc75xx_init(void)
1240{
1241 return usb_register(&smsc75xx_driver);
1242}
1243module_init(smsc75xx_init);
1244
1245static void __exit smsc75xx_exit(void)
1246{
1247 usb_deregister(&smsc75xx_driver);
1248}
1249module_exit(smsc75xx_exit);
1250
1251MODULE_AUTHOR("Nancy Lin");
1252MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1253MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1254MODULE_LICENSE("GPL");
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 *****************************************************************************/
19
20#include <linux/module.h>
21#include <linux/kmod.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/ethtool.h>
25#include <linux/mii.h>
26#include <linux/usb.h>
27#include <linux/bitrev.h>
28#include <linux/crc16.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include <linux/of_net.h>
33#include "smsc75xx.h"
34
35#define SMSC_CHIPNAME "smsc75xx"
36#define SMSC_DRIVER_VERSION "1.0.0"
37#define HS_USB_PKT_SIZE (512)
38#define FS_USB_PKT_SIZE (64)
39#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
40#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
41#define DEFAULT_BULK_IN_DELAY (0x00002000)
42#define MAX_SINGLE_PACKET_SIZE (9000)
43#define LAN75XX_EEPROM_MAGIC (0x7500)
44#define EEPROM_MAC_OFFSET (0x01)
45#define DEFAULT_TX_CSUM_ENABLE (true)
46#define DEFAULT_RX_CSUM_ENABLE (true)
47#define SMSC75XX_INTERNAL_PHY_ID (1)
48#define SMSC75XX_TX_OVERHEAD (8)
49#define MAX_RX_FIFO_SIZE (20 * 1024)
50#define MAX_TX_FIFO_SIZE (12 * 1024)
51#define USB_VENDOR_ID_SMSC (0x0424)
52#define USB_PRODUCT_ID_LAN7500 (0x7500)
53#define USB_PRODUCT_ID_LAN7505 (0x7505)
54#define RXW_PADDING 2
55#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
56 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
57
58#define SUSPEND_SUSPEND0 (0x01)
59#define SUSPEND_SUSPEND1 (0x02)
60#define SUSPEND_SUSPEND2 (0x04)
61#define SUSPEND_SUSPEND3 (0x08)
62#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
63 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
64
65struct smsc75xx_priv {
66 struct usbnet *dev;
67 u32 rfe_ctl;
68 u32 wolopts;
69 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
70 struct mutex dataport_mutex;
71 spinlock_t rfe_ctl_lock;
72 struct work_struct set_multicast;
73 u8 suspend_flags;
74};
75
76struct usb_context {
77 struct usb_ctrlrequest req;
78 struct usbnet *dev;
79};
80
81static bool turbo_mode = true;
82module_param(turbo_mode, bool, 0644);
83MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
84
85static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
86 u32 *data, int in_pm)
87{
88 u32 buf;
89 int ret;
90 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
91
92 BUG_ON(!dev);
93
94 if (!in_pm)
95 fn = usbnet_read_cmd;
96 else
97 fn = usbnet_read_cmd_nopm;
98
99 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
100 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
101 0, index, &buf, 4);
102 if (unlikely(ret < 0)) {
103 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
104 index, ret);
105 return ret;
106 }
107
108 le32_to_cpus(&buf);
109 *data = buf;
110
111 return ret;
112}
113
114static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
115 u32 data, int in_pm)
116{
117 u32 buf;
118 int ret;
119 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
120
121 BUG_ON(!dev);
122
123 if (!in_pm)
124 fn = usbnet_write_cmd;
125 else
126 fn = usbnet_write_cmd_nopm;
127
128 buf = data;
129 cpu_to_le32s(&buf);
130
131 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
132 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
133 0, index, &buf, 4);
134 if (unlikely(ret < 0))
135 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
136 index, ret);
137
138 return ret;
139}
140
141static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
142 u32 *data)
143{
144 return __smsc75xx_read_reg(dev, index, data, 1);
145}
146
147static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
148 u32 data)
149{
150 return __smsc75xx_write_reg(dev, index, data, 1);
151}
152
153static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
154 u32 *data)
155{
156 return __smsc75xx_read_reg(dev, index, data, 0);
157}
158
159static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
160 u32 data)
161{
162 return __smsc75xx_write_reg(dev, index, data, 0);
163}
164
165/* Loop until the read is completed with timeout
166 * called with phy_mutex held */
167static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
168 int in_pm)
169{
170 unsigned long start_time = jiffies;
171 u32 val;
172 int ret;
173
174 do {
175 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
176 if (ret < 0) {
177 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
178 return ret;
179 }
180
181 if (!(val & MII_ACCESS_BUSY))
182 return 0;
183 } while (!time_after(jiffies, start_time + HZ));
184
185 return -EIO;
186}
187
188static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
189 int in_pm)
190{
191 struct usbnet *dev = netdev_priv(netdev);
192 u32 val, addr;
193 int ret;
194
195 mutex_lock(&dev->phy_mutex);
196
197 /* confirm MII not busy */
198 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
199 if (ret < 0) {
200 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n");
201 goto done;
202 }
203
204 /* set the address, index & direction (read from PHY) */
205 phy_id &= dev->mii.phy_id_mask;
206 idx &= dev->mii.reg_num_mask;
207 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
208 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
209 | MII_ACCESS_READ | MII_ACCESS_BUSY;
210 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
211 if (ret < 0) {
212 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
213 goto done;
214 }
215
216 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
217 if (ret < 0) {
218 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
219 goto done;
220 }
221
222 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
223 if (ret < 0) {
224 netdev_warn(dev->net, "Error reading MII_DATA\n");
225 goto done;
226 }
227
228 ret = (u16)(val & 0xFFFF);
229
230done:
231 mutex_unlock(&dev->phy_mutex);
232 return ret;
233}
234
235static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
236 int idx, int regval, int in_pm)
237{
238 struct usbnet *dev = netdev_priv(netdev);
239 u32 val, addr;
240 int ret;
241
242 mutex_lock(&dev->phy_mutex);
243
244 /* confirm MII not busy */
245 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
246 if (ret < 0) {
247 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n");
248 goto done;
249 }
250
251 val = regval;
252 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
253 if (ret < 0) {
254 netdev_warn(dev->net, "Error writing MII_DATA\n");
255 goto done;
256 }
257
258 /* set the address, index & direction (write to PHY) */
259 phy_id &= dev->mii.phy_id_mask;
260 idx &= dev->mii.reg_num_mask;
261 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
262 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
263 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
264 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
265 if (ret < 0) {
266 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
267 goto done;
268 }
269
270 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
271 if (ret < 0) {
272 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
273 goto done;
274 }
275
276done:
277 mutex_unlock(&dev->phy_mutex);
278}
279
280static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
281 int idx)
282{
283 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
284}
285
286static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
287 int idx, int regval)
288{
289 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
290}
291
292static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
293{
294 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
295}
296
297static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
298 int regval)
299{
300 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
301}
302
303static int smsc75xx_wait_eeprom(struct usbnet *dev)
304{
305 unsigned long start_time = jiffies;
306 u32 val;
307 int ret;
308
309 do {
310 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
311 if (ret < 0) {
312 netdev_warn(dev->net, "Error reading E2P_CMD\n");
313 return ret;
314 }
315
316 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
317 break;
318 udelay(40);
319 } while (!time_after(jiffies, start_time + HZ));
320
321 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
322 netdev_warn(dev->net, "EEPROM read operation timeout\n");
323 return -EIO;
324 }
325
326 return 0;
327}
328
329static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
330{
331 unsigned long start_time = jiffies;
332 u32 val;
333 int ret;
334
335 do {
336 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
337 if (ret < 0) {
338 netdev_warn(dev->net, "Error reading E2P_CMD\n");
339 return ret;
340 }
341
342 if (!(val & E2P_CMD_BUSY))
343 return 0;
344
345 udelay(40);
346 } while (!time_after(jiffies, start_time + HZ));
347
348 netdev_warn(dev->net, "EEPROM is busy\n");
349 return -EIO;
350}
351
352static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
353 u8 *data)
354{
355 u32 val;
356 int i, ret;
357
358 BUG_ON(!dev);
359 BUG_ON(!data);
360
361 ret = smsc75xx_eeprom_confirm_not_busy(dev);
362 if (ret)
363 return ret;
364
365 for (i = 0; i < length; i++) {
366 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
367 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
368 if (ret < 0) {
369 netdev_warn(dev->net, "Error writing E2P_CMD\n");
370 return ret;
371 }
372
373 ret = smsc75xx_wait_eeprom(dev);
374 if (ret < 0)
375 return ret;
376
377 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
378 if (ret < 0) {
379 netdev_warn(dev->net, "Error reading E2P_DATA\n");
380 return ret;
381 }
382
383 data[i] = val & 0xFF;
384 offset++;
385 }
386
387 return 0;
388}
389
390static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
391 u8 *data)
392{
393 u32 val;
394 int i, ret;
395
396 BUG_ON(!dev);
397 BUG_ON(!data);
398
399 ret = smsc75xx_eeprom_confirm_not_busy(dev);
400 if (ret)
401 return ret;
402
403 /* Issue write/erase enable command */
404 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
405 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
406 if (ret < 0) {
407 netdev_warn(dev->net, "Error writing E2P_CMD\n");
408 return ret;
409 }
410
411 ret = smsc75xx_wait_eeprom(dev);
412 if (ret < 0)
413 return ret;
414
415 for (i = 0; i < length; i++) {
416
417 /* Fill data register */
418 val = data[i];
419 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
420 if (ret < 0) {
421 netdev_warn(dev->net, "Error writing E2P_DATA\n");
422 return ret;
423 }
424
425 /* Send "write" command */
426 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
427 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
428 if (ret < 0) {
429 netdev_warn(dev->net, "Error writing E2P_CMD\n");
430 return ret;
431 }
432
433 ret = smsc75xx_wait_eeprom(dev);
434 if (ret < 0)
435 return ret;
436
437 offset++;
438 }
439
440 return 0;
441}
442
443static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
444{
445 int i, ret;
446
447 for (i = 0; i < 100; i++) {
448 u32 dp_sel;
449 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
450 if (ret < 0) {
451 netdev_warn(dev->net, "Error reading DP_SEL\n");
452 return ret;
453 }
454
455 if (dp_sel & DP_SEL_DPRDY)
456 return 0;
457
458 udelay(40);
459 }
460
461 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
462
463 return -EIO;
464}
465
466static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
467 u32 length, u32 *buf)
468{
469 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
470 u32 dp_sel;
471 int i, ret;
472
473 mutex_lock(&pdata->dataport_mutex);
474
475 ret = smsc75xx_dataport_wait_not_busy(dev);
476 if (ret < 0) {
477 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n");
478 goto done;
479 }
480
481 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
482 if (ret < 0) {
483 netdev_warn(dev->net, "Error reading DP_SEL\n");
484 goto done;
485 }
486
487 dp_sel &= ~DP_SEL_RSEL;
488 dp_sel |= ram_select;
489 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
490 if (ret < 0) {
491 netdev_warn(dev->net, "Error writing DP_SEL\n");
492 goto done;
493 }
494
495 for (i = 0; i < length; i++) {
496 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
497 if (ret < 0) {
498 netdev_warn(dev->net, "Error writing DP_ADDR\n");
499 goto done;
500 }
501
502 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
503 if (ret < 0) {
504 netdev_warn(dev->net, "Error writing DP_DATA\n");
505 goto done;
506 }
507
508 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
509 if (ret < 0) {
510 netdev_warn(dev->net, "Error writing DP_CMD\n");
511 goto done;
512 }
513
514 ret = smsc75xx_dataport_wait_not_busy(dev);
515 if (ret < 0) {
516 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n");
517 goto done;
518 }
519 }
520
521done:
522 mutex_unlock(&pdata->dataport_mutex);
523 return ret;
524}
525
526/* returns hash bit number for given MAC address */
527static u32 smsc75xx_hash(char addr[ETH_ALEN])
528{
529 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
530}
531
532static void smsc75xx_deferred_multicast_write(struct work_struct *param)
533{
534 struct smsc75xx_priv *pdata =
535 container_of(param, struct smsc75xx_priv, set_multicast);
536 struct usbnet *dev = pdata->dev;
537 int ret;
538
539 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
540 pdata->rfe_ctl);
541
542 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
543 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
544
545 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
546 if (ret < 0)
547 netdev_warn(dev->net, "Error writing RFE_CRL\n");
548}
549
550static void smsc75xx_set_multicast(struct net_device *netdev)
551{
552 struct usbnet *dev = netdev_priv(netdev);
553 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
554 unsigned long flags;
555 int i;
556
557 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
558
559 pdata->rfe_ctl &=
560 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
561 pdata->rfe_ctl |= RFE_CTL_AB;
562
563 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
564 pdata->multicast_hash_table[i] = 0;
565
566 if (dev->net->flags & IFF_PROMISC) {
567 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
568 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
569 } else if (dev->net->flags & IFF_ALLMULTI) {
570 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
571 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
572 } else if (!netdev_mc_empty(dev->net)) {
573 struct netdev_hw_addr *ha;
574
575 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
576
577 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
578
579 netdev_for_each_mc_addr(ha, netdev) {
580 u32 bitnum = smsc75xx_hash(ha->addr);
581 pdata->multicast_hash_table[bitnum / 32] |=
582 (1 << (bitnum % 32));
583 }
584 } else {
585 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
586 pdata->rfe_ctl |= RFE_CTL_DPF;
587 }
588
589 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
590
591 /* defer register writes to a sleepable context */
592 schedule_work(&pdata->set_multicast);
593}
594
595static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
596 u16 lcladv, u16 rmtadv)
597{
598 u32 flow = 0, fct_flow = 0;
599 int ret;
600
601 if (duplex == DUPLEX_FULL) {
602 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
603
604 if (cap & FLOW_CTRL_TX) {
605 flow = (FLOW_TX_FCEN | 0xFFFF);
606 /* set fct_flow thresholds to 20% and 80% */
607 fct_flow = (8 << 8) | 32;
608 }
609
610 if (cap & FLOW_CTRL_RX)
611 flow |= FLOW_RX_FCEN;
612
613 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
614 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
615 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
616 } else {
617 netif_dbg(dev, link, dev->net, "half duplex\n");
618 }
619
620 ret = smsc75xx_write_reg(dev, FLOW, flow);
621 if (ret < 0) {
622 netdev_warn(dev->net, "Error writing FLOW\n");
623 return ret;
624 }
625
626 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
627 if (ret < 0) {
628 netdev_warn(dev->net, "Error writing FCT_FLOW\n");
629 return ret;
630 }
631
632 return 0;
633}
634
635static int smsc75xx_link_reset(struct usbnet *dev)
636{
637 struct mii_if_info *mii = &dev->mii;
638 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
639 u16 lcladv, rmtadv;
640 int ret;
641
642 /* write to clear phy interrupt status */
643 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
644 PHY_INT_SRC_CLEAR_ALL);
645
646 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
647 if (ret < 0) {
648 netdev_warn(dev->net, "Error writing INT_STS\n");
649 return ret;
650 }
651
652 mii_check_media(mii, 1, 1);
653 mii_ethtool_gset(&dev->mii, &ecmd);
654 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
655 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
656
657 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
658 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
659
660 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
661}
662
663static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
664{
665 u32 intdata;
666
667 if (urb->actual_length != 4) {
668 netdev_warn(dev->net, "unexpected urb length %d\n",
669 urb->actual_length);
670 return;
671 }
672
673 memcpy(&intdata, urb->transfer_buffer, 4);
674 le32_to_cpus(&intdata);
675
676 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
677
678 if (intdata & INT_ENP_PHY_INT)
679 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
680 else
681 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
682 intdata);
683}
684
685static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
686{
687 return MAX_EEPROM_SIZE;
688}
689
690static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
691 struct ethtool_eeprom *ee, u8 *data)
692{
693 struct usbnet *dev = netdev_priv(netdev);
694
695 ee->magic = LAN75XX_EEPROM_MAGIC;
696
697 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
698}
699
700static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
701 struct ethtool_eeprom *ee, u8 *data)
702{
703 struct usbnet *dev = netdev_priv(netdev);
704
705 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
706 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
707 ee->magic);
708 return -EINVAL;
709 }
710
711 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
712}
713
714static void smsc75xx_ethtool_get_wol(struct net_device *net,
715 struct ethtool_wolinfo *wolinfo)
716{
717 struct usbnet *dev = netdev_priv(net);
718 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
719
720 wolinfo->supported = SUPPORTED_WAKE;
721 wolinfo->wolopts = pdata->wolopts;
722}
723
724static int smsc75xx_ethtool_set_wol(struct net_device *net,
725 struct ethtool_wolinfo *wolinfo)
726{
727 struct usbnet *dev = netdev_priv(net);
728 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
729 int ret;
730
731 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
732
733 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
734 if (ret < 0)
735 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
736
737 return ret;
738}
739
740static const struct ethtool_ops smsc75xx_ethtool_ops = {
741 .get_link = usbnet_get_link,
742 .nway_reset = usbnet_nway_reset,
743 .get_drvinfo = usbnet_get_drvinfo,
744 .get_msglevel = usbnet_get_msglevel,
745 .set_msglevel = usbnet_set_msglevel,
746 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
747 .get_eeprom = smsc75xx_ethtool_get_eeprom,
748 .set_eeprom = smsc75xx_ethtool_set_eeprom,
749 .get_wol = smsc75xx_ethtool_get_wol,
750 .set_wol = smsc75xx_ethtool_set_wol,
751 .get_link_ksettings = usbnet_get_link_ksettings,
752 .set_link_ksettings = usbnet_set_link_ksettings,
753};
754
755static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
756{
757 struct usbnet *dev = netdev_priv(netdev);
758
759 if (!netif_running(netdev))
760 return -EINVAL;
761
762 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
763}
764
765static void smsc75xx_init_mac_address(struct usbnet *dev)
766{
767 const u8 *mac_addr;
768
769 /* maybe the boot loader passed the MAC address in devicetree */
770 mac_addr = of_get_mac_address(dev->udev->dev.of_node);
771 if (mac_addr) {
772 memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
773 return;
774 }
775
776 /* try reading mac address from EEPROM */
777 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
778 dev->net->dev_addr) == 0) {
779 if (is_valid_ether_addr(dev->net->dev_addr)) {
780 /* eeprom values are valid so use them */
781 netif_dbg(dev, ifup, dev->net,
782 "MAC address read from EEPROM\n");
783 return;
784 }
785 }
786
787 /* no useful static MAC address found. generate a random one */
788 eth_hw_addr_random(dev->net);
789 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
790}
791
792static int smsc75xx_set_mac_address(struct usbnet *dev)
793{
794 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
795 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
796 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
797
798 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
799 if (ret < 0) {
800 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret);
801 return ret;
802 }
803
804 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
805 if (ret < 0) {
806 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret);
807 return ret;
808 }
809
810 addr_hi |= ADDR_FILTX_FB_VALID;
811 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
812 if (ret < 0) {
813 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret);
814 return ret;
815 }
816
817 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
818 if (ret < 0)
819 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret);
820
821 return ret;
822}
823
824static int smsc75xx_phy_initialize(struct usbnet *dev)
825{
826 int bmcr, ret, timeout = 0;
827
828 /* Initialize MII structure */
829 dev->mii.dev = dev->net;
830 dev->mii.mdio_read = smsc75xx_mdio_read;
831 dev->mii.mdio_write = smsc75xx_mdio_write;
832 dev->mii.phy_id_mask = 0x1f;
833 dev->mii.reg_num_mask = 0x1f;
834 dev->mii.supports_gmii = 1;
835 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
836
837 /* reset phy and wait for reset to complete */
838 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
839
840 do {
841 msleep(10);
842 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
843 if (bmcr < 0) {
844 netdev_warn(dev->net, "Error reading MII_BMCR\n");
845 return bmcr;
846 }
847 timeout++;
848 } while ((bmcr & BMCR_RESET) && (timeout < 100));
849
850 if (timeout >= 100) {
851 netdev_warn(dev->net, "timeout on PHY Reset\n");
852 return -EIO;
853 }
854
855 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
856 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
857 ADVERTISE_PAUSE_ASYM);
858 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
859 ADVERTISE_1000FULL);
860
861 /* read and write to clear phy interrupt status */
862 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
863 if (ret < 0) {
864 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
865 return ret;
866 }
867
868 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
869
870 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
871 PHY_INT_MASK_DEFAULT);
872 mii_nway_restart(&dev->mii);
873
874 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
875 return 0;
876}
877
878static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
879{
880 int ret = 0;
881 u32 buf;
882 bool rxenabled;
883
884 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
885 if (ret < 0) {
886 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
887 return ret;
888 }
889
890 rxenabled = ((buf & MAC_RX_RXEN) != 0);
891
892 if (rxenabled) {
893 buf &= ~MAC_RX_RXEN;
894 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
895 if (ret < 0) {
896 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
897 return ret;
898 }
899 }
900
901 /* add 4 to size for FCS */
902 buf &= ~MAC_RX_MAX_SIZE;
903 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
904
905 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
906 if (ret < 0) {
907 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
908 return ret;
909 }
910
911 if (rxenabled) {
912 buf |= MAC_RX_RXEN;
913 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
914 if (ret < 0) {
915 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
916 return ret;
917 }
918 }
919
920 return 0;
921}
922
923static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
924{
925 struct usbnet *dev = netdev_priv(netdev);
926 int ret;
927
928 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
929 if (ret < 0) {
930 netdev_warn(dev->net, "Failed to set mac rx frame length\n");
931 return ret;
932 }
933
934 return usbnet_change_mtu(netdev, new_mtu);
935}
936
937/* Enable or disable Rx checksum offload engine */
938static int smsc75xx_set_features(struct net_device *netdev,
939 netdev_features_t features)
940{
941 struct usbnet *dev = netdev_priv(netdev);
942 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
943 unsigned long flags;
944 int ret;
945
946 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
947
948 if (features & NETIF_F_RXCSUM)
949 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
950 else
951 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
952
953 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
954 /* it's racing here! */
955
956 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
957 if (ret < 0) {
958 netdev_warn(dev->net, "Error writing RFE_CTL\n");
959 return ret;
960 }
961 return 0;
962}
963
964static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
965{
966 int timeout = 0;
967
968 do {
969 u32 buf;
970 int ret;
971
972 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
973
974 if (ret < 0) {
975 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
976 return ret;
977 }
978
979 if (buf & PMT_CTL_DEV_RDY)
980 return 0;
981
982 msleep(10);
983 timeout++;
984 } while (timeout < 100);
985
986 netdev_warn(dev->net, "timeout waiting for device ready\n");
987 return -EIO;
988}
989
990static int smsc75xx_reset(struct usbnet *dev)
991{
992 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
993 u32 buf;
994 int ret = 0, timeout;
995
996 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
997
998 ret = smsc75xx_wait_ready(dev, 0);
999 if (ret < 0) {
1000 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n");
1001 return ret;
1002 }
1003
1004 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1005 if (ret < 0) {
1006 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1007 return ret;
1008 }
1009
1010 buf |= HW_CFG_LRST;
1011
1012 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1013 if (ret < 0) {
1014 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1015 return ret;
1016 }
1017
1018 timeout = 0;
1019 do {
1020 msleep(10);
1021 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1022 if (ret < 0) {
1023 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1024 return ret;
1025 }
1026 timeout++;
1027 } while ((buf & HW_CFG_LRST) && (timeout < 100));
1028
1029 if (timeout >= 100) {
1030 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
1031 return -EIO;
1032 }
1033
1034 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
1035
1036 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1037 if (ret < 0) {
1038 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1039 return ret;
1040 }
1041
1042 buf |= PMT_CTL_PHY_RST;
1043
1044 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1045 if (ret < 0) {
1046 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1047 return ret;
1048 }
1049
1050 timeout = 0;
1051 do {
1052 msleep(10);
1053 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1054 if (ret < 0) {
1055 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1056 return ret;
1057 }
1058 timeout++;
1059 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1060
1061 if (timeout >= 100) {
1062 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1063 return -EIO;
1064 }
1065
1066 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
1067
1068 ret = smsc75xx_set_mac_address(dev);
1069 if (ret < 0) {
1070 netdev_warn(dev->net, "Failed to set mac address\n");
1071 return ret;
1072 }
1073
1074 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1075 dev->net->dev_addr);
1076
1077 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1078 if (ret < 0) {
1079 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1080 return ret;
1081 }
1082
1083 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1084 buf);
1085
1086 buf |= HW_CFG_BIR;
1087
1088 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1089 if (ret < 0) {
1090 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1091 return ret;
1092 }
1093
1094 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1095 if (ret < 0) {
1096 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1097 return ret;
1098 }
1099
1100 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
1101 buf);
1102
1103 if (!turbo_mode) {
1104 buf = 0;
1105 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1106 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1107 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1108 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1109 } else {
1110 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1111 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1112 }
1113
1114 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1115 (ulong)dev->rx_urb_size);
1116
1117 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
1118 if (ret < 0) {
1119 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1120 return ret;
1121 }
1122
1123 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
1124 if (ret < 0) {
1125 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1126 return ret;
1127 }
1128
1129 netif_dbg(dev, ifup, dev->net,
1130 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
1131
1132 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
1133 if (ret < 0) {
1134 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1135 return ret;
1136 }
1137
1138 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
1139 if (ret < 0) {
1140 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1141 return ret;
1142 }
1143
1144 netif_dbg(dev, ifup, dev->net,
1145 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
1146
1147 if (turbo_mode) {
1148 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1149 if (ret < 0) {
1150 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1151 return ret;
1152 }
1153
1154 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1155
1156 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1157
1158 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1159 if (ret < 0) {
1160 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1161 return ret;
1162 }
1163
1164 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1165 if (ret < 0) {
1166 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1167 return ret;
1168 }
1169
1170 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1171 }
1172
1173 /* set FIFO sizes */
1174 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1175 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
1176 if (ret < 0) {
1177 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
1178 return ret;
1179 }
1180
1181 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
1182
1183 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1184 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
1185 if (ret < 0) {
1186 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
1187 return ret;
1188 }
1189
1190 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
1191
1192 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
1193 if (ret < 0) {
1194 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1195 return ret;
1196 }
1197
1198 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
1199 if (ret < 0) {
1200 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1201 return ret;
1202 }
1203
1204 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
1205
1206 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
1207 if (ret < 0) {
1208 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret);
1209 return ret;
1210 }
1211
1212 /* only set default GPIO/LED settings if no EEPROM is detected */
1213 if (!(buf & E2P_CMD_LOADED)) {
1214 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
1215 if (ret < 0) {
1216 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret);
1217 return ret;
1218 }
1219
1220 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1221 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1222
1223 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
1224 if (ret < 0) {
1225 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1226 return ret;
1227 }
1228 }
1229
1230 ret = smsc75xx_write_reg(dev, FLOW, 0);
1231 if (ret < 0) {
1232 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1233 return ret;
1234 }
1235
1236 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
1237 if (ret < 0) {
1238 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret);
1239 return ret;
1240 }
1241
1242 /* Don't need rfe_ctl_lock during initialisation */
1243 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1244 if (ret < 0) {
1245 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1246 return ret;
1247 }
1248
1249 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1250
1251 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1252 if (ret < 0) {
1253 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret);
1254 return ret;
1255 }
1256
1257 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1258 if (ret < 0) {
1259 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1260 return ret;
1261 }
1262
1263 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1264 pdata->rfe_ctl);
1265
1266 /* Enable or disable checksum offload engines */
1267 smsc75xx_set_features(dev->net, dev->net->features);
1268
1269 smsc75xx_set_multicast(dev->net);
1270
1271 ret = smsc75xx_phy_initialize(dev);
1272 if (ret < 0) {
1273 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret);
1274 return ret;
1275 }
1276
1277 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1278 if (ret < 0) {
1279 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1280 return ret;
1281 }
1282
1283 /* enable PHY interrupts */
1284 buf |= INT_ENP_PHY_INT;
1285
1286 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1287 if (ret < 0) {
1288 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1289 return ret;
1290 }
1291
1292 /* allow mac to detect speed and duplex from phy */
1293 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1294 if (ret < 0) {
1295 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1296 return ret;
1297 }
1298
1299 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1300 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1301 if (ret < 0) {
1302 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
1303 return ret;
1304 }
1305
1306 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1307 if (ret < 0) {
1308 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret);
1309 return ret;
1310 }
1311
1312 buf |= MAC_TX_TXEN;
1313
1314 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1315 if (ret < 0) {
1316 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret);
1317 return ret;
1318 }
1319
1320 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
1321
1322 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1323 if (ret < 0) {
1324 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret);
1325 return ret;
1326 }
1327
1328 buf |= FCT_TX_CTL_EN;
1329
1330 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1331 if (ret < 0) {
1332 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret);
1333 return ret;
1334 }
1335
1336 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
1337
1338 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
1339 if (ret < 0) {
1340 netdev_warn(dev->net, "Failed to set max rx frame length\n");
1341 return ret;
1342 }
1343
1344 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1345 if (ret < 0) {
1346 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1347 return ret;
1348 }
1349
1350 buf |= MAC_RX_RXEN;
1351
1352 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1353 if (ret < 0) {
1354 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
1355 return ret;
1356 }
1357
1358 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
1359
1360 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1361 if (ret < 0) {
1362 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret);
1363 return ret;
1364 }
1365
1366 buf |= FCT_RX_CTL_EN;
1367
1368 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1369 if (ret < 0) {
1370 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret);
1371 return ret;
1372 }
1373
1374 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
1375
1376 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
1377 return 0;
1378}
1379
1380static const struct net_device_ops smsc75xx_netdev_ops = {
1381 .ndo_open = usbnet_open,
1382 .ndo_stop = usbnet_stop,
1383 .ndo_start_xmit = usbnet_start_xmit,
1384 .ndo_tx_timeout = usbnet_tx_timeout,
1385 .ndo_get_stats64 = usbnet_get_stats64,
1386 .ndo_change_mtu = smsc75xx_change_mtu,
1387 .ndo_set_mac_address = eth_mac_addr,
1388 .ndo_validate_addr = eth_validate_addr,
1389 .ndo_do_ioctl = smsc75xx_ioctl,
1390 .ndo_set_rx_mode = smsc75xx_set_multicast,
1391 .ndo_set_features = smsc75xx_set_features,
1392};
1393
1394static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1395{
1396 struct smsc75xx_priv *pdata = NULL;
1397 int ret;
1398
1399 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1400
1401 ret = usbnet_get_endpoints(dev, intf);
1402 if (ret < 0) {
1403 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1404 return ret;
1405 }
1406
1407 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1408 GFP_KERNEL);
1409
1410 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1411 if (!pdata)
1412 return -ENOMEM;
1413
1414 pdata->dev = dev;
1415
1416 spin_lock_init(&pdata->rfe_ctl_lock);
1417 mutex_init(&pdata->dataport_mutex);
1418
1419 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1420
1421 if (DEFAULT_TX_CSUM_ENABLE)
1422 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1423
1424 if (DEFAULT_RX_CSUM_ENABLE)
1425 dev->net->features |= NETIF_F_RXCSUM;
1426
1427 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1428 NETIF_F_RXCSUM;
1429
1430 ret = smsc75xx_wait_ready(dev, 0);
1431 if (ret < 0) {
1432 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n");
1433 return ret;
1434 }
1435
1436 smsc75xx_init_mac_address(dev);
1437
1438 /* Init all registers */
1439 ret = smsc75xx_reset(dev);
1440 if (ret < 0) {
1441 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret);
1442 return ret;
1443 }
1444
1445 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1446 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1447 dev->net->flags |= IFF_MULTICAST;
1448 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1449 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1450 dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE;
1451 return 0;
1452}
1453
1454static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1455{
1456 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1457 if (pdata) {
1458 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1459 kfree(pdata);
1460 pdata = NULL;
1461 dev->data[0] = 0;
1462 }
1463}
1464
1465static u16 smsc_crc(const u8 *buffer, size_t len)
1466{
1467 return bitrev16(crc16(0xFFFF, buffer, len));
1468}
1469
1470static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1471 u32 wuf_mask1)
1472{
1473 int cfg_base = WUF_CFGX + filter * 4;
1474 int mask_base = WUF_MASKX + filter * 16;
1475 int ret;
1476
1477 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
1478 if (ret < 0) {
1479 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1480 return ret;
1481 }
1482
1483 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
1484 if (ret < 0) {
1485 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1486 return ret;
1487 }
1488
1489 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
1490 if (ret < 0) {
1491 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1492 return ret;
1493 }
1494
1495 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
1496 if (ret < 0) {
1497 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1498 return ret;
1499 }
1500
1501 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
1502 if (ret < 0) {
1503 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1504 return ret;
1505 }
1506
1507 return 0;
1508}
1509
1510static int smsc75xx_enter_suspend0(struct usbnet *dev)
1511{
1512 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1513 u32 val;
1514 int ret;
1515
1516 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1517 if (ret < 0) {
1518 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1519 return ret;
1520 }
1521
1522 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1523 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1524
1525 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1526 if (ret < 0) {
1527 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1528 return ret;
1529 }
1530
1531 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1532
1533 return 0;
1534}
1535
1536static int smsc75xx_enter_suspend1(struct usbnet *dev)
1537{
1538 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1539 u32 val;
1540 int ret;
1541
1542 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1543 if (ret < 0) {
1544 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1545 return ret;
1546 }
1547
1548 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1549 val |= PMT_CTL_SUS_MODE_1;
1550
1551 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1552 if (ret < 0) {
1553 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1554 return ret;
1555 }
1556
1557 /* clear wol status, enable energy detection */
1558 val &= ~PMT_CTL_WUPS;
1559 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1560
1561 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1562 if (ret < 0) {
1563 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1564 return ret;
1565 }
1566
1567 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1568
1569 return 0;
1570}
1571
1572static int smsc75xx_enter_suspend2(struct usbnet *dev)
1573{
1574 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1575 u32 val;
1576 int ret;
1577
1578 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1579 if (ret < 0) {
1580 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1581 return ret;
1582 }
1583
1584 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1585 val |= PMT_CTL_SUS_MODE_2;
1586
1587 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1588 if (ret < 0) {
1589 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1590 return ret;
1591 }
1592
1593 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1594
1595 return 0;
1596}
1597
1598static int smsc75xx_enter_suspend3(struct usbnet *dev)
1599{
1600 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1601 u32 val;
1602 int ret;
1603
1604 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
1605 if (ret < 0) {
1606 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n");
1607 return ret;
1608 }
1609
1610 if (val & FCT_RX_CTL_RXUSED) {
1611 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1612 return -EBUSY;
1613 }
1614
1615 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1616 if (ret < 0) {
1617 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1618 return ret;
1619 }
1620
1621 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1622 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1623
1624 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1625 if (ret < 0) {
1626 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1627 return ret;
1628 }
1629
1630 /* clear wol status */
1631 val &= ~PMT_CTL_WUPS;
1632 val |= PMT_CTL_WUPS_WOL;
1633
1634 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1635 if (ret < 0) {
1636 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1637 return ret;
1638 }
1639
1640 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1641
1642 return 0;
1643}
1644
1645static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1646{
1647 struct mii_if_info *mii = &dev->mii;
1648 int ret;
1649
1650 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1651
1652 /* read to clear */
1653 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1654 if (ret < 0) {
1655 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1656 return ret;
1657 }
1658
1659 /* enable interrupt source */
1660 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1661 if (ret < 0) {
1662 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1663 return ret;
1664 }
1665
1666 ret |= mask;
1667
1668 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1669
1670 return 0;
1671}
1672
1673static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1674{
1675 struct mii_if_info *mii = &dev->mii;
1676 int ret;
1677
1678 /* first, a dummy read, needed to latch some MII phys */
1679 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1680 if (ret < 0) {
1681 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1682 return ret;
1683 }
1684
1685 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1686 if (ret < 0) {
1687 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1688 return ret;
1689 }
1690
1691 return !!(ret & BMSR_LSTATUS);
1692}
1693
1694static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1695{
1696 int ret;
1697
1698 if (!netif_running(dev->net)) {
1699 /* interface is ifconfig down so fully power down hw */
1700 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1701 return smsc75xx_enter_suspend2(dev);
1702 }
1703
1704 if (!link_up) {
1705 /* link is down so enter EDPD mode */
1706 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1707
1708 /* enable PHY wakeup events for if cable is attached */
1709 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1710 PHY_INT_MASK_ANEG_COMP);
1711 if (ret < 0) {
1712 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1713 return ret;
1714 }
1715
1716 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1717 return smsc75xx_enter_suspend1(dev);
1718 }
1719
1720 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1721 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1722 PHY_INT_MASK_LINK_DOWN);
1723 if (ret < 0) {
1724 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1725 return ret;
1726 }
1727
1728 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1729 return smsc75xx_enter_suspend3(dev);
1730}
1731
1732static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1733{
1734 struct usbnet *dev = usb_get_intfdata(intf);
1735 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1736 u32 val, link_up;
1737 int ret;
1738
1739 ret = usbnet_suspend(intf, message);
1740 if (ret < 0) {
1741 netdev_warn(dev->net, "usbnet_suspend error\n");
1742 return ret;
1743 }
1744
1745 if (pdata->suspend_flags) {
1746 netdev_warn(dev->net, "error during last resume\n");
1747 pdata->suspend_flags = 0;
1748 }
1749
1750 /* determine if link is up using only _nopm functions */
1751 link_up = smsc75xx_link_ok_nopm(dev);
1752
1753 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1754 ret = smsc75xx_autosuspend(dev, link_up);
1755 goto done;
1756 }
1757
1758 /* if we get this far we're not autosuspending */
1759 /* if no wol options set, or if link is down and we're not waking on
1760 * PHY activity, enter lowest power SUSPEND2 mode
1761 */
1762 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1763 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1764 netdev_info(dev->net, "entering SUSPEND2 mode\n");
1765
1766 /* disable energy detect (link up) & wake up events */
1767 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1768 if (ret < 0) {
1769 netdev_warn(dev->net, "Error reading WUCSR\n");
1770 goto done;
1771 }
1772
1773 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1774
1775 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1776 if (ret < 0) {
1777 netdev_warn(dev->net, "Error writing WUCSR\n");
1778 goto done;
1779 }
1780
1781 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1782 if (ret < 0) {
1783 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1784 goto done;
1785 }
1786
1787 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1788
1789 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1790 if (ret < 0) {
1791 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1792 goto done;
1793 }
1794
1795 ret = smsc75xx_enter_suspend2(dev);
1796 goto done;
1797 }
1798
1799 if (pdata->wolopts & WAKE_PHY) {
1800 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1801 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
1802 if (ret < 0) {
1803 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1804 goto done;
1805 }
1806
1807 /* if link is down then configure EDPD and enter SUSPEND1,
1808 * otherwise enter SUSPEND0 below
1809 */
1810 if (!link_up) {
1811 struct mii_if_info *mii = &dev->mii;
1812 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1813
1814 /* enable energy detect power-down mode */
1815 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1816 PHY_MODE_CTRL_STS);
1817 if (ret < 0) {
1818 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1819 goto done;
1820 }
1821
1822 ret |= MODE_CTRL_STS_EDPWRDOWN;
1823
1824 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1825 PHY_MODE_CTRL_STS, ret);
1826
1827 /* enter SUSPEND1 mode */
1828 ret = smsc75xx_enter_suspend1(dev);
1829 goto done;
1830 }
1831 }
1832
1833 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1834 int i, filter = 0;
1835
1836 /* disable all filters */
1837 for (i = 0; i < WUF_NUM; i++) {
1838 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
1839 if (ret < 0) {
1840 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1841 goto done;
1842 }
1843 }
1844
1845 if (pdata->wolopts & WAKE_MCAST) {
1846 const u8 mcast[] = {0x01, 0x00, 0x5E};
1847 netdev_info(dev->net, "enabling multicast detection\n");
1848
1849 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1850 | smsc_crc(mcast, 3);
1851 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
1852 if (ret < 0) {
1853 netdev_warn(dev->net, "Error writing wakeup filter\n");
1854 goto done;
1855 }
1856 }
1857
1858 if (pdata->wolopts & WAKE_ARP) {
1859 const u8 arp[] = {0x08, 0x06};
1860 netdev_info(dev->net, "enabling ARP detection\n");
1861
1862 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1863 | smsc_crc(arp, 2);
1864 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
1865 if (ret < 0) {
1866 netdev_warn(dev->net, "Error writing wakeup filter\n");
1867 goto done;
1868 }
1869 }
1870
1871 /* clear any pending pattern match packet status */
1872 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1873 if (ret < 0) {
1874 netdev_warn(dev->net, "Error reading WUCSR\n");
1875 goto done;
1876 }
1877
1878 val |= WUCSR_WUFR;
1879
1880 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1881 if (ret < 0) {
1882 netdev_warn(dev->net, "Error writing WUCSR\n");
1883 goto done;
1884 }
1885
1886 netdev_info(dev->net, "enabling packet match detection\n");
1887 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1888 if (ret < 0) {
1889 netdev_warn(dev->net, "Error reading WUCSR\n");
1890 goto done;
1891 }
1892
1893 val |= WUCSR_WUEN;
1894
1895 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1896 if (ret < 0) {
1897 netdev_warn(dev->net, "Error writing WUCSR\n");
1898 goto done;
1899 }
1900 } else {
1901 netdev_info(dev->net, "disabling packet match detection\n");
1902 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1903 if (ret < 0) {
1904 netdev_warn(dev->net, "Error reading WUCSR\n");
1905 goto done;
1906 }
1907
1908 val &= ~WUCSR_WUEN;
1909
1910 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1911 if (ret < 0) {
1912 netdev_warn(dev->net, "Error writing WUCSR\n");
1913 goto done;
1914 }
1915 }
1916
1917 /* disable magic, bcast & unicast wakeup sources */
1918 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1919 if (ret < 0) {
1920 netdev_warn(dev->net, "Error reading WUCSR\n");
1921 goto done;
1922 }
1923
1924 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1925
1926 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1927 if (ret < 0) {
1928 netdev_warn(dev->net, "Error writing WUCSR\n");
1929 goto done;
1930 }
1931
1932 if (pdata->wolopts & WAKE_PHY) {
1933 netdev_info(dev->net, "enabling PHY wakeup\n");
1934
1935 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1936 if (ret < 0) {
1937 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1938 goto done;
1939 }
1940
1941 /* clear wol status, enable energy detection */
1942 val &= ~PMT_CTL_WUPS;
1943 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1944
1945 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1946 if (ret < 0) {
1947 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1948 goto done;
1949 }
1950 }
1951
1952 if (pdata->wolopts & WAKE_MAGIC) {
1953 netdev_info(dev->net, "enabling magic packet wakeup\n");
1954 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1955 if (ret < 0) {
1956 netdev_warn(dev->net, "Error reading WUCSR\n");
1957 goto done;
1958 }
1959
1960 /* clear any pending magic packet status */
1961 val |= WUCSR_MPR | WUCSR_MPEN;
1962
1963 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1964 if (ret < 0) {
1965 netdev_warn(dev->net, "Error writing WUCSR\n");
1966 goto done;
1967 }
1968 }
1969
1970 if (pdata->wolopts & WAKE_BCAST) {
1971 netdev_info(dev->net, "enabling broadcast detection\n");
1972 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1973 if (ret < 0) {
1974 netdev_warn(dev->net, "Error reading WUCSR\n");
1975 goto done;
1976 }
1977
1978 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
1979
1980 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1981 if (ret < 0) {
1982 netdev_warn(dev->net, "Error writing WUCSR\n");
1983 goto done;
1984 }
1985 }
1986
1987 if (pdata->wolopts & WAKE_UCAST) {
1988 netdev_info(dev->net, "enabling unicast detection\n");
1989 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1990 if (ret < 0) {
1991 netdev_warn(dev->net, "Error reading WUCSR\n");
1992 goto done;
1993 }
1994
1995 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
1996
1997 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1998 if (ret < 0) {
1999 netdev_warn(dev->net, "Error writing WUCSR\n");
2000 goto done;
2001 }
2002 }
2003
2004 /* enable receiver to enable frame reception */
2005 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
2006 if (ret < 0) {
2007 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
2008 goto done;
2009 }
2010
2011 val |= MAC_RX_RXEN;
2012
2013 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
2014 if (ret < 0) {
2015 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
2016 goto done;
2017 }
2018
2019 /* some wol options are enabled, so enter SUSPEND0 */
2020 netdev_info(dev->net, "entering SUSPEND0 mode\n");
2021 ret = smsc75xx_enter_suspend0(dev);
2022
2023done:
2024 /*
2025 * TODO: resume() might need to handle the suspend failure
2026 * in system sleep
2027 */
2028 if (ret && PMSG_IS_AUTO(message))
2029 usbnet_resume(intf);
2030 return ret;
2031}
2032
2033static int smsc75xx_resume(struct usb_interface *intf)
2034{
2035 struct usbnet *dev = usb_get_intfdata(intf);
2036 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
2037 u8 suspend_flags = pdata->suspend_flags;
2038 int ret;
2039 u32 val;
2040
2041 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
2042
2043 /* do this first to ensure it's cleared even in error case */
2044 pdata->suspend_flags = 0;
2045
2046 if (suspend_flags & SUSPEND_ALLMODES) {
2047 /* Disable wakeup sources */
2048 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2049 if (ret < 0) {
2050 netdev_warn(dev->net, "Error reading WUCSR\n");
2051 return ret;
2052 }
2053
2054 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
2055 | WUCSR_BCST_EN);
2056
2057 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2058 if (ret < 0) {
2059 netdev_warn(dev->net, "Error writing WUCSR\n");
2060 return ret;
2061 }
2062
2063 /* clear wake-up status */
2064 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2065 if (ret < 0) {
2066 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2067 return ret;
2068 }
2069
2070 val &= ~PMT_CTL_WOL_EN;
2071 val |= PMT_CTL_WUPS;
2072
2073 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2074 if (ret < 0) {
2075 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2076 return ret;
2077 }
2078 }
2079
2080 if (suspend_flags & SUSPEND_SUSPEND2) {
2081 netdev_info(dev->net, "resuming from SUSPEND2\n");
2082
2083 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2084 if (ret < 0) {
2085 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2086 return ret;
2087 }
2088
2089 val |= PMT_CTL_PHY_PWRUP;
2090
2091 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2092 if (ret < 0) {
2093 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2094 return ret;
2095 }
2096 }
2097
2098 ret = smsc75xx_wait_ready(dev, 1);
2099 if (ret < 0) {
2100 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n");
2101 return ret;
2102 }
2103
2104 return usbnet_resume(intf);
2105}
2106
2107static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
2108 u32 rx_cmd_a, u32 rx_cmd_b)
2109{
2110 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2111 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
2112 skb->ip_summed = CHECKSUM_NONE;
2113 } else {
2114 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
2115 skb->ip_summed = CHECKSUM_COMPLETE;
2116 }
2117}
2118
2119static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
2120{
2121 /* This check is no longer done by usbnet */
2122 if (skb->len < dev->net->hard_header_len)
2123 return 0;
2124
2125 while (skb->len > 0) {
2126 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2127 struct sk_buff *ax_skb;
2128 unsigned char *packet;
2129
2130 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2131 le32_to_cpus(&rx_cmd_a);
2132 skb_pull(skb, 4);
2133
2134 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2135 le32_to_cpus(&rx_cmd_b);
2136 skb_pull(skb, 4 + RXW_PADDING);
2137
2138 packet = skb->data;
2139
2140 /* get the packet length */
2141 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
2142 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2143
2144 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
2145 netif_dbg(dev, rx_err, dev->net,
2146 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
2147 dev->net->stats.rx_errors++;
2148 dev->net->stats.rx_dropped++;
2149
2150 if (rx_cmd_a & RX_CMD_A_FCS)
2151 dev->net->stats.rx_crc_errors++;
2152 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
2153 dev->net->stats.rx_frame_errors++;
2154 } else {
2155 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */
2156 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) {
2157 netif_dbg(dev, rx_err, dev->net,
2158 "size err rx_cmd_a=0x%08x\n",
2159 rx_cmd_a);
2160 return 0;
2161 }
2162
2163 /* last frame in this batch */
2164 if (skb->len == size) {
2165 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
2166 rx_cmd_b);
2167
2168 skb_trim(skb, skb->len - 4); /* remove fcs */
2169 skb->truesize = size + sizeof(struct sk_buff);
2170
2171 return 1;
2172 }
2173
2174 ax_skb = skb_clone(skb, GFP_ATOMIC);
2175 if (unlikely(!ax_skb)) {
2176 netdev_warn(dev->net, "Error allocating skb\n");
2177 return 0;
2178 }
2179
2180 ax_skb->len = size;
2181 ax_skb->data = packet;
2182 skb_set_tail_pointer(ax_skb, size);
2183
2184 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
2185 rx_cmd_b);
2186
2187 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2188 ax_skb->truesize = size + sizeof(struct sk_buff);
2189
2190 usbnet_skb_return(dev, ax_skb);
2191 }
2192
2193 skb_pull(skb, size);
2194
2195 /* padding bytes before the next frame starts */
2196 if (skb->len)
2197 skb_pull(skb, align_count);
2198 }
2199
2200 return 1;
2201}
2202
2203static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
2204 struct sk_buff *skb, gfp_t flags)
2205{
2206 u32 tx_cmd_a, tx_cmd_b;
2207
2208 if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) {
2209 dev_kfree_skb_any(skb);
2210 return NULL;
2211 }
2212
2213 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
2214
2215 if (skb->ip_summed == CHECKSUM_PARTIAL)
2216 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
2217
2218 if (skb_is_gso(skb)) {
2219 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
2220 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
2221
2222 tx_cmd_a |= TX_CMD_A_LSO;
2223 } else {
2224 tx_cmd_b = 0;
2225 }
2226
2227 skb_push(skb, 4);
2228 cpu_to_le32s(&tx_cmd_b);
2229 memcpy(skb->data, &tx_cmd_b, 4);
2230
2231 skb_push(skb, 4);
2232 cpu_to_le32s(&tx_cmd_a);
2233 memcpy(skb->data, &tx_cmd_a, 4);
2234
2235 return skb;
2236}
2237
2238static int smsc75xx_manage_power(struct usbnet *dev, int on)
2239{
2240 dev->intf->needs_remote_wakeup = on;
2241 return 0;
2242}
2243
2244static const struct driver_info smsc75xx_info = {
2245 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
2246 .bind = smsc75xx_bind,
2247 .unbind = smsc75xx_unbind,
2248 .link_reset = smsc75xx_link_reset,
2249 .reset = smsc75xx_reset,
2250 .rx_fixup = smsc75xx_rx_fixup,
2251 .tx_fixup = smsc75xx_tx_fixup,
2252 .status = smsc75xx_status,
2253 .manage_power = smsc75xx_manage_power,
2254 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2255};
2256
2257static const struct usb_device_id products[] = {
2258 {
2259 /* SMSC7500 USB Gigabit Ethernet Device */
2260 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
2261 .driver_info = (unsigned long) &smsc75xx_info,
2262 },
2263 {
2264 /* SMSC7500 USB Gigabit Ethernet Device */
2265 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
2266 .driver_info = (unsigned long) &smsc75xx_info,
2267 },
2268 { }, /* END */
2269};
2270MODULE_DEVICE_TABLE(usb, products);
2271
2272static struct usb_driver smsc75xx_driver = {
2273 .name = SMSC_CHIPNAME,
2274 .id_table = products,
2275 .probe = usbnet_probe,
2276 .suspend = smsc75xx_suspend,
2277 .resume = smsc75xx_resume,
2278 .reset_resume = smsc75xx_resume,
2279 .disconnect = usbnet_disconnect,
2280 .disable_hub_initiated_lpm = 1,
2281 .supports_autosuspend = 1,
2282};
2283
2284module_usb_driver(smsc75xx_driver);
2285
2286MODULE_AUTHOR("Nancy Lin");
2287MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2288MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
2289MODULE_LICENSE("GPL");