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1/*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/fd.h>
25#include <linux/ioctl.h>
26#include <linux/blkdev.h>
27#include <linux/interrupt.h>
28#include <linux/mutex.h>
29#include <linux/module.h>
30#include <linux/spinlock.h>
31#include <asm/io.h>
32#include <asm/dbdma.h>
33#include <asm/prom.h>
34#include <asm/uaccess.h>
35#include <asm/mediabay.h>
36#include <asm/machdep.h>
37#include <asm/pmac_feature.h>
38
39static DEFINE_MUTEX(swim3_mutex);
40static struct request_queue *swim3_queue;
41static struct gendisk *disks[2];
42static struct request *fd_req;
43
44#define MAX_FLOPPIES 2
45
46enum swim_state {
47 idle,
48 locating,
49 seeking,
50 settling,
51 do_transfer,
52 jogging,
53 available,
54 revalidating,
55 ejecting
56};
57
58#define REG(x) unsigned char x; char x ## _pad[15];
59
60/*
61 * The names for these registers mostly represent speculation on my part.
62 * It will be interesting to see how close they are to the names Apple uses.
63 */
64struct swim3 {
65 REG(data);
66 REG(timer); /* counts down at 1MHz */
67 REG(error);
68 REG(mode);
69 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
70 REG(setup);
71 REG(control); /* writing bits clears them */
72 REG(status); /* writing bits sets them in control */
73 REG(intr);
74 REG(nseek); /* # tracks to seek */
75 REG(ctrack); /* current track number */
76 REG(csect); /* current sector number */
77 REG(gap3); /* size of gap 3 in track format */
78 REG(sector); /* sector # to read or write */
79 REG(nsect); /* # sectors to read or write */
80 REG(intr_enable);
81};
82
83#define control_bic control
84#define control_bis status
85
86/* Bits in select register */
87#define CA_MASK 7
88#define LSTRB 8
89
90/* Bits in control register */
91#define DO_SEEK 0x80
92#define FORMAT 0x40
93#define SELECT 0x20
94#define WRITE_SECTORS 0x10
95#define DO_ACTION 0x08
96#define DRIVE2_ENABLE 0x04
97#define DRIVE_ENABLE 0x02
98#define INTR_ENABLE 0x01
99
100/* Bits in status register */
101#define FIFO_1BYTE 0x80
102#define FIFO_2BYTE 0x40
103#define ERROR 0x20
104#define DATA 0x08
105#define RDDATA 0x04
106#define INTR_PENDING 0x02
107#define MARK_BYTE 0x01
108
109/* Bits in intr and intr_enable registers */
110#define ERROR_INTR 0x20
111#define DATA_CHANGED 0x10
112#define TRANSFER_DONE 0x08
113#define SEEN_SECTOR 0x04
114#define SEEK_DONE 0x02
115#define TIMER_DONE 0x01
116
117/* Bits in error register */
118#define ERR_DATA_CRC 0x80
119#define ERR_ADDR_CRC 0x40
120#define ERR_OVERRUN 0x04
121#define ERR_UNDERRUN 0x01
122
123/* Bits in setup register */
124#define S_SW_RESET 0x80
125#define S_GCR_WRITE 0x40
126#define S_IBM_DRIVE 0x20
127#define S_TEST_MODE 0x10
128#define S_FCLK_DIV2 0x08
129#define S_GCR 0x04
130#define S_COPY_PROT 0x02
131#define S_INV_WDATA 0x01
132
133/* Select values for swim3_action */
134#define SEEK_POSITIVE 0
135#define SEEK_NEGATIVE 4
136#define STEP 1
137#define MOTOR_ON 2
138#define MOTOR_OFF 6
139#define INDEX 3
140#define EJECT 7
141#define SETMFM 9
142#define SETGCR 13
143
144/* Select values for swim3_select and swim3_readbit */
145#define STEP_DIR 0
146#define STEPPING 1
147#define MOTOR_ON 2
148#define RELAX 3 /* also eject in progress */
149#define READ_DATA_0 4
150#define TWOMEG_DRIVE 5
151#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
152#define DRIVE_PRESENT 7
153#define DISK_IN 8
154#define WRITE_PROT 9
155#define TRACK_ZERO 10
156#define TACHO 11
157#define READ_DATA_1 12
158#define MFM_MODE 13
159#define SEEK_COMPLETE 14
160#define ONEMEG_MEDIA 15
161
162/* Definitions of values used in writing and formatting */
163#define DATA_ESCAPE 0x99
164#define GCR_SYNC_EXC 0x3f
165#define GCR_SYNC_CONV 0x80
166#define GCR_FIRST_MARK 0xd5
167#define GCR_SECOND_MARK 0xaa
168#define GCR_ADDR_MARK "\xd5\xaa\x00"
169#define GCR_DATA_MARK "\xd5\xaa\x0b"
170#define GCR_SLIP_BYTE "\x27\xaa"
171#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
172
173#define DATA_99 "\x99\x99"
174#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
175#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
176#define MFM_GAP_LEN 12
177
178struct floppy_state {
179 enum swim_state state;
180 spinlock_t lock;
181 struct swim3 __iomem *swim3; /* hardware registers */
182 struct dbdma_regs __iomem *dma; /* DMA controller registers */
183 int swim3_intr; /* interrupt number for SWIM3 */
184 int dma_intr; /* interrupt number for DMA channel */
185 int cur_cyl; /* cylinder head is on, or -1 */
186 int cur_sector; /* last sector we saw go past */
187 int req_cyl; /* the cylinder for the current r/w request */
188 int head; /* head number ditto */
189 int req_sector; /* sector number ditto */
190 int scount; /* # sectors we're transferring at present */
191 int retries;
192 int settle_time;
193 int secpercyl; /* disk geometry information */
194 int secpertrack;
195 int total_secs;
196 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
197 struct dbdma_cmd *dma_cmd;
198 int ref_count;
199 int expect_cyl;
200 struct timer_list timeout;
201 int timeout_pending;
202 int ejected;
203 wait_queue_head_t wait;
204 int wanted;
205 struct macio_dev *mdev;
206 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
207};
208
209static struct floppy_state floppy_states[MAX_FLOPPIES];
210static int floppy_count = 0;
211static DEFINE_SPINLOCK(swim3_lock);
212
213static unsigned short write_preamble[] = {
214 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
215 0, 0, 0, 0, 0, 0, /* sync field */
216 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
217 0x990f /* no escape for 512 bytes */
218};
219
220static unsigned short write_postamble[] = {
221 0x9904, /* insert CRC */
222 0x4e4e, 0x4e4e,
223 0x9908, /* stop writing */
224 0, 0, 0, 0, 0, 0
225};
226
227static void swim3_select(struct floppy_state *fs, int sel);
228static void swim3_action(struct floppy_state *fs, int action);
229static int swim3_readbit(struct floppy_state *fs, int bit);
230static void do_fd_request(struct request_queue * q);
231static void start_request(struct floppy_state *fs);
232static void set_timeout(struct floppy_state *fs, int nticks,
233 void (*proc)(unsigned long));
234static void scan_track(struct floppy_state *fs);
235static void seek_track(struct floppy_state *fs, int n);
236static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
237static void setup_transfer(struct floppy_state *fs);
238static void act(struct floppy_state *fs);
239static void scan_timeout(unsigned long data);
240static void seek_timeout(unsigned long data);
241static void settle_timeout(unsigned long data);
242static void xfer_timeout(unsigned long data);
243static irqreturn_t swim3_interrupt(int irq, void *dev_id);
244/*static void fd_dma_interrupt(int irq, void *dev_id);*/
245static int grab_drive(struct floppy_state *fs, enum swim_state state,
246 int interruptible);
247static void release_drive(struct floppy_state *fs);
248static int fd_eject(struct floppy_state *fs);
249static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
250 unsigned int cmd, unsigned long param);
251static int floppy_open(struct block_device *bdev, fmode_t mode);
252static int floppy_release(struct gendisk *disk, fmode_t mode);
253static unsigned int floppy_check_events(struct gendisk *disk,
254 unsigned int clearing);
255static int floppy_revalidate(struct gendisk *disk);
256
257static bool swim3_end_request(int err, unsigned int nr_bytes)
258{
259 if (__blk_end_request(fd_req, err, nr_bytes))
260 return true;
261
262 fd_req = NULL;
263 return false;
264}
265
266static bool swim3_end_request_cur(int err)
267{
268 return swim3_end_request(err, blk_rq_cur_bytes(fd_req));
269}
270
271static void swim3_select(struct floppy_state *fs, int sel)
272{
273 struct swim3 __iomem *sw = fs->swim3;
274
275 out_8(&sw->select, RELAX);
276 if (sel & 8)
277 out_8(&sw->control_bis, SELECT);
278 else
279 out_8(&sw->control_bic, SELECT);
280 out_8(&sw->select, sel & CA_MASK);
281}
282
283static void swim3_action(struct floppy_state *fs, int action)
284{
285 struct swim3 __iomem *sw = fs->swim3;
286
287 swim3_select(fs, action);
288 udelay(1);
289 out_8(&sw->select, sw->select | LSTRB);
290 udelay(2);
291 out_8(&sw->select, sw->select & ~LSTRB);
292 udelay(1);
293}
294
295static int swim3_readbit(struct floppy_state *fs, int bit)
296{
297 struct swim3 __iomem *sw = fs->swim3;
298 int stat;
299
300 swim3_select(fs, bit);
301 udelay(1);
302 stat = in_8(&sw->status);
303 return (stat & DATA) == 0;
304}
305
306static void do_fd_request(struct request_queue * q)
307{
308 int i;
309
310 for(i=0; i<floppy_count; i++) {
311 struct floppy_state *fs = &floppy_states[i];
312 if (fs->mdev->media_bay &&
313 check_media_bay(fs->mdev->media_bay) != MB_FD)
314 continue;
315 start_request(fs);
316 }
317}
318
319static void start_request(struct floppy_state *fs)
320{
321 struct request *req;
322 unsigned long x;
323
324 if (fs->state == idle && fs->wanted) {
325 fs->state = available;
326 wake_up(&fs->wait);
327 return;
328 }
329 while (fs->state == idle) {
330 if (!fd_req) {
331 fd_req = blk_fetch_request(swim3_queue);
332 if (!fd_req)
333 break;
334 }
335 req = fd_req;
336#if 0
337 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n",
338 req->rq_disk->disk_name, req->cmd,
339 (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer);
340 printk(" errors=%d current_nr_sectors=%u\n",
341 req->errors, blk_rq_cur_sectors(req));
342#endif
343
344 if (blk_rq_pos(req) >= fs->total_secs) {
345 swim3_end_request_cur(-EIO);
346 continue;
347 }
348 if (fs->ejected) {
349 swim3_end_request_cur(-EIO);
350 continue;
351 }
352
353 if (rq_data_dir(req) == WRITE) {
354 if (fs->write_prot < 0)
355 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
356 if (fs->write_prot) {
357 swim3_end_request_cur(-EIO);
358 continue;
359 }
360 }
361
362 /* Do not remove the cast. blk_rq_pos(req) is now a
363 * sector_t and can be 64 bits, but it will never go
364 * past 32 bits for this driver anyway, so we can
365 * safely cast it down and not have to do a 64/32
366 * division
367 */
368 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
369 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
370 fs->head = x / fs->secpertrack;
371 fs->req_sector = x % fs->secpertrack + 1;
372 fd_req = req;
373 fs->state = do_transfer;
374 fs->retries = 0;
375
376 act(fs);
377 }
378}
379
380static void set_timeout(struct floppy_state *fs, int nticks,
381 void (*proc)(unsigned long))
382{
383 unsigned long flags;
384
385 spin_lock_irqsave(&fs->lock, flags);
386 if (fs->timeout_pending)
387 del_timer(&fs->timeout);
388 fs->timeout.expires = jiffies + nticks;
389 fs->timeout.function = proc;
390 fs->timeout.data = (unsigned long) fs;
391 add_timer(&fs->timeout);
392 fs->timeout_pending = 1;
393 spin_unlock_irqrestore(&fs->lock, flags);
394}
395
396static inline void scan_track(struct floppy_state *fs)
397{
398 struct swim3 __iomem *sw = fs->swim3;
399
400 swim3_select(fs, READ_DATA_0);
401 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
402 in_8(&sw->error);
403 out_8(&sw->intr_enable, SEEN_SECTOR);
404 out_8(&sw->control_bis, DO_ACTION);
405 /* enable intr when track found */
406 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
407}
408
409static inline void seek_track(struct floppy_state *fs, int n)
410{
411 struct swim3 __iomem *sw = fs->swim3;
412
413 if (n >= 0) {
414 swim3_action(fs, SEEK_POSITIVE);
415 sw->nseek = n;
416 } else {
417 swim3_action(fs, SEEK_NEGATIVE);
418 sw->nseek = -n;
419 }
420 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
421 swim3_select(fs, STEP);
422 in_8(&sw->error);
423 /* enable intr when seek finished */
424 out_8(&sw->intr_enable, SEEK_DONE);
425 out_8(&sw->control_bis, DO_SEEK);
426 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
427 fs->settle_time = 0;
428}
429
430static inline void init_dma(struct dbdma_cmd *cp, int cmd,
431 void *buf, int count)
432{
433 st_le16(&cp->req_count, count);
434 st_le16(&cp->command, cmd);
435 st_le32(&cp->phy_addr, virt_to_bus(buf));
436 cp->xfer_status = 0;
437}
438
439static inline void setup_transfer(struct floppy_state *fs)
440{
441 int n;
442 struct swim3 __iomem *sw = fs->swim3;
443 struct dbdma_cmd *cp = fs->dma_cmd;
444 struct dbdma_regs __iomem *dr = fs->dma;
445
446 if (blk_rq_cur_sectors(fd_req) <= 0) {
447 printk(KERN_ERR "swim3: transfer 0 sectors?\n");
448 return;
449 }
450 if (rq_data_dir(fd_req) == WRITE)
451 n = 1;
452 else {
453 n = fs->secpertrack - fs->req_sector + 1;
454 if (n > blk_rq_cur_sectors(fd_req))
455 n = blk_rq_cur_sectors(fd_req);
456 }
457 fs->scount = n;
458 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
459 out_8(&sw->sector, fs->req_sector);
460 out_8(&sw->nsect, n);
461 out_8(&sw->gap3, 0);
462 out_le32(&dr->cmdptr, virt_to_bus(cp));
463 if (rq_data_dir(fd_req) == WRITE) {
464 /* Set up 3 dma commands: write preamble, data, postamble */
465 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
466 ++cp;
467 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
468 ++cp;
469 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
470 } else {
471 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
472 }
473 ++cp;
474 out_le16(&cp->command, DBDMA_STOP);
475 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
476 in_8(&sw->error);
477 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
478 if (rq_data_dir(fd_req) == WRITE)
479 out_8(&sw->control_bis, WRITE_SECTORS);
480 in_8(&sw->intr);
481 out_le32(&dr->control, (RUN << 16) | RUN);
482 /* enable intr when transfer complete */
483 out_8(&sw->intr_enable, TRANSFER_DONE);
484 out_8(&sw->control_bis, DO_ACTION);
485 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
486}
487
488static void act(struct floppy_state *fs)
489{
490 for (;;) {
491 switch (fs->state) {
492 case idle:
493 return; /* XXX shouldn't get here */
494
495 case locating:
496 if (swim3_readbit(fs, TRACK_ZERO)) {
497 fs->cur_cyl = 0;
498 if (fs->req_cyl == 0)
499 fs->state = do_transfer;
500 else
501 fs->state = seeking;
502 break;
503 }
504 scan_track(fs);
505 return;
506
507 case seeking:
508 if (fs->cur_cyl < 0) {
509 fs->expect_cyl = -1;
510 fs->state = locating;
511 break;
512 }
513 if (fs->req_cyl == fs->cur_cyl) {
514 printk("whoops, seeking 0\n");
515 fs->state = do_transfer;
516 break;
517 }
518 seek_track(fs, fs->req_cyl - fs->cur_cyl);
519 return;
520
521 case settling:
522 /* check for SEEK_COMPLETE after 30ms */
523 fs->settle_time = (HZ + 32) / 33;
524 set_timeout(fs, fs->settle_time, settle_timeout);
525 return;
526
527 case do_transfer:
528 if (fs->cur_cyl != fs->req_cyl) {
529 if (fs->retries > 5) {
530 swim3_end_request_cur(-EIO);
531 fs->state = idle;
532 return;
533 }
534 fs->state = seeking;
535 break;
536 }
537 setup_transfer(fs);
538 return;
539
540 case jogging:
541 seek_track(fs, -5);
542 return;
543
544 default:
545 printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
546 return;
547 }
548 }
549}
550
551static void scan_timeout(unsigned long data)
552{
553 struct floppy_state *fs = (struct floppy_state *) data;
554 struct swim3 __iomem *sw = fs->swim3;
555
556 fs->timeout_pending = 0;
557 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
558 out_8(&sw->select, RELAX);
559 out_8(&sw->intr_enable, 0);
560 fs->cur_cyl = -1;
561 if (fs->retries > 5) {
562 swim3_end_request_cur(-EIO);
563 fs->state = idle;
564 start_request(fs);
565 } else {
566 fs->state = jogging;
567 act(fs);
568 }
569}
570
571static void seek_timeout(unsigned long data)
572{
573 struct floppy_state *fs = (struct floppy_state *) data;
574 struct swim3 __iomem *sw = fs->swim3;
575
576 fs->timeout_pending = 0;
577 out_8(&sw->control_bic, DO_SEEK);
578 out_8(&sw->select, RELAX);
579 out_8(&sw->intr_enable, 0);
580 printk(KERN_ERR "swim3: seek timeout\n");
581 swim3_end_request_cur(-EIO);
582 fs->state = idle;
583 start_request(fs);
584}
585
586static void settle_timeout(unsigned long data)
587{
588 struct floppy_state *fs = (struct floppy_state *) data;
589 struct swim3 __iomem *sw = fs->swim3;
590
591 fs->timeout_pending = 0;
592 if (swim3_readbit(fs, SEEK_COMPLETE)) {
593 out_8(&sw->select, RELAX);
594 fs->state = locating;
595 act(fs);
596 return;
597 }
598 out_8(&sw->select, RELAX);
599 if (fs->settle_time < 2*HZ) {
600 ++fs->settle_time;
601 set_timeout(fs, 1, settle_timeout);
602 return;
603 }
604 printk(KERN_ERR "swim3: seek settle timeout\n");
605 swim3_end_request_cur(-EIO);
606 fs->state = idle;
607 start_request(fs);
608}
609
610static void xfer_timeout(unsigned long data)
611{
612 struct floppy_state *fs = (struct floppy_state *) data;
613 struct swim3 __iomem *sw = fs->swim3;
614 struct dbdma_regs __iomem *dr = fs->dma;
615 int n;
616
617 fs->timeout_pending = 0;
618 out_le32(&dr->control, RUN << 16);
619 /* We must wait a bit for dbdma to stop */
620 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
621 udelay(1);
622 out_8(&sw->intr_enable, 0);
623 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
624 out_8(&sw->select, RELAX);
625 printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
626 (rq_data_dir(fd_req)==WRITE? "writ": "read"),
627 (long)blk_rq_pos(fd_req));
628 swim3_end_request_cur(-EIO);
629 fs->state = idle;
630 start_request(fs);
631}
632
633static irqreturn_t swim3_interrupt(int irq, void *dev_id)
634{
635 struct floppy_state *fs = (struct floppy_state *) dev_id;
636 struct swim3 __iomem *sw = fs->swim3;
637 int intr, err, n;
638 int stat, resid;
639 struct dbdma_regs __iomem *dr;
640 struct dbdma_cmd *cp;
641
642 intr = in_8(&sw->intr);
643 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
644 if ((intr & ERROR_INTR) && fs->state != do_transfer)
645 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
646 fs->state, rq_data_dir(fd_req), intr, err);
647 switch (fs->state) {
648 case locating:
649 if (intr & SEEN_SECTOR) {
650 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
651 out_8(&sw->select, RELAX);
652 out_8(&sw->intr_enable, 0);
653 del_timer(&fs->timeout);
654 fs->timeout_pending = 0;
655 if (sw->ctrack == 0xff) {
656 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
657 fs->cur_cyl = -1;
658 if (fs->retries > 5) {
659 swim3_end_request_cur(-EIO);
660 fs->state = idle;
661 start_request(fs);
662 } else {
663 fs->state = jogging;
664 act(fs);
665 }
666 break;
667 }
668 fs->cur_cyl = sw->ctrack;
669 fs->cur_sector = sw->csect;
670 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
671 printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
672 fs->expect_cyl, fs->cur_cyl);
673 fs->state = do_transfer;
674 act(fs);
675 }
676 break;
677 case seeking:
678 case jogging:
679 if (sw->nseek == 0) {
680 out_8(&sw->control_bic, DO_SEEK);
681 out_8(&sw->select, RELAX);
682 out_8(&sw->intr_enable, 0);
683 del_timer(&fs->timeout);
684 fs->timeout_pending = 0;
685 if (fs->state == seeking)
686 ++fs->retries;
687 fs->state = settling;
688 act(fs);
689 }
690 break;
691 case settling:
692 out_8(&sw->intr_enable, 0);
693 del_timer(&fs->timeout);
694 fs->timeout_pending = 0;
695 act(fs);
696 break;
697 case do_transfer:
698 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
699 break;
700 out_8(&sw->intr_enable, 0);
701 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
702 out_8(&sw->select, RELAX);
703 del_timer(&fs->timeout);
704 fs->timeout_pending = 0;
705 dr = fs->dma;
706 cp = fs->dma_cmd;
707 if (rq_data_dir(fd_req) == WRITE)
708 ++cp;
709 /*
710 * Check that the main data transfer has finished.
711 * On writing, the swim3 sometimes doesn't use
712 * up all the bytes of the postamble, so we can still
713 * see DMA active here. That doesn't matter as long
714 * as all the sector data has been transferred.
715 */
716 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
717 /* wait a little while for DMA to complete */
718 for (n = 0; n < 100; ++n) {
719 if (cp->xfer_status != 0)
720 break;
721 udelay(1);
722 barrier();
723 }
724 }
725 /* turn off DMA */
726 out_le32(&dr->control, (RUN | PAUSE) << 16);
727 stat = ld_le16(&cp->xfer_status);
728 resid = ld_le16(&cp->res_count);
729 if (intr & ERROR_INTR) {
730 n = fs->scount - 1 - resid / 512;
731 if (n > 0) {
732 blk_update_request(fd_req, 0, n << 9);
733 fs->req_sector += n;
734 }
735 if (fs->retries < 5) {
736 ++fs->retries;
737 act(fs);
738 } else {
739 printk("swim3: error %sing block %ld (err=%x)\n",
740 rq_data_dir(fd_req) == WRITE? "writ": "read",
741 (long)blk_rq_pos(fd_req), err);
742 swim3_end_request_cur(-EIO);
743 fs->state = idle;
744 }
745 } else {
746 if ((stat & ACTIVE) == 0 || resid != 0) {
747 /* musta been an error */
748 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
749 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
750 fs->state, rq_data_dir(fd_req), intr, err);
751 swim3_end_request_cur(-EIO);
752 fs->state = idle;
753 start_request(fs);
754 break;
755 }
756 if (swim3_end_request(0, fs->scount << 9)) {
757 fs->req_sector += fs->scount;
758 if (fs->req_sector > fs->secpertrack) {
759 fs->req_sector -= fs->secpertrack;
760 if (++fs->head > 1) {
761 fs->head = 0;
762 ++fs->req_cyl;
763 }
764 }
765 act(fs);
766 } else
767 fs->state = idle;
768 }
769 if (fs->state == idle)
770 start_request(fs);
771 break;
772 default:
773 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
774 }
775 return IRQ_HANDLED;
776}
777
778/*
779static void fd_dma_interrupt(int irq, void *dev_id)
780{
781}
782*/
783
784static int grab_drive(struct floppy_state *fs, enum swim_state state,
785 int interruptible)
786{
787 unsigned long flags;
788
789 spin_lock_irqsave(&fs->lock, flags);
790 if (fs->state != idle) {
791 ++fs->wanted;
792 while (fs->state != available) {
793 if (interruptible && signal_pending(current)) {
794 --fs->wanted;
795 spin_unlock_irqrestore(&fs->lock, flags);
796 return -EINTR;
797 }
798 interruptible_sleep_on(&fs->wait);
799 }
800 --fs->wanted;
801 }
802 fs->state = state;
803 spin_unlock_irqrestore(&fs->lock, flags);
804 return 0;
805}
806
807static void release_drive(struct floppy_state *fs)
808{
809 unsigned long flags;
810
811 spin_lock_irqsave(&fs->lock, flags);
812 fs->state = idle;
813 start_request(fs);
814 spin_unlock_irqrestore(&fs->lock, flags);
815}
816
817static int fd_eject(struct floppy_state *fs)
818{
819 int err, n;
820
821 err = grab_drive(fs, ejecting, 1);
822 if (err)
823 return err;
824 swim3_action(fs, EJECT);
825 for (n = 20; n > 0; --n) {
826 if (signal_pending(current)) {
827 err = -EINTR;
828 break;
829 }
830 swim3_select(fs, RELAX);
831 schedule_timeout_interruptible(1);
832 if (swim3_readbit(fs, DISK_IN) == 0)
833 break;
834 }
835 swim3_select(fs, RELAX);
836 udelay(150);
837 fs->ejected = 1;
838 release_drive(fs);
839 return err;
840}
841
842static struct floppy_struct floppy_type =
843 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
844
845static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
846 unsigned int cmd, unsigned long param)
847{
848 struct floppy_state *fs = bdev->bd_disk->private_data;
849 int err;
850
851 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
852 return -EPERM;
853
854 if (fs->mdev->media_bay &&
855 check_media_bay(fs->mdev->media_bay) != MB_FD)
856 return -ENXIO;
857
858 switch (cmd) {
859 case FDEJECT:
860 if (fs->ref_count != 1)
861 return -EBUSY;
862 err = fd_eject(fs);
863 return err;
864 case FDGETPRM:
865 if (copy_to_user((void __user *) param, &floppy_type,
866 sizeof(struct floppy_struct)))
867 return -EFAULT;
868 return 0;
869 }
870 return -ENOTTY;
871}
872
873static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
874 unsigned int cmd, unsigned long param)
875{
876 int ret;
877
878 mutex_lock(&swim3_mutex);
879 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
880 mutex_unlock(&swim3_mutex);
881
882 return ret;
883}
884
885static int floppy_open(struct block_device *bdev, fmode_t mode)
886{
887 struct floppy_state *fs = bdev->bd_disk->private_data;
888 struct swim3 __iomem *sw = fs->swim3;
889 int n, err = 0;
890
891 if (fs->ref_count == 0) {
892 if (fs->mdev->media_bay &&
893 check_media_bay(fs->mdev->media_bay) != MB_FD)
894 return -ENXIO;
895 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
896 out_8(&sw->control_bic, 0xff);
897 out_8(&sw->mode, 0x95);
898 udelay(10);
899 out_8(&sw->intr_enable, 0);
900 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
901 swim3_action(fs, MOTOR_ON);
902 fs->write_prot = -1;
903 fs->cur_cyl = -1;
904 for (n = 0; n < 2 * HZ; ++n) {
905 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
906 break;
907 if (signal_pending(current)) {
908 err = -EINTR;
909 break;
910 }
911 swim3_select(fs, RELAX);
912 schedule_timeout_interruptible(1);
913 }
914 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
915 || swim3_readbit(fs, DISK_IN) == 0))
916 err = -ENXIO;
917 swim3_action(fs, SETMFM);
918 swim3_select(fs, RELAX);
919
920 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
921 return -EBUSY;
922
923 if (err == 0 && (mode & FMODE_NDELAY) == 0
924 && (mode & (FMODE_READ|FMODE_WRITE))) {
925 check_disk_change(bdev);
926 if (fs->ejected)
927 err = -ENXIO;
928 }
929
930 if (err == 0 && (mode & FMODE_WRITE)) {
931 if (fs->write_prot < 0)
932 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
933 if (fs->write_prot)
934 err = -EROFS;
935 }
936
937 if (err) {
938 if (fs->ref_count == 0) {
939 swim3_action(fs, MOTOR_OFF);
940 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
941 swim3_select(fs, RELAX);
942 }
943 return err;
944 }
945
946 if (mode & FMODE_EXCL)
947 fs->ref_count = -1;
948 else
949 ++fs->ref_count;
950
951 return 0;
952}
953
954static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
955{
956 int ret;
957
958 mutex_lock(&swim3_mutex);
959 ret = floppy_open(bdev, mode);
960 mutex_unlock(&swim3_mutex);
961
962 return ret;
963}
964
965static int floppy_release(struct gendisk *disk, fmode_t mode)
966{
967 struct floppy_state *fs = disk->private_data;
968 struct swim3 __iomem *sw = fs->swim3;
969 mutex_lock(&swim3_mutex);
970 if (fs->ref_count > 0 && --fs->ref_count == 0) {
971 swim3_action(fs, MOTOR_OFF);
972 out_8(&sw->control_bic, 0xff);
973 swim3_select(fs, RELAX);
974 }
975 mutex_unlock(&swim3_mutex);
976 return 0;
977}
978
979static unsigned int floppy_check_events(struct gendisk *disk,
980 unsigned int clearing)
981{
982 struct floppy_state *fs = disk->private_data;
983 return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
984}
985
986static int floppy_revalidate(struct gendisk *disk)
987{
988 struct floppy_state *fs = disk->private_data;
989 struct swim3 __iomem *sw;
990 int ret, n;
991
992 if (fs->mdev->media_bay &&
993 check_media_bay(fs->mdev->media_bay) != MB_FD)
994 return -ENXIO;
995
996 sw = fs->swim3;
997 grab_drive(fs, revalidating, 0);
998 out_8(&sw->intr_enable, 0);
999 out_8(&sw->control_bis, DRIVE_ENABLE);
1000 swim3_action(fs, MOTOR_ON); /* necessary? */
1001 fs->write_prot = -1;
1002 fs->cur_cyl = -1;
1003 mdelay(1);
1004 for (n = HZ; n > 0; --n) {
1005 if (swim3_readbit(fs, SEEK_COMPLETE))
1006 break;
1007 if (signal_pending(current))
1008 break;
1009 swim3_select(fs, RELAX);
1010 schedule_timeout_interruptible(1);
1011 }
1012 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1013 || swim3_readbit(fs, DISK_IN) == 0;
1014 if (ret)
1015 swim3_action(fs, MOTOR_OFF);
1016 else {
1017 fs->ejected = 0;
1018 swim3_action(fs, SETMFM);
1019 }
1020 swim3_select(fs, RELAX);
1021
1022 release_drive(fs);
1023 return ret;
1024}
1025
1026static const struct block_device_operations floppy_fops = {
1027 .open = floppy_unlocked_open,
1028 .release = floppy_release,
1029 .ioctl = floppy_ioctl,
1030 .check_events = floppy_check_events,
1031 .revalidate_disk= floppy_revalidate,
1032};
1033
1034static int swim3_add_device(struct macio_dev *mdev, int index)
1035{
1036 struct device_node *swim = mdev->ofdev.dev.of_node;
1037 struct floppy_state *fs = &floppy_states[index];
1038 int rc = -EBUSY;
1039
1040 /* Check & Request resources */
1041 if (macio_resource_count(mdev) < 2) {
1042 printk(KERN_WARNING "ifd%d: no address for %s\n",
1043 index, swim->full_name);
1044 return -ENXIO;
1045 }
1046 if (macio_irq_count(mdev) < 2) {
1047 printk(KERN_WARNING "fd%d: no intrs for device %s\n",
1048 index, swim->full_name);
1049 }
1050 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1051 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
1052 index, swim->full_name);
1053 return -EBUSY;
1054 }
1055 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1056 printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
1057 index, swim->full_name);
1058 macio_release_resource(mdev, 0);
1059 return -EBUSY;
1060 }
1061 dev_set_drvdata(&mdev->ofdev.dev, fs);
1062
1063 if (mdev->media_bay == NULL)
1064 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1065
1066 memset(fs, 0, sizeof(*fs));
1067 spin_lock_init(&fs->lock);
1068 fs->state = idle;
1069 fs->swim3 = (struct swim3 __iomem *)
1070 ioremap(macio_resource_start(mdev, 0), 0x200);
1071 if (fs->swim3 == NULL) {
1072 printk("fd%d: couldn't map registers for %s\n",
1073 index, swim->full_name);
1074 rc = -ENOMEM;
1075 goto out_release;
1076 }
1077 fs->dma = (struct dbdma_regs __iomem *)
1078 ioremap(macio_resource_start(mdev, 1), 0x200);
1079 if (fs->dma == NULL) {
1080 printk("fd%d: couldn't map DMA for %s\n",
1081 index, swim->full_name);
1082 iounmap(fs->swim3);
1083 rc = -ENOMEM;
1084 goto out_release;
1085 }
1086 fs->swim3_intr = macio_irq(mdev, 0);
1087 fs->dma_intr = macio_irq(mdev, 1);
1088 fs->cur_cyl = -1;
1089 fs->cur_sector = -1;
1090 fs->secpercyl = 36;
1091 fs->secpertrack = 18;
1092 fs->total_secs = 2880;
1093 fs->mdev = mdev;
1094 init_waitqueue_head(&fs->wait);
1095
1096 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1097 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1098 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
1099
1100 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1101 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
1102 index, fs->swim3_intr, swim->full_name);
1103 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1104 goto out_unmap;
1105 return -EBUSY;
1106 }
1107/*
1108 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
1109 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
1110 fs->dma_intr);
1111 return -EBUSY;
1112 }
1113*/
1114
1115 init_timer(&fs->timeout);
1116
1117 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
1118 mdev->media_bay ? "in media bay" : "");
1119
1120 return 0;
1121
1122 out_unmap:
1123 iounmap(fs->dma);
1124 iounmap(fs->swim3);
1125
1126 out_release:
1127 macio_release_resource(mdev, 0);
1128 macio_release_resource(mdev, 1);
1129
1130 return rc;
1131}
1132
1133static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
1134{
1135 int i, rc;
1136 struct gendisk *disk;
1137
1138 /* Add the drive */
1139 rc = swim3_add_device(mdev, floppy_count);
1140 if (rc)
1141 return rc;
1142
1143 /* Now create the queue if not there yet */
1144 if (swim3_queue == NULL) {
1145 /* If we failed, there isn't much we can do as the driver is still
1146 * too dumb to remove the device, just bail out
1147 */
1148 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1149 return 0;
1150 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
1151 if (swim3_queue == NULL) {
1152 unregister_blkdev(FLOPPY_MAJOR, "fd");
1153 return 0;
1154 }
1155 }
1156
1157 /* Now register that disk. Same comment about failure handling */
1158 i = floppy_count++;
1159 disk = disks[i] = alloc_disk(1);
1160 if (disk == NULL)
1161 return 0;
1162
1163 disk->major = FLOPPY_MAJOR;
1164 disk->first_minor = i;
1165 disk->fops = &floppy_fops;
1166 disk->private_data = &floppy_states[i];
1167 disk->queue = swim3_queue;
1168 disk->flags |= GENHD_FL_REMOVABLE;
1169 sprintf(disk->disk_name, "fd%d", i);
1170 set_capacity(disk, 2880);
1171 add_disk(disk);
1172
1173 return 0;
1174}
1175
1176static struct of_device_id swim3_match[] =
1177{
1178 {
1179 .name = "swim3",
1180 },
1181 {
1182 .compatible = "ohare-swim3"
1183 },
1184 {
1185 .compatible = "swim3"
1186 },
1187 { /* end of list */ }
1188};
1189
1190static struct macio_driver swim3_driver =
1191{
1192 .driver = {
1193 .name = "swim3",
1194 .of_match_table = swim3_match,
1195 },
1196 .probe = swim3_attach,
1197#if 0
1198 .suspend = swim3_suspend,
1199 .resume = swim3_resume,
1200#endif
1201};
1202
1203
1204int swim3_init(void)
1205{
1206 macio_register_driver(&swim3_driver);
1207 return 0;
1208}
1209
1210module_init(swim3_init)
1211
1212MODULE_LICENSE("GPL");
1213MODULE_AUTHOR("Paul Mackerras");
1214MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
1/*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19#undef DEBUG
20
21#include <linux/stddef.h>
22#include <linux/kernel.h>
23#include <linux/sched/signal.h>
24#include <linux/timer.h>
25#include <linux/delay.h>
26#include <linux/fd.h>
27#include <linux/ioctl.h>
28#include <linux/blkdev.h>
29#include <linux/interrupt.h>
30#include <linux/mutex.h>
31#include <linux/module.h>
32#include <linux/spinlock.h>
33#include <linux/wait.h>
34#include <asm/io.h>
35#include <asm/dbdma.h>
36#include <asm/prom.h>
37#include <linux/uaccess.h>
38#include <asm/mediabay.h>
39#include <asm/machdep.h>
40#include <asm/pmac_feature.h>
41
42#define MAX_FLOPPIES 2
43
44static DEFINE_MUTEX(swim3_mutex);
45static struct gendisk *disks[MAX_FLOPPIES];
46
47enum swim_state {
48 idle,
49 locating,
50 seeking,
51 settling,
52 do_transfer,
53 jogging,
54 available,
55 revalidating,
56 ejecting
57};
58
59#define REG(x) unsigned char x; char x ## _pad[15];
60
61/*
62 * The names for these registers mostly represent speculation on my part.
63 * It will be interesting to see how close they are to the names Apple uses.
64 */
65struct swim3 {
66 REG(data);
67 REG(timer); /* counts down at 1MHz */
68 REG(error);
69 REG(mode);
70 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
71 REG(setup);
72 REG(control); /* writing bits clears them */
73 REG(status); /* writing bits sets them in control */
74 REG(intr);
75 REG(nseek); /* # tracks to seek */
76 REG(ctrack); /* current track number */
77 REG(csect); /* current sector number */
78 REG(gap3); /* size of gap 3 in track format */
79 REG(sector); /* sector # to read or write */
80 REG(nsect); /* # sectors to read or write */
81 REG(intr_enable);
82};
83
84#define control_bic control
85#define control_bis status
86
87/* Bits in select register */
88#define CA_MASK 7
89#define LSTRB 8
90
91/* Bits in control register */
92#define DO_SEEK 0x80
93#define FORMAT 0x40
94#define SELECT 0x20
95#define WRITE_SECTORS 0x10
96#define DO_ACTION 0x08
97#define DRIVE2_ENABLE 0x04
98#define DRIVE_ENABLE 0x02
99#define INTR_ENABLE 0x01
100
101/* Bits in status register */
102#define FIFO_1BYTE 0x80
103#define FIFO_2BYTE 0x40
104#define ERROR 0x20
105#define DATA 0x08
106#define RDDATA 0x04
107#define INTR_PENDING 0x02
108#define MARK_BYTE 0x01
109
110/* Bits in intr and intr_enable registers */
111#define ERROR_INTR 0x20
112#define DATA_CHANGED 0x10
113#define TRANSFER_DONE 0x08
114#define SEEN_SECTOR 0x04
115#define SEEK_DONE 0x02
116#define TIMER_DONE 0x01
117
118/* Bits in error register */
119#define ERR_DATA_CRC 0x80
120#define ERR_ADDR_CRC 0x40
121#define ERR_OVERRUN 0x04
122#define ERR_UNDERRUN 0x01
123
124/* Bits in setup register */
125#define S_SW_RESET 0x80
126#define S_GCR_WRITE 0x40
127#define S_IBM_DRIVE 0x20
128#define S_TEST_MODE 0x10
129#define S_FCLK_DIV2 0x08
130#define S_GCR 0x04
131#define S_COPY_PROT 0x02
132#define S_INV_WDATA 0x01
133
134/* Select values for swim3_action */
135#define SEEK_POSITIVE 0
136#define SEEK_NEGATIVE 4
137#define STEP 1
138#define MOTOR_ON 2
139#define MOTOR_OFF 6
140#define INDEX 3
141#define EJECT 7
142#define SETMFM 9
143#define SETGCR 13
144
145/* Select values for swim3_select and swim3_readbit */
146#define STEP_DIR 0
147#define STEPPING 1
148#define MOTOR_ON 2
149#define RELAX 3 /* also eject in progress */
150#define READ_DATA_0 4
151#define ONEMEG_DRIVE 5
152#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
153#define DRIVE_PRESENT 7
154#define DISK_IN 8
155#define WRITE_PROT 9
156#define TRACK_ZERO 10
157#define TACHO 11
158#define READ_DATA_1 12
159#define GCR_MODE 13
160#define SEEK_COMPLETE 14
161#define TWOMEG_MEDIA 15
162
163/* Definitions of values used in writing and formatting */
164#define DATA_ESCAPE 0x99
165#define GCR_SYNC_EXC 0x3f
166#define GCR_SYNC_CONV 0x80
167#define GCR_FIRST_MARK 0xd5
168#define GCR_SECOND_MARK 0xaa
169#define GCR_ADDR_MARK "\xd5\xaa\x00"
170#define GCR_DATA_MARK "\xd5\xaa\x0b"
171#define GCR_SLIP_BYTE "\x27\xaa"
172#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
173
174#define DATA_99 "\x99\x99"
175#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
176#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
177#define MFM_GAP_LEN 12
178
179struct floppy_state {
180 enum swim_state state;
181 struct swim3 __iomem *swim3; /* hardware registers */
182 struct dbdma_regs __iomem *dma; /* DMA controller registers */
183 int swim3_intr; /* interrupt number for SWIM3 */
184 int dma_intr; /* interrupt number for DMA channel */
185 int cur_cyl; /* cylinder head is on, or -1 */
186 int cur_sector; /* last sector we saw go past */
187 int req_cyl; /* the cylinder for the current r/w request */
188 int head; /* head number ditto */
189 int req_sector; /* sector number ditto */
190 int scount; /* # sectors we're transferring at present */
191 int retries;
192 int settle_time;
193 int secpercyl; /* disk geometry information */
194 int secpertrack;
195 int total_secs;
196 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
197 struct dbdma_cmd *dma_cmd;
198 int ref_count;
199 int expect_cyl;
200 struct timer_list timeout;
201 int timeout_pending;
202 int ejected;
203 wait_queue_head_t wait;
204 int wanted;
205 struct macio_dev *mdev;
206 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
207 int index;
208 struct request *cur_req;
209};
210
211#define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
212#define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
213#define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
214
215#ifdef DEBUG
216#define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
217#else
218#define swim3_dbg(fmt, arg...) do { } while(0)
219#endif
220
221static struct floppy_state floppy_states[MAX_FLOPPIES];
222static int floppy_count = 0;
223static DEFINE_SPINLOCK(swim3_lock);
224
225static unsigned short write_preamble[] = {
226 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
227 0, 0, 0, 0, 0, 0, /* sync field */
228 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
229 0x990f /* no escape for 512 bytes */
230};
231
232static unsigned short write_postamble[] = {
233 0x9904, /* insert CRC */
234 0x4e4e, 0x4e4e,
235 0x9908, /* stop writing */
236 0, 0, 0, 0, 0, 0
237};
238
239static void seek_track(struct floppy_state *fs, int n);
240static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
241static void act(struct floppy_state *fs);
242static void scan_timeout(struct timer_list *t);
243static void seek_timeout(struct timer_list *t);
244static void settle_timeout(struct timer_list *t);
245static void xfer_timeout(struct timer_list *t);
246static irqreturn_t swim3_interrupt(int irq, void *dev_id);
247/*static void fd_dma_interrupt(int irq, void *dev_id);*/
248static int grab_drive(struct floppy_state *fs, enum swim_state state,
249 int interruptible);
250static void release_drive(struct floppy_state *fs);
251static int fd_eject(struct floppy_state *fs);
252static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
253 unsigned int cmd, unsigned long param);
254static int floppy_open(struct block_device *bdev, fmode_t mode);
255static void floppy_release(struct gendisk *disk, fmode_t mode);
256static unsigned int floppy_check_events(struct gendisk *disk,
257 unsigned int clearing);
258static int floppy_revalidate(struct gendisk *disk);
259
260static bool swim3_end_request(struct floppy_state *fs, blk_status_t err, unsigned int nr_bytes)
261{
262 struct request *req = fs->cur_req;
263 int rc;
264
265 swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
266 err, nr_bytes, req);
267
268 if (err)
269 nr_bytes = blk_rq_cur_bytes(req);
270 rc = __blk_end_request(req, err, nr_bytes);
271 if (rc)
272 return true;
273 fs->cur_req = NULL;
274 return false;
275}
276
277static void swim3_select(struct floppy_state *fs, int sel)
278{
279 struct swim3 __iomem *sw = fs->swim3;
280
281 out_8(&sw->select, RELAX);
282 if (sel & 8)
283 out_8(&sw->control_bis, SELECT);
284 else
285 out_8(&sw->control_bic, SELECT);
286 out_8(&sw->select, sel & CA_MASK);
287}
288
289static void swim3_action(struct floppy_state *fs, int action)
290{
291 struct swim3 __iomem *sw = fs->swim3;
292
293 swim3_select(fs, action);
294 udelay(1);
295 out_8(&sw->select, sw->select | LSTRB);
296 udelay(2);
297 out_8(&sw->select, sw->select & ~LSTRB);
298 udelay(1);
299}
300
301static int swim3_readbit(struct floppy_state *fs, int bit)
302{
303 struct swim3 __iomem *sw = fs->swim3;
304 int stat;
305
306 swim3_select(fs, bit);
307 udelay(1);
308 stat = in_8(&sw->status);
309 return (stat & DATA) == 0;
310}
311
312static void start_request(struct floppy_state *fs)
313{
314 struct request *req;
315 unsigned long x;
316
317 swim3_dbg("start request, initial state=%d\n", fs->state);
318
319 if (fs->state == idle && fs->wanted) {
320 fs->state = available;
321 wake_up(&fs->wait);
322 return;
323 }
324 while (fs->state == idle) {
325 swim3_dbg("start request, idle loop, cur_req=%p\n", fs->cur_req);
326 if (!fs->cur_req) {
327 fs->cur_req = blk_fetch_request(disks[fs->index]->queue);
328 swim3_dbg(" fetched request %p\n", fs->cur_req);
329 if (!fs->cur_req)
330 break;
331 }
332 req = fs->cur_req;
333
334 if (fs->mdev->media_bay &&
335 check_media_bay(fs->mdev->media_bay) != MB_FD) {
336 swim3_dbg("%s", " media bay absent, dropping req\n");
337 swim3_end_request(fs, BLK_STS_IOERR, 0);
338 continue;
339 }
340
341#if 0 /* This is really too verbose */
342 swim3_dbg("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n",
343 req->rq_disk->disk_name, req->cmd,
344 (long)blk_rq_pos(req), blk_rq_sectors(req),
345 bio_data(req->bio));
346 swim3_dbg(" current_nr_sectors=%u\n",
347 blk_rq_cur_sectors(req));
348#endif
349
350 if (blk_rq_pos(req) >= fs->total_secs) {
351 swim3_dbg(" pos out of bounds (%ld, max is %ld)\n",
352 (long)blk_rq_pos(req), (long)fs->total_secs);
353 swim3_end_request(fs, BLK_STS_IOERR, 0);
354 continue;
355 }
356 if (fs->ejected) {
357 swim3_dbg("%s", " disk ejected\n");
358 swim3_end_request(fs, BLK_STS_IOERR, 0);
359 continue;
360 }
361
362 if (rq_data_dir(req) == WRITE) {
363 if (fs->write_prot < 0)
364 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
365 if (fs->write_prot) {
366 swim3_dbg("%s", " try to write, disk write protected\n");
367 swim3_end_request(fs, BLK_STS_IOERR, 0);
368 continue;
369 }
370 }
371
372 /* Do not remove the cast. blk_rq_pos(req) is now a
373 * sector_t and can be 64 bits, but it will never go
374 * past 32 bits for this driver anyway, so we can
375 * safely cast it down and not have to do a 64/32
376 * division
377 */
378 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
379 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
380 fs->head = x / fs->secpertrack;
381 fs->req_sector = x % fs->secpertrack + 1;
382 fs->state = do_transfer;
383 fs->retries = 0;
384
385 act(fs);
386 }
387}
388
389static void do_fd_request(struct request_queue * q)
390{
391 start_request(q->queuedata);
392}
393
394static void set_timeout(struct floppy_state *fs, int nticks,
395 void (*proc)(struct timer_list *t))
396{
397 if (fs->timeout_pending)
398 del_timer(&fs->timeout);
399 fs->timeout.expires = jiffies + nticks;
400 fs->timeout.function = proc;
401 add_timer(&fs->timeout);
402 fs->timeout_pending = 1;
403}
404
405static inline void scan_track(struct floppy_state *fs)
406{
407 struct swim3 __iomem *sw = fs->swim3;
408
409 swim3_select(fs, READ_DATA_0);
410 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
411 in_8(&sw->error);
412 out_8(&sw->intr_enable, SEEN_SECTOR);
413 out_8(&sw->control_bis, DO_ACTION);
414 /* enable intr when track found */
415 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
416}
417
418static inline void seek_track(struct floppy_state *fs, int n)
419{
420 struct swim3 __iomem *sw = fs->swim3;
421
422 if (n >= 0) {
423 swim3_action(fs, SEEK_POSITIVE);
424 sw->nseek = n;
425 } else {
426 swim3_action(fs, SEEK_NEGATIVE);
427 sw->nseek = -n;
428 }
429 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
430 swim3_select(fs, STEP);
431 in_8(&sw->error);
432 /* enable intr when seek finished */
433 out_8(&sw->intr_enable, SEEK_DONE);
434 out_8(&sw->control_bis, DO_SEEK);
435 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
436 fs->settle_time = 0;
437}
438
439static inline void init_dma(struct dbdma_cmd *cp, int cmd,
440 void *buf, int count)
441{
442 cp->req_count = cpu_to_le16(count);
443 cp->command = cpu_to_le16(cmd);
444 cp->phy_addr = cpu_to_le32(virt_to_bus(buf));
445 cp->xfer_status = 0;
446}
447
448static inline void setup_transfer(struct floppy_state *fs)
449{
450 int n;
451 struct swim3 __iomem *sw = fs->swim3;
452 struct dbdma_cmd *cp = fs->dma_cmd;
453 struct dbdma_regs __iomem *dr = fs->dma;
454 struct request *req = fs->cur_req;
455
456 if (blk_rq_cur_sectors(req) <= 0) {
457 swim3_warn("%s", "Transfer 0 sectors ?\n");
458 return;
459 }
460 if (rq_data_dir(req) == WRITE)
461 n = 1;
462 else {
463 n = fs->secpertrack - fs->req_sector + 1;
464 if (n > blk_rq_cur_sectors(req))
465 n = blk_rq_cur_sectors(req);
466 }
467
468 swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
469 fs->req_sector, fs->secpertrack, fs->head, n);
470
471 fs->scount = n;
472 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
473 out_8(&sw->sector, fs->req_sector);
474 out_8(&sw->nsect, n);
475 out_8(&sw->gap3, 0);
476 out_le32(&dr->cmdptr, virt_to_bus(cp));
477 if (rq_data_dir(req) == WRITE) {
478 /* Set up 3 dma commands: write preamble, data, postamble */
479 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
480 ++cp;
481 init_dma(cp, OUTPUT_MORE, bio_data(req->bio), 512);
482 ++cp;
483 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
484 } else {
485 init_dma(cp, INPUT_LAST, bio_data(req->bio), n * 512);
486 }
487 ++cp;
488 out_le16(&cp->command, DBDMA_STOP);
489 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
490 in_8(&sw->error);
491 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
492 if (rq_data_dir(req) == WRITE)
493 out_8(&sw->control_bis, WRITE_SECTORS);
494 in_8(&sw->intr);
495 out_le32(&dr->control, (RUN << 16) | RUN);
496 /* enable intr when transfer complete */
497 out_8(&sw->intr_enable, TRANSFER_DONE);
498 out_8(&sw->control_bis, DO_ACTION);
499 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
500}
501
502static void act(struct floppy_state *fs)
503{
504 for (;;) {
505 swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
506 fs->state, fs->req_cyl, fs->cur_cyl);
507
508 switch (fs->state) {
509 case idle:
510 return; /* XXX shouldn't get here */
511
512 case locating:
513 if (swim3_readbit(fs, TRACK_ZERO)) {
514 swim3_dbg("%s", " locate track 0\n");
515 fs->cur_cyl = 0;
516 if (fs->req_cyl == 0)
517 fs->state = do_transfer;
518 else
519 fs->state = seeking;
520 break;
521 }
522 scan_track(fs);
523 return;
524
525 case seeking:
526 if (fs->cur_cyl < 0) {
527 fs->expect_cyl = -1;
528 fs->state = locating;
529 break;
530 }
531 if (fs->req_cyl == fs->cur_cyl) {
532 swim3_warn("%s", "Whoops, seeking 0\n");
533 fs->state = do_transfer;
534 break;
535 }
536 seek_track(fs, fs->req_cyl - fs->cur_cyl);
537 return;
538
539 case settling:
540 /* check for SEEK_COMPLETE after 30ms */
541 fs->settle_time = (HZ + 32) / 33;
542 set_timeout(fs, fs->settle_time, settle_timeout);
543 return;
544
545 case do_transfer:
546 if (fs->cur_cyl != fs->req_cyl) {
547 if (fs->retries > 5) {
548 swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
549 fs->req_cyl, fs->cur_cyl);
550 swim3_end_request(fs, BLK_STS_IOERR, 0);
551 fs->state = idle;
552 return;
553 }
554 fs->state = seeking;
555 break;
556 }
557 setup_transfer(fs);
558 return;
559
560 case jogging:
561 seek_track(fs, -5);
562 return;
563
564 default:
565 swim3_err("Unknown state %d\n", fs->state);
566 return;
567 }
568 }
569}
570
571static void scan_timeout(struct timer_list *t)
572{
573 struct floppy_state *fs = from_timer(fs, t, timeout);
574 struct swim3 __iomem *sw = fs->swim3;
575 unsigned long flags;
576
577 swim3_dbg("* scan timeout, state=%d\n", fs->state);
578
579 spin_lock_irqsave(&swim3_lock, flags);
580 fs->timeout_pending = 0;
581 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
582 out_8(&sw->select, RELAX);
583 out_8(&sw->intr_enable, 0);
584 fs->cur_cyl = -1;
585 if (fs->retries > 5) {
586 swim3_end_request(fs, BLK_STS_IOERR, 0);
587 fs->state = idle;
588 start_request(fs);
589 } else {
590 fs->state = jogging;
591 act(fs);
592 }
593 spin_unlock_irqrestore(&swim3_lock, flags);
594}
595
596static void seek_timeout(struct timer_list *t)
597{
598 struct floppy_state *fs = from_timer(fs, t, timeout);
599 struct swim3 __iomem *sw = fs->swim3;
600 unsigned long flags;
601
602 swim3_dbg("* seek timeout, state=%d\n", fs->state);
603
604 spin_lock_irqsave(&swim3_lock, flags);
605 fs->timeout_pending = 0;
606 out_8(&sw->control_bic, DO_SEEK);
607 out_8(&sw->select, RELAX);
608 out_8(&sw->intr_enable, 0);
609 swim3_err("%s", "Seek timeout\n");
610 swim3_end_request(fs, BLK_STS_IOERR, 0);
611 fs->state = idle;
612 start_request(fs);
613 spin_unlock_irqrestore(&swim3_lock, flags);
614}
615
616static void settle_timeout(struct timer_list *t)
617{
618 struct floppy_state *fs = from_timer(fs, t, timeout);
619 struct swim3 __iomem *sw = fs->swim3;
620 unsigned long flags;
621
622 swim3_dbg("* settle timeout, state=%d\n", fs->state);
623
624 spin_lock_irqsave(&swim3_lock, flags);
625 fs->timeout_pending = 0;
626 if (swim3_readbit(fs, SEEK_COMPLETE)) {
627 out_8(&sw->select, RELAX);
628 fs->state = locating;
629 act(fs);
630 goto unlock;
631 }
632 out_8(&sw->select, RELAX);
633 if (fs->settle_time < 2*HZ) {
634 ++fs->settle_time;
635 set_timeout(fs, 1, settle_timeout);
636 goto unlock;
637 }
638 swim3_err("%s", "Seek settle timeout\n");
639 swim3_end_request(fs, BLK_STS_IOERR, 0);
640 fs->state = idle;
641 start_request(fs);
642 unlock:
643 spin_unlock_irqrestore(&swim3_lock, flags);
644}
645
646static void xfer_timeout(struct timer_list *t)
647{
648 struct floppy_state *fs = from_timer(fs, t, timeout);
649 struct swim3 __iomem *sw = fs->swim3;
650 struct dbdma_regs __iomem *dr = fs->dma;
651 unsigned long flags;
652 int n;
653
654 swim3_dbg("* xfer timeout, state=%d\n", fs->state);
655
656 spin_lock_irqsave(&swim3_lock, flags);
657 fs->timeout_pending = 0;
658 out_le32(&dr->control, RUN << 16);
659 /* We must wait a bit for dbdma to stop */
660 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
661 udelay(1);
662 out_8(&sw->intr_enable, 0);
663 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
664 out_8(&sw->select, RELAX);
665 swim3_err("Timeout %sing sector %ld\n",
666 (rq_data_dir(fs->cur_req)==WRITE? "writ": "read"),
667 (long)blk_rq_pos(fs->cur_req));
668 swim3_end_request(fs, BLK_STS_IOERR, 0);
669 fs->state = idle;
670 start_request(fs);
671 spin_unlock_irqrestore(&swim3_lock, flags);
672}
673
674static irqreturn_t swim3_interrupt(int irq, void *dev_id)
675{
676 struct floppy_state *fs = (struct floppy_state *) dev_id;
677 struct swim3 __iomem *sw = fs->swim3;
678 int intr, err, n;
679 int stat, resid;
680 struct dbdma_regs __iomem *dr;
681 struct dbdma_cmd *cp;
682 unsigned long flags;
683 struct request *req = fs->cur_req;
684
685 swim3_dbg("* interrupt, state=%d\n", fs->state);
686
687 spin_lock_irqsave(&swim3_lock, flags);
688 intr = in_8(&sw->intr);
689 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
690 if ((intr & ERROR_INTR) && fs->state != do_transfer)
691 swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
692 fs->state, rq_data_dir(req), intr, err);
693 switch (fs->state) {
694 case locating:
695 if (intr & SEEN_SECTOR) {
696 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
697 out_8(&sw->select, RELAX);
698 out_8(&sw->intr_enable, 0);
699 del_timer(&fs->timeout);
700 fs->timeout_pending = 0;
701 if (sw->ctrack == 0xff) {
702 swim3_err("%s", "Seen sector but cyl=ff?\n");
703 fs->cur_cyl = -1;
704 if (fs->retries > 5) {
705 swim3_end_request(fs, BLK_STS_IOERR, 0);
706 fs->state = idle;
707 start_request(fs);
708 } else {
709 fs->state = jogging;
710 act(fs);
711 }
712 break;
713 }
714 fs->cur_cyl = sw->ctrack;
715 fs->cur_sector = sw->csect;
716 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
717 swim3_err("Expected cyl %d, got %d\n",
718 fs->expect_cyl, fs->cur_cyl);
719 fs->state = do_transfer;
720 act(fs);
721 }
722 break;
723 case seeking:
724 case jogging:
725 if (sw->nseek == 0) {
726 out_8(&sw->control_bic, DO_SEEK);
727 out_8(&sw->select, RELAX);
728 out_8(&sw->intr_enable, 0);
729 del_timer(&fs->timeout);
730 fs->timeout_pending = 0;
731 if (fs->state == seeking)
732 ++fs->retries;
733 fs->state = settling;
734 act(fs);
735 }
736 break;
737 case settling:
738 out_8(&sw->intr_enable, 0);
739 del_timer(&fs->timeout);
740 fs->timeout_pending = 0;
741 act(fs);
742 break;
743 case do_transfer:
744 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
745 break;
746 out_8(&sw->intr_enable, 0);
747 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
748 out_8(&sw->select, RELAX);
749 del_timer(&fs->timeout);
750 fs->timeout_pending = 0;
751 dr = fs->dma;
752 cp = fs->dma_cmd;
753 if (rq_data_dir(req) == WRITE)
754 ++cp;
755 /*
756 * Check that the main data transfer has finished.
757 * On writing, the swim3 sometimes doesn't use
758 * up all the bytes of the postamble, so we can still
759 * see DMA active here. That doesn't matter as long
760 * as all the sector data has been transferred.
761 */
762 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
763 /* wait a little while for DMA to complete */
764 for (n = 0; n < 100; ++n) {
765 if (cp->xfer_status != 0)
766 break;
767 udelay(1);
768 barrier();
769 }
770 }
771 /* turn off DMA */
772 out_le32(&dr->control, (RUN | PAUSE) << 16);
773 stat = le16_to_cpu(cp->xfer_status);
774 resid = le16_to_cpu(cp->res_count);
775 if (intr & ERROR_INTR) {
776 n = fs->scount - 1 - resid / 512;
777 if (n > 0) {
778 blk_update_request(req, 0, n << 9);
779 fs->req_sector += n;
780 }
781 if (fs->retries < 5) {
782 ++fs->retries;
783 act(fs);
784 } else {
785 swim3_err("Error %sing block %ld (err=%x)\n",
786 rq_data_dir(req) == WRITE? "writ": "read",
787 (long)blk_rq_pos(req), err);
788 swim3_end_request(fs, BLK_STS_IOERR, 0);
789 fs->state = idle;
790 }
791 } else {
792 if ((stat & ACTIVE) == 0 || resid != 0) {
793 /* musta been an error */
794 swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid);
795 swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
796 fs->state, rq_data_dir(req), intr, err);
797 swim3_end_request(fs, BLK_STS_IOERR, 0);
798 fs->state = idle;
799 start_request(fs);
800 break;
801 }
802 fs->retries = 0;
803 if (swim3_end_request(fs, 0, fs->scount << 9)) {
804 fs->req_sector += fs->scount;
805 if (fs->req_sector > fs->secpertrack) {
806 fs->req_sector -= fs->secpertrack;
807 if (++fs->head > 1) {
808 fs->head = 0;
809 ++fs->req_cyl;
810 }
811 }
812 act(fs);
813 } else
814 fs->state = idle;
815 }
816 if (fs->state == idle)
817 start_request(fs);
818 break;
819 default:
820 swim3_err("Don't know what to do in state %d\n", fs->state);
821 }
822 spin_unlock_irqrestore(&swim3_lock, flags);
823 return IRQ_HANDLED;
824}
825
826/*
827static void fd_dma_interrupt(int irq, void *dev_id)
828{
829}
830*/
831
832/* Called under the mutex to grab exclusive access to a drive */
833static int grab_drive(struct floppy_state *fs, enum swim_state state,
834 int interruptible)
835{
836 unsigned long flags;
837
838 swim3_dbg("%s", "-> grab drive\n");
839
840 spin_lock_irqsave(&swim3_lock, flags);
841 if (fs->state != idle && fs->state != available) {
842 ++fs->wanted;
843 /* this will enable irqs in order to sleep */
844 if (!interruptible)
845 wait_event_lock_irq(fs->wait,
846 fs->state == available,
847 swim3_lock);
848 else if (wait_event_interruptible_lock_irq(fs->wait,
849 fs->state == available,
850 swim3_lock)) {
851 --fs->wanted;
852 spin_unlock_irqrestore(&swim3_lock, flags);
853 return -EINTR;
854 }
855 --fs->wanted;
856 }
857 fs->state = state;
858 spin_unlock_irqrestore(&swim3_lock, flags);
859
860 return 0;
861}
862
863static void release_drive(struct floppy_state *fs)
864{
865 unsigned long flags;
866
867 swim3_dbg("%s", "-> release drive\n");
868
869 spin_lock_irqsave(&swim3_lock, flags);
870 fs->state = idle;
871 start_request(fs);
872 spin_unlock_irqrestore(&swim3_lock, flags);
873}
874
875static int fd_eject(struct floppy_state *fs)
876{
877 int err, n;
878
879 err = grab_drive(fs, ejecting, 1);
880 if (err)
881 return err;
882 swim3_action(fs, EJECT);
883 for (n = 20; n > 0; --n) {
884 if (signal_pending(current)) {
885 err = -EINTR;
886 break;
887 }
888 swim3_select(fs, RELAX);
889 schedule_timeout_interruptible(1);
890 if (swim3_readbit(fs, DISK_IN) == 0)
891 break;
892 }
893 swim3_select(fs, RELAX);
894 udelay(150);
895 fs->ejected = 1;
896 release_drive(fs);
897 return err;
898}
899
900static struct floppy_struct floppy_type =
901 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
902
903static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
904 unsigned int cmd, unsigned long param)
905{
906 struct floppy_state *fs = bdev->bd_disk->private_data;
907 int err;
908
909 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
910 return -EPERM;
911
912 if (fs->mdev->media_bay &&
913 check_media_bay(fs->mdev->media_bay) != MB_FD)
914 return -ENXIO;
915
916 switch (cmd) {
917 case FDEJECT:
918 if (fs->ref_count != 1)
919 return -EBUSY;
920 err = fd_eject(fs);
921 return err;
922 case FDGETPRM:
923 if (copy_to_user((void __user *) param, &floppy_type,
924 sizeof(struct floppy_struct)))
925 return -EFAULT;
926 return 0;
927 }
928 return -ENOTTY;
929}
930
931static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
932 unsigned int cmd, unsigned long param)
933{
934 int ret;
935
936 mutex_lock(&swim3_mutex);
937 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
938 mutex_unlock(&swim3_mutex);
939
940 return ret;
941}
942
943static int floppy_open(struct block_device *bdev, fmode_t mode)
944{
945 struct floppy_state *fs = bdev->bd_disk->private_data;
946 struct swim3 __iomem *sw = fs->swim3;
947 int n, err = 0;
948
949 if (fs->ref_count == 0) {
950 if (fs->mdev->media_bay &&
951 check_media_bay(fs->mdev->media_bay) != MB_FD)
952 return -ENXIO;
953 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
954 out_8(&sw->control_bic, 0xff);
955 out_8(&sw->mode, 0x95);
956 udelay(10);
957 out_8(&sw->intr_enable, 0);
958 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
959 swim3_action(fs, MOTOR_ON);
960 fs->write_prot = -1;
961 fs->cur_cyl = -1;
962 for (n = 0; n < 2 * HZ; ++n) {
963 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
964 break;
965 if (signal_pending(current)) {
966 err = -EINTR;
967 break;
968 }
969 swim3_select(fs, RELAX);
970 schedule_timeout_interruptible(1);
971 }
972 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
973 || swim3_readbit(fs, DISK_IN) == 0))
974 err = -ENXIO;
975 swim3_action(fs, SETMFM);
976 swim3_select(fs, RELAX);
977
978 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
979 return -EBUSY;
980
981 if (err == 0 && (mode & FMODE_NDELAY) == 0
982 && (mode & (FMODE_READ|FMODE_WRITE))) {
983 check_disk_change(bdev);
984 if (fs->ejected)
985 err = -ENXIO;
986 }
987
988 if (err == 0 && (mode & FMODE_WRITE)) {
989 if (fs->write_prot < 0)
990 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
991 if (fs->write_prot)
992 err = -EROFS;
993 }
994
995 if (err) {
996 if (fs->ref_count == 0) {
997 swim3_action(fs, MOTOR_OFF);
998 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
999 swim3_select(fs, RELAX);
1000 }
1001 return err;
1002 }
1003
1004 if (mode & FMODE_EXCL)
1005 fs->ref_count = -1;
1006 else
1007 ++fs->ref_count;
1008
1009 return 0;
1010}
1011
1012static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
1013{
1014 int ret;
1015
1016 mutex_lock(&swim3_mutex);
1017 ret = floppy_open(bdev, mode);
1018 mutex_unlock(&swim3_mutex);
1019
1020 return ret;
1021}
1022
1023static void floppy_release(struct gendisk *disk, fmode_t mode)
1024{
1025 struct floppy_state *fs = disk->private_data;
1026 struct swim3 __iomem *sw = fs->swim3;
1027
1028 mutex_lock(&swim3_mutex);
1029 if (fs->ref_count > 0 && --fs->ref_count == 0) {
1030 swim3_action(fs, MOTOR_OFF);
1031 out_8(&sw->control_bic, 0xff);
1032 swim3_select(fs, RELAX);
1033 }
1034 mutex_unlock(&swim3_mutex);
1035}
1036
1037static unsigned int floppy_check_events(struct gendisk *disk,
1038 unsigned int clearing)
1039{
1040 struct floppy_state *fs = disk->private_data;
1041 return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
1042}
1043
1044static int floppy_revalidate(struct gendisk *disk)
1045{
1046 struct floppy_state *fs = disk->private_data;
1047 struct swim3 __iomem *sw;
1048 int ret, n;
1049
1050 if (fs->mdev->media_bay &&
1051 check_media_bay(fs->mdev->media_bay) != MB_FD)
1052 return -ENXIO;
1053
1054 sw = fs->swim3;
1055 grab_drive(fs, revalidating, 0);
1056 out_8(&sw->intr_enable, 0);
1057 out_8(&sw->control_bis, DRIVE_ENABLE);
1058 swim3_action(fs, MOTOR_ON); /* necessary? */
1059 fs->write_prot = -1;
1060 fs->cur_cyl = -1;
1061 mdelay(1);
1062 for (n = HZ; n > 0; --n) {
1063 if (swim3_readbit(fs, SEEK_COMPLETE))
1064 break;
1065 if (signal_pending(current))
1066 break;
1067 swim3_select(fs, RELAX);
1068 schedule_timeout_interruptible(1);
1069 }
1070 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1071 || swim3_readbit(fs, DISK_IN) == 0;
1072 if (ret)
1073 swim3_action(fs, MOTOR_OFF);
1074 else {
1075 fs->ejected = 0;
1076 swim3_action(fs, SETMFM);
1077 }
1078 swim3_select(fs, RELAX);
1079
1080 release_drive(fs);
1081 return ret;
1082}
1083
1084static const struct block_device_operations floppy_fops = {
1085 .open = floppy_unlocked_open,
1086 .release = floppy_release,
1087 .ioctl = floppy_ioctl,
1088 .check_events = floppy_check_events,
1089 .revalidate_disk= floppy_revalidate,
1090};
1091
1092static void swim3_mb_event(struct macio_dev* mdev, int mb_state)
1093{
1094 struct floppy_state *fs = macio_get_drvdata(mdev);
1095 struct swim3 __iomem *sw;
1096
1097 if (!fs)
1098 return;
1099
1100 sw = fs->swim3;
1101
1102 if (mb_state != MB_FD)
1103 return;
1104
1105 /* Clear state */
1106 out_8(&sw->intr_enable, 0);
1107 in_8(&sw->intr);
1108 in_8(&sw->error);
1109}
1110
1111static int swim3_add_device(struct macio_dev *mdev, int index)
1112{
1113 struct device_node *swim = mdev->ofdev.dev.of_node;
1114 struct floppy_state *fs = &floppy_states[index];
1115 int rc = -EBUSY;
1116
1117 /* Do this first for message macros */
1118 memset(fs, 0, sizeof(*fs));
1119 fs->mdev = mdev;
1120 fs->index = index;
1121
1122 /* Check & Request resources */
1123 if (macio_resource_count(mdev) < 2) {
1124 swim3_err("%s", "No address in device-tree\n");
1125 return -ENXIO;
1126 }
1127 if (macio_irq_count(mdev) < 1) {
1128 swim3_err("%s", "No interrupt in device-tree\n");
1129 return -ENXIO;
1130 }
1131 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1132 swim3_err("%s", "Can't request mmio resource\n");
1133 return -EBUSY;
1134 }
1135 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1136 swim3_err("%s", "Can't request dma resource\n");
1137 macio_release_resource(mdev, 0);
1138 return -EBUSY;
1139 }
1140 dev_set_drvdata(&mdev->ofdev.dev, fs);
1141
1142 if (mdev->media_bay == NULL)
1143 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1144
1145 fs->state = idle;
1146 fs->swim3 = (struct swim3 __iomem *)
1147 ioremap(macio_resource_start(mdev, 0), 0x200);
1148 if (fs->swim3 == NULL) {
1149 swim3_err("%s", "Couldn't map mmio registers\n");
1150 rc = -ENOMEM;
1151 goto out_release;
1152 }
1153 fs->dma = (struct dbdma_regs __iomem *)
1154 ioremap(macio_resource_start(mdev, 1), 0x200);
1155 if (fs->dma == NULL) {
1156 swim3_err("%s", "Couldn't map dma registers\n");
1157 iounmap(fs->swim3);
1158 rc = -ENOMEM;
1159 goto out_release;
1160 }
1161 fs->swim3_intr = macio_irq(mdev, 0);
1162 fs->dma_intr = macio_irq(mdev, 1);
1163 fs->cur_cyl = -1;
1164 fs->cur_sector = -1;
1165 fs->secpercyl = 36;
1166 fs->secpertrack = 18;
1167 fs->total_secs = 2880;
1168 init_waitqueue_head(&fs->wait);
1169
1170 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1171 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1172 fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
1173
1174 if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
1175 swim3_mb_event(mdev, MB_FD);
1176
1177 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1178 swim3_err("%s", "Couldn't request interrupt\n");
1179 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1180 goto out_unmap;
1181 return -EBUSY;
1182 }
1183
1184 timer_setup(&fs->timeout, NULL, 0);
1185
1186 swim3_info("SWIM3 floppy controller %s\n",
1187 mdev->media_bay ? "in media bay" : "");
1188
1189 return 0;
1190
1191 out_unmap:
1192 iounmap(fs->dma);
1193 iounmap(fs->swim3);
1194
1195 out_release:
1196 macio_release_resource(mdev, 0);
1197 macio_release_resource(mdev, 1);
1198
1199 return rc;
1200}
1201
1202static int swim3_attach(struct macio_dev *mdev,
1203 const struct of_device_id *match)
1204{
1205 struct gendisk *disk;
1206 int index, rc;
1207
1208 index = floppy_count++;
1209 if (index >= MAX_FLOPPIES)
1210 return -ENXIO;
1211
1212 /* Add the drive */
1213 rc = swim3_add_device(mdev, index);
1214 if (rc)
1215 return rc;
1216 /* Now register that disk. Same comment about failure handling */
1217 disk = disks[index] = alloc_disk(1);
1218 if (disk == NULL)
1219 return -ENOMEM;
1220 disk->queue = blk_init_queue(do_fd_request, &swim3_lock);
1221 if (disk->queue == NULL) {
1222 put_disk(disk);
1223 return -ENOMEM;
1224 }
1225 blk_queue_bounce_limit(disk->queue, BLK_BOUNCE_HIGH);
1226 disk->queue->queuedata = &floppy_states[index];
1227
1228 if (index == 0) {
1229 /* If we failed, there isn't much we can do as the driver is still
1230 * too dumb to remove the device, just bail out
1231 */
1232 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1233 return 0;
1234 }
1235
1236 disk->major = FLOPPY_MAJOR;
1237 disk->first_minor = index;
1238 disk->fops = &floppy_fops;
1239 disk->private_data = &floppy_states[index];
1240 disk->flags |= GENHD_FL_REMOVABLE;
1241 sprintf(disk->disk_name, "fd%d", index);
1242 set_capacity(disk, 2880);
1243 add_disk(disk);
1244
1245 return 0;
1246}
1247
1248static const struct of_device_id swim3_match[] =
1249{
1250 {
1251 .name = "swim3",
1252 },
1253 {
1254 .compatible = "ohare-swim3"
1255 },
1256 {
1257 .compatible = "swim3"
1258 },
1259 { /* end of list */ }
1260};
1261
1262static struct macio_driver swim3_driver =
1263{
1264 .driver = {
1265 .name = "swim3",
1266 .of_match_table = swim3_match,
1267 },
1268 .probe = swim3_attach,
1269#ifdef CONFIG_PMAC_MEDIABAY
1270 .mediabay_event = swim3_mb_event,
1271#endif
1272#if 0
1273 .suspend = swim3_suspend,
1274 .resume = swim3_resume,
1275#endif
1276};
1277
1278
1279int swim3_init(void)
1280{
1281 macio_register_driver(&swim3_driver);
1282 return 0;
1283}
1284
1285module_init(swim3_init)
1286
1287MODULE_LICENSE("GPL");
1288MODULE_AUTHOR("Paul Mackerras");
1289MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);