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1/*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/fd.h>
25#include <linux/ioctl.h>
26#include <linux/blkdev.h>
27#include <linux/interrupt.h>
28#include <linux/mutex.h>
29#include <linux/module.h>
30#include <linux/spinlock.h>
31#include <asm/io.h>
32#include <asm/dbdma.h>
33#include <asm/prom.h>
34#include <asm/uaccess.h>
35#include <asm/mediabay.h>
36#include <asm/machdep.h>
37#include <asm/pmac_feature.h>
38
39static DEFINE_MUTEX(swim3_mutex);
40static struct request_queue *swim3_queue;
41static struct gendisk *disks[2];
42static struct request *fd_req;
43
44#define MAX_FLOPPIES 2
45
46enum swim_state {
47 idle,
48 locating,
49 seeking,
50 settling,
51 do_transfer,
52 jogging,
53 available,
54 revalidating,
55 ejecting
56};
57
58#define REG(x) unsigned char x; char x ## _pad[15];
59
60/*
61 * The names for these registers mostly represent speculation on my part.
62 * It will be interesting to see how close they are to the names Apple uses.
63 */
64struct swim3 {
65 REG(data);
66 REG(timer); /* counts down at 1MHz */
67 REG(error);
68 REG(mode);
69 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
70 REG(setup);
71 REG(control); /* writing bits clears them */
72 REG(status); /* writing bits sets them in control */
73 REG(intr);
74 REG(nseek); /* # tracks to seek */
75 REG(ctrack); /* current track number */
76 REG(csect); /* current sector number */
77 REG(gap3); /* size of gap 3 in track format */
78 REG(sector); /* sector # to read or write */
79 REG(nsect); /* # sectors to read or write */
80 REG(intr_enable);
81};
82
83#define control_bic control
84#define control_bis status
85
86/* Bits in select register */
87#define CA_MASK 7
88#define LSTRB 8
89
90/* Bits in control register */
91#define DO_SEEK 0x80
92#define FORMAT 0x40
93#define SELECT 0x20
94#define WRITE_SECTORS 0x10
95#define DO_ACTION 0x08
96#define DRIVE2_ENABLE 0x04
97#define DRIVE_ENABLE 0x02
98#define INTR_ENABLE 0x01
99
100/* Bits in status register */
101#define FIFO_1BYTE 0x80
102#define FIFO_2BYTE 0x40
103#define ERROR 0x20
104#define DATA 0x08
105#define RDDATA 0x04
106#define INTR_PENDING 0x02
107#define MARK_BYTE 0x01
108
109/* Bits in intr and intr_enable registers */
110#define ERROR_INTR 0x20
111#define DATA_CHANGED 0x10
112#define TRANSFER_DONE 0x08
113#define SEEN_SECTOR 0x04
114#define SEEK_DONE 0x02
115#define TIMER_DONE 0x01
116
117/* Bits in error register */
118#define ERR_DATA_CRC 0x80
119#define ERR_ADDR_CRC 0x40
120#define ERR_OVERRUN 0x04
121#define ERR_UNDERRUN 0x01
122
123/* Bits in setup register */
124#define S_SW_RESET 0x80
125#define S_GCR_WRITE 0x40
126#define S_IBM_DRIVE 0x20
127#define S_TEST_MODE 0x10
128#define S_FCLK_DIV2 0x08
129#define S_GCR 0x04
130#define S_COPY_PROT 0x02
131#define S_INV_WDATA 0x01
132
133/* Select values for swim3_action */
134#define SEEK_POSITIVE 0
135#define SEEK_NEGATIVE 4
136#define STEP 1
137#define MOTOR_ON 2
138#define MOTOR_OFF 6
139#define INDEX 3
140#define EJECT 7
141#define SETMFM 9
142#define SETGCR 13
143
144/* Select values for swim3_select and swim3_readbit */
145#define STEP_DIR 0
146#define STEPPING 1
147#define MOTOR_ON 2
148#define RELAX 3 /* also eject in progress */
149#define READ_DATA_0 4
150#define TWOMEG_DRIVE 5
151#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
152#define DRIVE_PRESENT 7
153#define DISK_IN 8
154#define WRITE_PROT 9
155#define TRACK_ZERO 10
156#define TACHO 11
157#define READ_DATA_1 12
158#define MFM_MODE 13
159#define SEEK_COMPLETE 14
160#define ONEMEG_MEDIA 15
161
162/* Definitions of values used in writing and formatting */
163#define DATA_ESCAPE 0x99
164#define GCR_SYNC_EXC 0x3f
165#define GCR_SYNC_CONV 0x80
166#define GCR_FIRST_MARK 0xd5
167#define GCR_SECOND_MARK 0xaa
168#define GCR_ADDR_MARK "\xd5\xaa\x00"
169#define GCR_DATA_MARK "\xd5\xaa\x0b"
170#define GCR_SLIP_BYTE "\x27\xaa"
171#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
172
173#define DATA_99 "\x99\x99"
174#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
175#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
176#define MFM_GAP_LEN 12
177
178struct floppy_state {
179 enum swim_state state;
180 spinlock_t lock;
181 struct swim3 __iomem *swim3; /* hardware registers */
182 struct dbdma_regs __iomem *dma; /* DMA controller registers */
183 int swim3_intr; /* interrupt number for SWIM3 */
184 int dma_intr; /* interrupt number for DMA channel */
185 int cur_cyl; /* cylinder head is on, or -1 */
186 int cur_sector; /* last sector we saw go past */
187 int req_cyl; /* the cylinder for the current r/w request */
188 int head; /* head number ditto */
189 int req_sector; /* sector number ditto */
190 int scount; /* # sectors we're transferring at present */
191 int retries;
192 int settle_time;
193 int secpercyl; /* disk geometry information */
194 int secpertrack;
195 int total_secs;
196 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
197 struct dbdma_cmd *dma_cmd;
198 int ref_count;
199 int expect_cyl;
200 struct timer_list timeout;
201 int timeout_pending;
202 int ejected;
203 wait_queue_head_t wait;
204 int wanted;
205 struct macio_dev *mdev;
206 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
207};
208
209static struct floppy_state floppy_states[MAX_FLOPPIES];
210static int floppy_count = 0;
211static DEFINE_SPINLOCK(swim3_lock);
212
213static unsigned short write_preamble[] = {
214 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
215 0, 0, 0, 0, 0, 0, /* sync field */
216 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
217 0x990f /* no escape for 512 bytes */
218};
219
220static unsigned short write_postamble[] = {
221 0x9904, /* insert CRC */
222 0x4e4e, 0x4e4e,
223 0x9908, /* stop writing */
224 0, 0, 0, 0, 0, 0
225};
226
227static void swim3_select(struct floppy_state *fs, int sel);
228static void swim3_action(struct floppy_state *fs, int action);
229static int swim3_readbit(struct floppy_state *fs, int bit);
230static void do_fd_request(struct request_queue * q);
231static void start_request(struct floppy_state *fs);
232static void set_timeout(struct floppy_state *fs, int nticks,
233 void (*proc)(unsigned long));
234static void scan_track(struct floppy_state *fs);
235static void seek_track(struct floppy_state *fs, int n);
236static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
237static void setup_transfer(struct floppy_state *fs);
238static void act(struct floppy_state *fs);
239static void scan_timeout(unsigned long data);
240static void seek_timeout(unsigned long data);
241static void settle_timeout(unsigned long data);
242static void xfer_timeout(unsigned long data);
243static irqreturn_t swim3_interrupt(int irq, void *dev_id);
244/*static void fd_dma_interrupt(int irq, void *dev_id);*/
245static int grab_drive(struct floppy_state *fs, enum swim_state state,
246 int interruptible);
247static void release_drive(struct floppy_state *fs);
248static int fd_eject(struct floppy_state *fs);
249static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
250 unsigned int cmd, unsigned long param);
251static int floppy_open(struct block_device *bdev, fmode_t mode);
252static int floppy_release(struct gendisk *disk, fmode_t mode);
253static unsigned int floppy_check_events(struct gendisk *disk,
254 unsigned int clearing);
255static int floppy_revalidate(struct gendisk *disk);
256
257static bool swim3_end_request(int err, unsigned int nr_bytes)
258{
259 if (__blk_end_request(fd_req, err, nr_bytes))
260 return true;
261
262 fd_req = NULL;
263 return false;
264}
265
266static bool swim3_end_request_cur(int err)
267{
268 return swim3_end_request(err, blk_rq_cur_bytes(fd_req));
269}
270
271static void swim3_select(struct floppy_state *fs, int sel)
272{
273 struct swim3 __iomem *sw = fs->swim3;
274
275 out_8(&sw->select, RELAX);
276 if (sel & 8)
277 out_8(&sw->control_bis, SELECT);
278 else
279 out_8(&sw->control_bic, SELECT);
280 out_8(&sw->select, sel & CA_MASK);
281}
282
283static void swim3_action(struct floppy_state *fs, int action)
284{
285 struct swim3 __iomem *sw = fs->swim3;
286
287 swim3_select(fs, action);
288 udelay(1);
289 out_8(&sw->select, sw->select | LSTRB);
290 udelay(2);
291 out_8(&sw->select, sw->select & ~LSTRB);
292 udelay(1);
293}
294
295static int swim3_readbit(struct floppy_state *fs, int bit)
296{
297 struct swim3 __iomem *sw = fs->swim3;
298 int stat;
299
300 swim3_select(fs, bit);
301 udelay(1);
302 stat = in_8(&sw->status);
303 return (stat & DATA) == 0;
304}
305
306static void do_fd_request(struct request_queue * q)
307{
308 int i;
309
310 for(i=0; i<floppy_count; i++) {
311 struct floppy_state *fs = &floppy_states[i];
312 if (fs->mdev->media_bay &&
313 check_media_bay(fs->mdev->media_bay) != MB_FD)
314 continue;
315 start_request(fs);
316 }
317}
318
319static void start_request(struct floppy_state *fs)
320{
321 struct request *req;
322 unsigned long x;
323
324 if (fs->state == idle && fs->wanted) {
325 fs->state = available;
326 wake_up(&fs->wait);
327 return;
328 }
329 while (fs->state == idle) {
330 if (!fd_req) {
331 fd_req = blk_fetch_request(swim3_queue);
332 if (!fd_req)
333 break;
334 }
335 req = fd_req;
336#if 0
337 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n",
338 req->rq_disk->disk_name, req->cmd,
339 (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer);
340 printk(" errors=%d current_nr_sectors=%u\n",
341 req->errors, blk_rq_cur_sectors(req));
342#endif
343
344 if (blk_rq_pos(req) >= fs->total_secs) {
345 swim3_end_request_cur(-EIO);
346 continue;
347 }
348 if (fs->ejected) {
349 swim3_end_request_cur(-EIO);
350 continue;
351 }
352
353 if (rq_data_dir(req) == WRITE) {
354 if (fs->write_prot < 0)
355 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
356 if (fs->write_prot) {
357 swim3_end_request_cur(-EIO);
358 continue;
359 }
360 }
361
362 /* Do not remove the cast. blk_rq_pos(req) is now a
363 * sector_t and can be 64 bits, but it will never go
364 * past 32 bits for this driver anyway, so we can
365 * safely cast it down and not have to do a 64/32
366 * division
367 */
368 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
369 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
370 fs->head = x / fs->secpertrack;
371 fs->req_sector = x % fs->secpertrack + 1;
372 fd_req = req;
373 fs->state = do_transfer;
374 fs->retries = 0;
375
376 act(fs);
377 }
378}
379
380static void set_timeout(struct floppy_state *fs, int nticks,
381 void (*proc)(unsigned long))
382{
383 unsigned long flags;
384
385 spin_lock_irqsave(&fs->lock, flags);
386 if (fs->timeout_pending)
387 del_timer(&fs->timeout);
388 fs->timeout.expires = jiffies + nticks;
389 fs->timeout.function = proc;
390 fs->timeout.data = (unsigned long) fs;
391 add_timer(&fs->timeout);
392 fs->timeout_pending = 1;
393 spin_unlock_irqrestore(&fs->lock, flags);
394}
395
396static inline void scan_track(struct floppy_state *fs)
397{
398 struct swim3 __iomem *sw = fs->swim3;
399
400 swim3_select(fs, READ_DATA_0);
401 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
402 in_8(&sw->error);
403 out_8(&sw->intr_enable, SEEN_SECTOR);
404 out_8(&sw->control_bis, DO_ACTION);
405 /* enable intr when track found */
406 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
407}
408
409static inline void seek_track(struct floppy_state *fs, int n)
410{
411 struct swim3 __iomem *sw = fs->swim3;
412
413 if (n >= 0) {
414 swim3_action(fs, SEEK_POSITIVE);
415 sw->nseek = n;
416 } else {
417 swim3_action(fs, SEEK_NEGATIVE);
418 sw->nseek = -n;
419 }
420 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
421 swim3_select(fs, STEP);
422 in_8(&sw->error);
423 /* enable intr when seek finished */
424 out_8(&sw->intr_enable, SEEK_DONE);
425 out_8(&sw->control_bis, DO_SEEK);
426 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
427 fs->settle_time = 0;
428}
429
430static inline void init_dma(struct dbdma_cmd *cp, int cmd,
431 void *buf, int count)
432{
433 st_le16(&cp->req_count, count);
434 st_le16(&cp->command, cmd);
435 st_le32(&cp->phy_addr, virt_to_bus(buf));
436 cp->xfer_status = 0;
437}
438
439static inline void setup_transfer(struct floppy_state *fs)
440{
441 int n;
442 struct swim3 __iomem *sw = fs->swim3;
443 struct dbdma_cmd *cp = fs->dma_cmd;
444 struct dbdma_regs __iomem *dr = fs->dma;
445
446 if (blk_rq_cur_sectors(fd_req) <= 0) {
447 printk(KERN_ERR "swim3: transfer 0 sectors?\n");
448 return;
449 }
450 if (rq_data_dir(fd_req) == WRITE)
451 n = 1;
452 else {
453 n = fs->secpertrack - fs->req_sector + 1;
454 if (n > blk_rq_cur_sectors(fd_req))
455 n = blk_rq_cur_sectors(fd_req);
456 }
457 fs->scount = n;
458 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
459 out_8(&sw->sector, fs->req_sector);
460 out_8(&sw->nsect, n);
461 out_8(&sw->gap3, 0);
462 out_le32(&dr->cmdptr, virt_to_bus(cp));
463 if (rq_data_dir(fd_req) == WRITE) {
464 /* Set up 3 dma commands: write preamble, data, postamble */
465 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
466 ++cp;
467 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
468 ++cp;
469 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
470 } else {
471 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
472 }
473 ++cp;
474 out_le16(&cp->command, DBDMA_STOP);
475 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
476 in_8(&sw->error);
477 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
478 if (rq_data_dir(fd_req) == WRITE)
479 out_8(&sw->control_bis, WRITE_SECTORS);
480 in_8(&sw->intr);
481 out_le32(&dr->control, (RUN << 16) | RUN);
482 /* enable intr when transfer complete */
483 out_8(&sw->intr_enable, TRANSFER_DONE);
484 out_8(&sw->control_bis, DO_ACTION);
485 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
486}
487
488static void act(struct floppy_state *fs)
489{
490 for (;;) {
491 switch (fs->state) {
492 case idle:
493 return; /* XXX shouldn't get here */
494
495 case locating:
496 if (swim3_readbit(fs, TRACK_ZERO)) {
497 fs->cur_cyl = 0;
498 if (fs->req_cyl == 0)
499 fs->state = do_transfer;
500 else
501 fs->state = seeking;
502 break;
503 }
504 scan_track(fs);
505 return;
506
507 case seeking:
508 if (fs->cur_cyl < 0) {
509 fs->expect_cyl = -1;
510 fs->state = locating;
511 break;
512 }
513 if (fs->req_cyl == fs->cur_cyl) {
514 printk("whoops, seeking 0\n");
515 fs->state = do_transfer;
516 break;
517 }
518 seek_track(fs, fs->req_cyl - fs->cur_cyl);
519 return;
520
521 case settling:
522 /* check for SEEK_COMPLETE after 30ms */
523 fs->settle_time = (HZ + 32) / 33;
524 set_timeout(fs, fs->settle_time, settle_timeout);
525 return;
526
527 case do_transfer:
528 if (fs->cur_cyl != fs->req_cyl) {
529 if (fs->retries > 5) {
530 swim3_end_request_cur(-EIO);
531 fs->state = idle;
532 return;
533 }
534 fs->state = seeking;
535 break;
536 }
537 setup_transfer(fs);
538 return;
539
540 case jogging:
541 seek_track(fs, -5);
542 return;
543
544 default:
545 printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
546 return;
547 }
548 }
549}
550
551static void scan_timeout(unsigned long data)
552{
553 struct floppy_state *fs = (struct floppy_state *) data;
554 struct swim3 __iomem *sw = fs->swim3;
555
556 fs->timeout_pending = 0;
557 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
558 out_8(&sw->select, RELAX);
559 out_8(&sw->intr_enable, 0);
560 fs->cur_cyl = -1;
561 if (fs->retries > 5) {
562 swim3_end_request_cur(-EIO);
563 fs->state = idle;
564 start_request(fs);
565 } else {
566 fs->state = jogging;
567 act(fs);
568 }
569}
570
571static void seek_timeout(unsigned long data)
572{
573 struct floppy_state *fs = (struct floppy_state *) data;
574 struct swim3 __iomem *sw = fs->swim3;
575
576 fs->timeout_pending = 0;
577 out_8(&sw->control_bic, DO_SEEK);
578 out_8(&sw->select, RELAX);
579 out_8(&sw->intr_enable, 0);
580 printk(KERN_ERR "swim3: seek timeout\n");
581 swim3_end_request_cur(-EIO);
582 fs->state = idle;
583 start_request(fs);
584}
585
586static void settle_timeout(unsigned long data)
587{
588 struct floppy_state *fs = (struct floppy_state *) data;
589 struct swim3 __iomem *sw = fs->swim3;
590
591 fs->timeout_pending = 0;
592 if (swim3_readbit(fs, SEEK_COMPLETE)) {
593 out_8(&sw->select, RELAX);
594 fs->state = locating;
595 act(fs);
596 return;
597 }
598 out_8(&sw->select, RELAX);
599 if (fs->settle_time < 2*HZ) {
600 ++fs->settle_time;
601 set_timeout(fs, 1, settle_timeout);
602 return;
603 }
604 printk(KERN_ERR "swim3: seek settle timeout\n");
605 swim3_end_request_cur(-EIO);
606 fs->state = idle;
607 start_request(fs);
608}
609
610static void xfer_timeout(unsigned long data)
611{
612 struct floppy_state *fs = (struct floppy_state *) data;
613 struct swim3 __iomem *sw = fs->swim3;
614 struct dbdma_regs __iomem *dr = fs->dma;
615 int n;
616
617 fs->timeout_pending = 0;
618 out_le32(&dr->control, RUN << 16);
619 /* We must wait a bit for dbdma to stop */
620 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
621 udelay(1);
622 out_8(&sw->intr_enable, 0);
623 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
624 out_8(&sw->select, RELAX);
625 printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
626 (rq_data_dir(fd_req)==WRITE? "writ": "read"),
627 (long)blk_rq_pos(fd_req));
628 swim3_end_request_cur(-EIO);
629 fs->state = idle;
630 start_request(fs);
631}
632
633static irqreturn_t swim3_interrupt(int irq, void *dev_id)
634{
635 struct floppy_state *fs = (struct floppy_state *) dev_id;
636 struct swim3 __iomem *sw = fs->swim3;
637 int intr, err, n;
638 int stat, resid;
639 struct dbdma_regs __iomem *dr;
640 struct dbdma_cmd *cp;
641
642 intr = in_8(&sw->intr);
643 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
644 if ((intr & ERROR_INTR) && fs->state != do_transfer)
645 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
646 fs->state, rq_data_dir(fd_req), intr, err);
647 switch (fs->state) {
648 case locating:
649 if (intr & SEEN_SECTOR) {
650 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
651 out_8(&sw->select, RELAX);
652 out_8(&sw->intr_enable, 0);
653 del_timer(&fs->timeout);
654 fs->timeout_pending = 0;
655 if (sw->ctrack == 0xff) {
656 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
657 fs->cur_cyl = -1;
658 if (fs->retries > 5) {
659 swim3_end_request_cur(-EIO);
660 fs->state = idle;
661 start_request(fs);
662 } else {
663 fs->state = jogging;
664 act(fs);
665 }
666 break;
667 }
668 fs->cur_cyl = sw->ctrack;
669 fs->cur_sector = sw->csect;
670 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
671 printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
672 fs->expect_cyl, fs->cur_cyl);
673 fs->state = do_transfer;
674 act(fs);
675 }
676 break;
677 case seeking:
678 case jogging:
679 if (sw->nseek == 0) {
680 out_8(&sw->control_bic, DO_SEEK);
681 out_8(&sw->select, RELAX);
682 out_8(&sw->intr_enable, 0);
683 del_timer(&fs->timeout);
684 fs->timeout_pending = 0;
685 if (fs->state == seeking)
686 ++fs->retries;
687 fs->state = settling;
688 act(fs);
689 }
690 break;
691 case settling:
692 out_8(&sw->intr_enable, 0);
693 del_timer(&fs->timeout);
694 fs->timeout_pending = 0;
695 act(fs);
696 break;
697 case do_transfer:
698 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
699 break;
700 out_8(&sw->intr_enable, 0);
701 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
702 out_8(&sw->select, RELAX);
703 del_timer(&fs->timeout);
704 fs->timeout_pending = 0;
705 dr = fs->dma;
706 cp = fs->dma_cmd;
707 if (rq_data_dir(fd_req) == WRITE)
708 ++cp;
709 /*
710 * Check that the main data transfer has finished.
711 * On writing, the swim3 sometimes doesn't use
712 * up all the bytes of the postamble, so we can still
713 * see DMA active here. That doesn't matter as long
714 * as all the sector data has been transferred.
715 */
716 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
717 /* wait a little while for DMA to complete */
718 for (n = 0; n < 100; ++n) {
719 if (cp->xfer_status != 0)
720 break;
721 udelay(1);
722 barrier();
723 }
724 }
725 /* turn off DMA */
726 out_le32(&dr->control, (RUN | PAUSE) << 16);
727 stat = ld_le16(&cp->xfer_status);
728 resid = ld_le16(&cp->res_count);
729 if (intr & ERROR_INTR) {
730 n = fs->scount - 1 - resid / 512;
731 if (n > 0) {
732 blk_update_request(fd_req, 0, n << 9);
733 fs->req_sector += n;
734 }
735 if (fs->retries < 5) {
736 ++fs->retries;
737 act(fs);
738 } else {
739 printk("swim3: error %sing block %ld (err=%x)\n",
740 rq_data_dir(fd_req) == WRITE? "writ": "read",
741 (long)blk_rq_pos(fd_req), err);
742 swim3_end_request_cur(-EIO);
743 fs->state = idle;
744 }
745 } else {
746 if ((stat & ACTIVE) == 0 || resid != 0) {
747 /* musta been an error */
748 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
749 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
750 fs->state, rq_data_dir(fd_req), intr, err);
751 swim3_end_request_cur(-EIO);
752 fs->state = idle;
753 start_request(fs);
754 break;
755 }
756 if (swim3_end_request(0, fs->scount << 9)) {
757 fs->req_sector += fs->scount;
758 if (fs->req_sector > fs->secpertrack) {
759 fs->req_sector -= fs->secpertrack;
760 if (++fs->head > 1) {
761 fs->head = 0;
762 ++fs->req_cyl;
763 }
764 }
765 act(fs);
766 } else
767 fs->state = idle;
768 }
769 if (fs->state == idle)
770 start_request(fs);
771 break;
772 default:
773 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
774 }
775 return IRQ_HANDLED;
776}
777
778/*
779static void fd_dma_interrupt(int irq, void *dev_id)
780{
781}
782*/
783
784static int grab_drive(struct floppy_state *fs, enum swim_state state,
785 int interruptible)
786{
787 unsigned long flags;
788
789 spin_lock_irqsave(&fs->lock, flags);
790 if (fs->state != idle) {
791 ++fs->wanted;
792 while (fs->state != available) {
793 if (interruptible && signal_pending(current)) {
794 --fs->wanted;
795 spin_unlock_irqrestore(&fs->lock, flags);
796 return -EINTR;
797 }
798 interruptible_sleep_on(&fs->wait);
799 }
800 --fs->wanted;
801 }
802 fs->state = state;
803 spin_unlock_irqrestore(&fs->lock, flags);
804 return 0;
805}
806
807static void release_drive(struct floppy_state *fs)
808{
809 unsigned long flags;
810
811 spin_lock_irqsave(&fs->lock, flags);
812 fs->state = idle;
813 start_request(fs);
814 spin_unlock_irqrestore(&fs->lock, flags);
815}
816
817static int fd_eject(struct floppy_state *fs)
818{
819 int err, n;
820
821 err = grab_drive(fs, ejecting, 1);
822 if (err)
823 return err;
824 swim3_action(fs, EJECT);
825 for (n = 20; n > 0; --n) {
826 if (signal_pending(current)) {
827 err = -EINTR;
828 break;
829 }
830 swim3_select(fs, RELAX);
831 schedule_timeout_interruptible(1);
832 if (swim3_readbit(fs, DISK_IN) == 0)
833 break;
834 }
835 swim3_select(fs, RELAX);
836 udelay(150);
837 fs->ejected = 1;
838 release_drive(fs);
839 return err;
840}
841
842static struct floppy_struct floppy_type =
843 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
844
845static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
846 unsigned int cmd, unsigned long param)
847{
848 struct floppy_state *fs = bdev->bd_disk->private_data;
849 int err;
850
851 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
852 return -EPERM;
853
854 if (fs->mdev->media_bay &&
855 check_media_bay(fs->mdev->media_bay) != MB_FD)
856 return -ENXIO;
857
858 switch (cmd) {
859 case FDEJECT:
860 if (fs->ref_count != 1)
861 return -EBUSY;
862 err = fd_eject(fs);
863 return err;
864 case FDGETPRM:
865 if (copy_to_user((void __user *) param, &floppy_type,
866 sizeof(struct floppy_struct)))
867 return -EFAULT;
868 return 0;
869 }
870 return -ENOTTY;
871}
872
873static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
874 unsigned int cmd, unsigned long param)
875{
876 int ret;
877
878 mutex_lock(&swim3_mutex);
879 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
880 mutex_unlock(&swim3_mutex);
881
882 return ret;
883}
884
885static int floppy_open(struct block_device *bdev, fmode_t mode)
886{
887 struct floppy_state *fs = bdev->bd_disk->private_data;
888 struct swim3 __iomem *sw = fs->swim3;
889 int n, err = 0;
890
891 if (fs->ref_count == 0) {
892 if (fs->mdev->media_bay &&
893 check_media_bay(fs->mdev->media_bay) != MB_FD)
894 return -ENXIO;
895 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
896 out_8(&sw->control_bic, 0xff);
897 out_8(&sw->mode, 0x95);
898 udelay(10);
899 out_8(&sw->intr_enable, 0);
900 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
901 swim3_action(fs, MOTOR_ON);
902 fs->write_prot = -1;
903 fs->cur_cyl = -1;
904 for (n = 0; n < 2 * HZ; ++n) {
905 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
906 break;
907 if (signal_pending(current)) {
908 err = -EINTR;
909 break;
910 }
911 swim3_select(fs, RELAX);
912 schedule_timeout_interruptible(1);
913 }
914 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
915 || swim3_readbit(fs, DISK_IN) == 0))
916 err = -ENXIO;
917 swim3_action(fs, SETMFM);
918 swim3_select(fs, RELAX);
919
920 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
921 return -EBUSY;
922
923 if (err == 0 && (mode & FMODE_NDELAY) == 0
924 && (mode & (FMODE_READ|FMODE_WRITE))) {
925 check_disk_change(bdev);
926 if (fs->ejected)
927 err = -ENXIO;
928 }
929
930 if (err == 0 && (mode & FMODE_WRITE)) {
931 if (fs->write_prot < 0)
932 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
933 if (fs->write_prot)
934 err = -EROFS;
935 }
936
937 if (err) {
938 if (fs->ref_count == 0) {
939 swim3_action(fs, MOTOR_OFF);
940 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
941 swim3_select(fs, RELAX);
942 }
943 return err;
944 }
945
946 if (mode & FMODE_EXCL)
947 fs->ref_count = -1;
948 else
949 ++fs->ref_count;
950
951 return 0;
952}
953
954static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
955{
956 int ret;
957
958 mutex_lock(&swim3_mutex);
959 ret = floppy_open(bdev, mode);
960 mutex_unlock(&swim3_mutex);
961
962 return ret;
963}
964
965static int floppy_release(struct gendisk *disk, fmode_t mode)
966{
967 struct floppy_state *fs = disk->private_data;
968 struct swim3 __iomem *sw = fs->swim3;
969 mutex_lock(&swim3_mutex);
970 if (fs->ref_count > 0 && --fs->ref_count == 0) {
971 swim3_action(fs, MOTOR_OFF);
972 out_8(&sw->control_bic, 0xff);
973 swim3_select(fs, RELAX);
974 }
975 mutex_unlock(&swim3_mutex);
976 return 0;
977}
978
979static unsigned int floppy_check_events(struct gendisk *disk,
980 unsigned int clearing)
981{
982 struct floppy_state *fs = disk->private_data;
983 return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
984}
985
986static int floppy_revalidate(struct gendisk *disk)
987{
988 struct floppy_state *fs = disk->private_data;
989 struct swim3 __iomem *sw;
990 int ret, n;
991
992 if (fs->mdev->media_bay &&
993 check_media_bay(fs->mdev->media_bay) != MB_FD)
994 return -ENXIO;
995
996 sw = fs->swim3;
997 grab_drive(fs, revalidating, 0);
998 out_8(&sw->intr_enable, 0);
999 out_8(&sw->control_bis, DRIVE_ENABLE);
1000 swim3_action(fs, MOTOR_ON); /* necessary? */
1001 fs->write_prot = -1;
1002 fs->cur_cyl = -1;
1003 mdelay(1);
1004 for (n = HZ; n > 0; --n) {
1005 if (swim3_readbit(fs, SEEK_COMPLETE))
1006 break;
1007 if (signal_pending(current))
1008 break;
1009 swim3_select(fs, RELAX);
1010 schedule_timeout_interruptible(1);
1011 }
1012 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1013 || swim3_readbit(fs, DISK_IN) == 0;
1014 if (ret)
1015 swim3_action(fs, MOTOR_OFF);
1016 else {
1017 fs->ejected = 0;
1018 swim3_action(fs, SETMFM);
1019 }
1020 swim3_select(fs, RELAX);
1021
1022 release_drive(fs);
1023 return ret;
1024}
1025
1026static const struct block_device_operations floppy_fops = {
1027 .open = floppy_unlocked_open,
1028 .release = floppy_release,
1029 .ioctl = floppy_ioctl,
1030 .check_events = floppy_check_events,
1031 .revalidate_disk= floppy_revalidate,
1032};
1033
1034static int swim3_add_device(struct macio_dev *mdev, int index)
1035{
1036 struct device_node *swim = mdev->ofdev.dev.of_node;
1037 struct floppy_state *fs = &floppy_states[index];
1038 int rc = -EBUSY;
1039
1040 /* Check & Request resources */
1041 if (macio_resource_count(mdev) < 2) {
1042 printk(KERN_WARNING "ifd%d: no address for %s\n",
1043 index, swim->full_name);
1044 return -ENXIO;
1045 }
1046 if (macio_irq_count(mdev) < 2) {
1047 printk(KERN_WARNING "fd%d: no intrs for device %s\n",
1048 index, swim->full_name);
1049 }
1050 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1051 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
1052 index, swim->full_name);
1053 return -EBUSY;
1054 }
1055 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1056 printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
1057 index, swim->full_name);
1058 macio_release_resource(mdev, 0);
1059 return -EBUSY;
1060 }
1061 dev_set_drvdata(&mdev->ofdev.dev, fs);
1062
1063 if (mdev->media_bay == NULL)
1064 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1065
1066 memset(fs, 0, sizeof(*fs));
1067 spin_lock_init(&fs->lock);
1068 fs->state = idle;
1069 fs->swim3 = (struct swim3 __iomem *)
1070 ioremap(macio_resource_start(mdev, 0), 0x200);
1071 if (fs->swim3 == NULL) {
1072 printk("fd%d: couldn't map registers for %s\n",
1073 index, swim->full_name);
1074 rc = -ENOMEM;
1075 goto out_release;
1076 }
1077 fs->dma = (struct dbdma_regs __iomem *)
1078 ioremap(macio_resource_start(mdev, 1), 0x200);
1079 if (fs->dma == NULL) {
1080 printk("fd%d: couldn't map DMA for %s\n",
1081 index, swim->full_name);
1082 iounmap(fs->swim3);
1083 rc = -ENOMEM;
1084 goto out_release;
1085 }
1086 fs->swim3_intr = macio_irq(mdev, 0);
1087 fs->dma_intr = macio_irq(mdev, 1);
1088 fs->cur_cyl = -1;
1089 fs->cur_sector = -1;
1090 fs->secpercyl = 36;
1091 fs->secpertrack = 18;
1092 fs->total_secs = 2880;
1093 fs->mdev = mdev;
1094 init_waitqueue_head(&fs->wait);
1095
1096 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1097 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1098 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
1099
1100 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1101 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
1102 index, fs->swim3_intr, swim->full_name);
1103 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1104 goto out_unmap;
1105 return -EBUSY;
1106 }
1107/*
1108 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
1109 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
1110 fs->dma_intr);
1111 return -EBUSY;
1112 }
1113*/
1114
1115 init_timer(&fs->timeout);
1116
1117 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
1118 mdev->media_bay ? "in media bay" : "");
1119
1120 return 0;
1121
1122 out_unmap:
1123 iounmap(fs->dma);
1124 iounmap(fs->swim3);
1125
1126 out_release:
1127 macio_release_resource(mdev, 0);
1128 macio_release_resource(mdev, 1);
1129
1130 return rc;
1131}
1132
1133static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
1134{
1135 int i, rc;
1136 struct gendisk *disk;
1137
1138 /* Add the drive */
1139 rc = swim3_add_device(mdev, floppy_count);
1140 if (rc)
1141 return rc;
1142
1143 /* Now create the queue if not there yet */
1144 if (swim3_queue == NULL) {
1145 /* If we failed, there isn't much we can do as the driver is still
1146 * too dumb to remove the device, just bail out
1147 */
1148 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1149 return 0;
1150 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
1151 if (swim3_queue == NULL) {
1152 unregister_blkdev(FLOPPY_MAJOR, "fd");
1153 return 0;
1154 }
1155 }
1156
1157 /* Now register that disk. Same comment about failure handling */
1158 i = floppy_count++;
1159 disk = disks[i] = alloc_disk(1);
1160 if (disk == NULL)
1161 return 0;
1162
1163 disk->major = FLOPPY_MAJOR;
1164 disk->first_minor = i;
1165 disk->fops = &floppy_fops;
1166 disk->private_data = &floppy_states[i];
1167 disk->queue = swim3_queue;
1168 disk->flags |= GENHD_FL_REMOVABLE;
1169 sprintf(disk->disk_name, "fd%d", i);
1170 set_capacity(disk, 2880);
1171 add_disk(disk);
1172
1173 return 0;
1174}
1175
1176static struct of_device_id swim3_match[] =
1177{
1178 {
1179 .name = "swim3",
1180 },
1181 {
1182 .compatible = "ohare-swim3"
1183 },
1184 {
1185 .compatible = "swim3"
1186 },
1187 { /* end of list */ }
1188};
1189
1190static struct macio_driver swim3_driver =
1191{
1192 .driver = {
1193 .name = "swim3",
1194 .of_match_table = swim3_match,
1195 },
1196 .probe = swim3_attach,
1197#if 0
1198 .suspend = swim3_suspend,
1199 .resume = swim3_resume,
1200#endif
1201};
1202
1203
1204int swim3_init(void)
1205{
1206 macio_register_driver(&swim3_driver);
1207 return 0;
1208}
1209
1210module_init(swim3_init)
1211
1212MODULE_LICENSE("GPL");
1213MODULE_AUTHOR("Paul Mackerras");
1214MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
4 * floppy controller found on Power Macintoshes.
5 *
6 * Copyright (C) 1996 Paul Mackerras.
7 */
8
9/*
10 * TODO:
11 * handle 2 drives
12 * handle GCR disks
13 */
14
15#undef DEBUG
16
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/sched/signal.h>
20#include <linux/timer.h>
21#include <linux/delay.h>
22#include <linux/fd.h>
23#include <linux/ioctl.h>
24#include <linux/blk-mq.h>
25#include <linux/interrupt.h>
26#include <linux/mutex.h>
27#include <linux/module.h>
28#include <linux/spinlock.h>
29#include <linux/wait.h>
30#include <linux/major.h>
31#include <asm/io.h>
32#include <asm/dbdma.h>
33#include <asm/prom.h>
34#include <linux/uaccess.h>
35#include <asm/mediabay.h>
36#include <asm/machdep.h>
37#include <asm/pmac_feature.h>
38
39#define MAX_FLOPPIES 2
40
41static DEFINE_MUTEX(swim3_mutex);
42static struct gendisk *disks[MAX_FLOPPIES];
43
44enum swim_state {
45 idle,
46 locating,
47 seeking,
48 settling,
49 do_transfer,
50 jogging,
51 available,
52 revalidating,
53 ejecting
54};
55
56#define REG(x) unsigned char x; char x ## _pad[15];
57
58/*
59 * The names for these registers mostly represent speculation on my part.
60 * It will be interesting to see how close they are to the names Apple uses.
61 */
62struct swim3 {
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
70 REG(status); /* writing bits sets them in control */
71 REG(intr);
72 REG(nseek); /* # tracks to seek */
73 REG(ctrack); /* current track number */
74 REG(csect); /* current sector number */
75 REG(gap3); /* size of gap 3 in track format */
76 REG(sector); /* sector # to read or write */
77 REG(nsect); /* # sectors to read or write */
78 REG(intr_enable);
79};
80
81#define control_bic control
82#define control_bis status
83
84/* Bits in select register */
85#define CA_MASK 7
86#define LSTRB 8
87
88/* Bits in control register */
89#define DO_SEEK 0x80
90#define FORMAT 0x40
91#define SELECT 0x20
92#define WRITE_SECTORS 0x10
93#define DO_ACTION 0x08
94#define DRIVE2_ENABLE 0x04
95#define DRIVE_ENABLE 0x02
96#define INTR_ENABLE 0x01
97
98/* Bits in status register */
99#define FIFO_1BYTE 0x80
100#define FIFO_2BYTE 0x40
101#define ERROR 0x20
102#define DATA 0x08
103#define RDDATA 0x04
104#define INTR_PENDING 0x02
105#define MARK_BYTE 0x01
106
107/* Bits in intr and intr_enable registers */
108#define ERROR_INTR 0x20
109#define DATA_CHANGED 0x10
110#define TRANSFER_DONE 0x08
111#define SEEN_SECTOR 0x04
112#define SEEK_DONE 0x02
113#define TIMER_DONE 0x01
114
115/* Bits in error register */
116#define ERR_DATA_CRC 0x80
117#define ERR_ADDR_CRC 0x40
118#define ERR_OVERRUN 0x04
119#define ERR_UNDERRUN 0x01
120
121/* Bits in setup register */
122#define S_SW_RESET 0x80
123#define S_GCR_WRITE 0x40
124#define S_IBM_DRIVE 0x20
125#define S_TEST_MODE 0x10
126#define S_FCLK_DIV2 0x08
127#define S_GCR 0x04
128#define S_COPY_PROT 0x02
129#define S_INV_WDATA 0x01
130
131/* Select values for swim3_action */
132#define SEEK_POSITIVE 0
133#define SEEK_NEGATIVE 4
134#define STEP 1
135#define MOTOR_ON 2
136#define MOTOR_OFF 6
137#define INDEX 3
138#define EJECT 7
139#define SETMFM 9
140#define SETGCR 13
141
142/* Select values for swim3_select and swim3_readbit */
143#define STEP_DIR 0
144#define STEPPING 1
145#define MOTOR_ON 2
146#define RELAX 3 /* also eject in progress */
147#define READ_DATA_0 4
148#define ONEMEG_DRIVE 5
149#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
150#define DRIVE_PRESENT 7
151#define DISK_IN 8
152#define WRITE_PROT 9
153#define TRACK_ZERO 10
154#define TACHO 11
155#define READ_DATA_1 12
156#define GCR_MODE 13
157#define SEEK_COMPLETE 14
158#define TWOMEG_MEDIA 15
159
160/* Definitions of values used in writing and formatting */
161#define DATA_ESCAPE 0x99
162#define GCR_SYNC_EXC 0x3f
163#define GCR_SYNC_CONV 0x80
164#define GCR_FIRST_MARK 0xd5
165#define GCR_SECOND_MARK 0xaa
166#define GCR_ADDR_MARK "\xd5\xaa\x00"
167#define GCR_DATA_MARK "\xd5\xaa\x0b"
168#define GCR_SLIP_BYTE "\x27\xaa"
169#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
170
171#define DATA_99 "\x99\x99"
172#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
173#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
174#define MFM_GAP_LEN 12
175
176struct floppy_state {
177 enum swim_state state;
178 struct swim3 __iomem *swim3; /* hardware registers */
179 struct dbdma_regs __iomem *dma; /* DMA controller registers */
180 int swim3_intr; /* interrupt number for SWIM3 */
181 int dma_intr; /* interrupt number for DMA channel */
182 int cur_cyl; /* cylinder head is on, or -1 */
183 int cur_sector; /* last sector we saw go past */
184 int req_cyl; /* the cylinder for the current r/w request */
185 int head; /* head number ditto */
186 int req_sector; /* sector number ditto */
187 int scount; /* # sectors we're transferring at present */
188 int retries;
189 int settle_time;
190 int secpercyl; /* disk geometry information */
191 int secpertrack;
192 int total_secs;
193 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
194 struct dbdma_cmd *dma_cmd;
195 int ref_count;
196 int expect_cyl;
197 struct timer_list timeout;
198 int timeout_pending;
199 int ejected;
200 wait_queue_head_t wait;
201 int wanted;
202 struct macio_dev *mdev;
203 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
204 int index;
205 struct request *cur_req;
206 struct blk_mq_tag_set tag_set;
207};
208
209#define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
210#define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
211#define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
212
213#ifdef DEBUG
214#define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
215#else
216#define swim3_dbg(fmt, arg...) do { } while(0)
217#endif
218
219static struct floppy_state floppy_states[MAX_FLOPPIES];
220static int floppy_count = 0;
221static DEFINE_SPINLOCK(swim3_lock);
222
223static unsigned short write_preamble[] = {
224 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
225 0, 0, 0, 0, 0, 0, /* sync field */
226 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
227 0x990f /* no escape for 512 bytes */
228};
229
230static unsigned short write_postamble[] = {
231 0x9904, /* insert CRC */
232 0x4e4e, 0x4e4e,
233 0x9908, /* stop writing */
234 0, 0, 0, 0, 0, 0
235};
236
237static void seek_track(struct floppy_state *fs, int n);
238static void act(struct floppy_state *fs);
239static void scan_timeout(struct timer_list *t);
240static void seek_timeout(struct timer_list *t);
241static void settle_timeout(struct timer_list *t);
242static void xfer_timeout(struct timer_list *t);
243static irqreturn_t swim3_interrupt(int irq, void *dev_id);
244/*static void fd_dma_interrupt(int irq, void *dev_id);*/
245static int grab_drive(struct floppy_state *fs, enum swim_state state,
246 int interruptible);
247static void release_drive(struct floppy_state *fs);
248static int fd_eject(struct floppy_state *fs);
249static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
250 unsigned int cmd, unsigned long param);
251static int floppy_open(struct block_device *bdev, fmode_t mode);
252static void floppy_release(struct gendisk *disk, fmode_t mode);
253static unsigned int floppy_check_events(struct gendisk *disk,
254 unsigned int clearing);
255static int floppy_revalidate(struct gendisk *disk);
256
257static bool swim3_end_request(struct floppy_state *fs, blk_status_t err, unsigned int nr_bytes)
258{
259 struct request *req = fs->cur_req;
260
261 swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
262 err, nr_bytes, req);
263
264 if (err)
265 nr_bytes = blk_rq_cur_bytes(req);
266 if (blk_update_request(req, err, nr_bytes))
267 return true;
268 __blk_mq_end_request(req, err);
269 fs->cur_req = NULL;
270 return false;
271}
272
273static void swim3_select(struct floppy_state *fs, int sel)
274{
275 struct swim3 __iomem *sw = fs->swim3;
276
277 out_8(&sw->select, RELAX);
278 if (sel & 8)
279 out_8(&sw->control_bis, SELECT);
280 else
281 out_8(&sw->control_bic, SELECT);
282 out_8(&sw->select, sel & CA_MASK);
283}
284
285static void swim3_action(struct floppy_state *fs, int action)
286{
287 struct swim3 __iomem *sw = fs->swim3;
288
289 swim3_select(fs, action);
290 udelay(1);
291 out_8(&sw->select, sw->select | LSTRB);
292 udelay(2);
293 out_8(&sw->select, sw->select & ~LSTRB);
294 udelay(1);
295}
296
297static int swim3_readbit(struct floppy_state *fs, int bit)
298{
299 struct swim3 __iomem *sw = fs->swim3;
300 int stat;
301
302 swim3_select(fs, bit);
303 udelay(1);
304 stat = in_8(&sw->status);
305 return (stat & DATA) == 0;
306}
307
308static blk_status_t swim3_queue_rq(struct blk_mq_hw_ctx *hctx,
309 const struct blk_mq_queue_data *bd)
310{
311 struct floppy_state *fs = hctx->queue->queuedata;
312 struct request *req = bd->rq;
313 unsigned long x;
314
315 spin_lock_irq(&swim3_lock);
316 if (fs->cur_req || fs->state != idle) {
317 spin_unlock_irq(&swim3_lock);
318 return BLK_STS_DEV_RESOURCE;
319 }
320 blk_mq_start_request(req);
321 fs->cur_req = req;
322 if (fs->mdev->media_bay &&
323 check_media_bay(fs->mdev->media_bay) != MB_FD) {
324 swim3_dbg("%s", " media bay absent, dropping req\n");
325 swim3_end_request(fs, BLK_STS_IOERR, 0);
326 goto out;
327 }
328 if (fs->ejected) {
329 swim3_dbg("%s", " disk ejected\n");
330 swim3_end_request(fs, BLK_STS_IOERR, 0);
331 goto out;
332 }
333 if (rq_data_dir(req) == WRITE) {
334 if (fs->write_prot < 0)
335 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
336 if (fs->write_prot) {
337 swim3_dbg("%s", " try to write, disk write protected\n");
338 swim3_end_request(fs, BLK_STS_IOERR, 0);
339 goto out;
340 }
341 }
342
343 /*
344 * Do not remove the cast. blk_rq_pos(req) is now a sector_t and can be
345 * 64 bits, but it will never go past 32 bits for this driver anyway, so
346 * we can safely cast it down and not have to do a 64/32 division
347 */
348 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
349 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
350 fs->head = x / fs->secpertrack;
351 fs->req_sector = x % fs->secpertrack + 1;
352 fs->state = do_transfer;
353 fs->retries = 0;
354
355 act(fs);
356
357out:
358 spin_unlock_irq(&swim3_lock);
359 return BLK_STS_OK;
360}
361
362static void set_timeout(struct floppy_state *fs, int nticks,
363 void (*proc)(struct timer_list *t))
364{
365 if (fs->timeout_pending)
366 del_timer(&fs->timeout);
367 fs->timeout.expires = jiffies + nticks;
368 fs->timeout.function = proc;
369 add_timer(&fs->timeout);
370 fs->timeout_pending = 1;
371}
372
373static inline void scan_track(struct floppy_state *fs)
374{
375 struct swim3 __iomem *sw = fs->swim3;
376
377 swim3_select(fs, READ_DATA_0);
378 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
379 in_8(&sw->error);
380 out_8(&sw->intr_enable, SEEN_SECTOR);
381 out_8(&sw->control_bis, DO_ACTION);
382 /* enable intr when track found */
383 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
384}
385
386static inline void seek_track(struct floppy_state *fs, int n)
387{
388 struct swim3 __iomem *sw = fs->swim3;
389
390 if (n >= 0) {
391 swim3_action(fs, SEEK_POSITIVE);
392 sw->nseek = n;
393 } else {
394 swim3_action(fs, SEEK_NEGATIVE);
395 sw->nseek = -n;
396 }
397 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
398 swim3_select(fs, STEP);
399 in_8(&sw->error);
400 /* enable intr when seek finished */
401 out_8(&sw->intr_enable, SEEK_DONE);
402 out_8(&sw->control_bis, DO_SEEK);
403 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
404 fs->settle_time = 0;
405}
406
407/*
408 * XXX: this is a horrible hack, but at least allows ppc32 to get
409 * out of defining virt_to_bus, and this driver out of using the
410 * deprecated block layer bounce buffering for highmem addresses
411 * for no good reason.
412 */
413static unsigned long swim3_phys_to_bus(phys_addr_t paddr)
414{
415 return paddr + PCI_DRAM_OFFSET;
416}
417
418static phys_addr_t swim3_bio_phys(struct bio *bio)
419{
420 return page_to_phys(bio_page(bio)) + bio_offset(bio);
421}
422
423static inline void init_dma(struct dbdma_cmd *cp, int cmd,
424 phys_addr_t paddr, int count)
425{
426 cp->req_count = cpu_to_le16(count);
427 cp->command = cpu_to_le16(cmd);
428 cp->phy_addr = cpu_to_le32(swim3_phys_to_bus(paddr));
429 cp->xfer_status = 0;
430}
431
432static inline void setup_transfer(struct floppy_state *fs)
433{
434 int n;
435 struct swim3 __iomem *sw = fs->swim3;
436 struct dbdma_cmd *cp = fs->dma_cmd;
437 struct dbdma_regs __iomem *dr = fs->dma;
438 struct request *req = fs->cur_req;
439
440 if (blk_rq_cur_sectors(req) <= 0) {
441 swim3_warn("%s", "Transfer 0 sectors ?\n");
442 return;
443 }
444 if (rq_data_dir(req) == WRITE)
445 n = 1;
446 else {
447 n = fs->secpertrack - fs->req_sector + 1;
448 if (n > blk_rq_cur_sectors(req))
449 n = blk_rq_cur_sectors(req);
450 }
451
452 swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
453 fs->req_sector, fs->secpertrack, fs->head, n);
454
455 fs->scount = n;
456 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
457 out_8(&sw->sector, fs->req_sector);
458 out_8(&sw->nsect, n);
459 out_8(&sw->gap3, 0);
460 out_le32(&dr->cmdptr, swim3_phys_to_bus(virt_to_phys(cp)));
461 if (rq_data_dir(req) == WRITE) {
462 /* Set up 3 dma commands: write preamble, data, postamble */
463 init_dma(cp, OUTPUT_MORE, virt_to_phys(write_preamble),
464 sizeof(write_preamble));
465 ++cp;
466 init_dma(cp, OUTPUT_MORE, swim3_bio_phys(req->bio), 512);
467 ++cp;
468 init_dma(cp, OUTPUT_LAST, virt_to_phys(write_postamble),
469 sizeof(write_postamble));
470 } else {
471 init_dma(cp, INPUT_LAST, swim3_bio_phys(req->bio), n * 512);
472 }
473 ++cp;
474 out_le16(&cp->command, DBDMA_STOP);
475 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
476 in_8(&sw->error);
477 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
478 if (rq_data_dir(req) == WRITE)
479 out_8(&sw->control_bis, WRITE_SECTORS);
480 in_8(&sw->intr);
481 out_le32(&dr->control, (RUN << 16) | RUN);
482 /* enable intr when transfer complete */
483 out_8(&sw->intr_enable, TRANSFER_DONE);
484 out_8(&sw->control_bis, DO_ACTION);
485 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
486}
487
488static void act(struct floppy_state *fs)
489{
490 for (;;) {
491 swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
492 fs->state, fs->req_cyl, fs->cur_cyl);
493
494 switch (fs->state) {
495 case idle:
496 return; /* XXX shouldn't get here */
497
498 case locating:
499 if (swim3_readbit(fs, TRACK_ZERO)) {
500 swim3_dbg("%s", " locate track 0\n");
501 fs->cur_cyl = 0;
502 if (fs->req_cyl == 0)
503 fs->state = do_transfer;
504 else
505 fs->state = seeking;
506 break;
507 }
508 scan_track(fs);
509 return;
510
511 case seeking:
512 if (fs->cur_cyl < 0) {
513 fs->expect_cyl = -1;
514 fs->state = locating;
515 break;
516 }
517 if (fs->req_cyl == fs->cur_cyl) {
518 swim3_warn("%s", "Whoops, seeking 0\n");
519 fs->state = do_transfer;
520 break;
521 }
522 seek_track(fs, fs->req_cyl - fs->cur_cyl);
523 return;
524
525 case settling:
526 /* check for SEEK_COMPLETE after 30ms */
527 fs->settle_time = (HZ + 32) / 33;
528 set_timeout(fs, fs->settle_time, settle_timeout);
529 return;
530
531 case do_transfer:
532 if (fs->cur_cyl != fs->req_cyl) {
533 if (fs->retries > 5) {
534 swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
535 fs->req_cyl, fs->cur_cyl);
536 swim3_end_request(fs, BLK_STS_IOERR, 0);
537 fs->state = idle;
538 return;
539 }
540 fs->state = seeking;
541 break;
542 }
543 setup_transfer(fs);
544 return;
545
546 case jogging:
547 seek_track(fs, -5);
548 return;
549
550 default:
551 swim3_err("Unknown state %d\n", fs->state);
552 return;
553 }
554 }
555}
556
557static void scan_timeout(struct timer_list *t)
558{
559 struct floppy_state *fs = from_timer(fs, t, timeout);
560 struct swim3 __iomem *sw = fs->swim3;
561 unsigned long flags;
562
563 swim3_dbg("* scan timeout, state=%d\n", fs->state);
564
565 spin_lock_irqsave(&swim3_lock, flags);
566 fs->timeout_pending = 0;
567 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
568 out_8(&sw->select, RELAX);
569 out_8(&sw->intr_enable, 0);
570 fs->cur_cyl = -1;
571 if (fs->retries > 5) {
572 swim3_end_request(fs, BLK_STS_IOERR, 0);
573 fs->state = idle;
574 } else {
575 fs->state = jogging;
576 act(fs);
577 }
578 spin_unlock_irqrestore(&swim3_lock, flags);
579}
580
581static void seek_timeout(struct timer_list *t)
582{
583 struct floppy_state *fs = from_timer(fs, t, timeout);
584 struct swim3 __iomem *sw = fs->swim3;
585 unsigned long flags;
586
587 swim3_dbg("* seek timeout, state=%d\n", fs->state);
588
589 spin_lock_irqsave(&swim3_lock, flags);
590 fs->timeout_pending = 0;
591 out_8(&sw->control_bic, DO_SEEK);
592 out_8(&sw->select, RELAX);
593 out_8(&sw->intr_enable, 0);
594 swim3_err("%s", "Seek timeout\n");
595 swim3_end_request(fs, BLK_STS_IOERR, 0);
596 fs->state = idle;
597 spin_unlock_irqrestore(&swim3_lock, flags);
598}
599
600static void settle_timeout(struct timer_list *t)
601{
602 struct floppy_state *fs = from_timer(fs, t, timeout);
603 struct swim3 __iomem *sw = fs->swim3;
604 unsigned long flags;
605
606 swim3_dbg("* settle timeout, state=%d\n", fs->state);
607
608 spin_lock_irqsave(&swim3_lock, flags);
609 fs->timeout_pending = 0;
610 if (swim3_readbit(fs, SEEK_COMPLETE)) {
611 out_8(&sw->select, RELAX);
612 fs->state = locating;
613 act(fs);
614 goto unlock;
615 }
616 out_8(&sw->select, RELAX);
617 if (fs->settle_time < 2*HZ) {
618 ++fs->settle_time;
619 set_timeout(fs, 1, settle_timeout);
620 goto unlock;
621 }
622 swim3_err("%s", "Seek settle timeout\n");
623 swim3_end_request(fs, BLK_STS_IOERR, 0);
624 fs->state = idle;
625 unlock:
626 spin_unlock_irqrestore(&swim3_lock, flags);
627}
628
629static void xfer_timeout(struct timer_list *t)
630{
631 struct floppy_state *fs = from_timer(fs, t, timeout);
632 struct swim3 __iomem *sw = fs->swim3;
633 struct dbdma_regs __iomem *dr = fs->dma;
634 unsigned long flags;
635 int n;
636
637 swim3_dbg("* xfer timeout, state=%d\n", fs->state);
638
639 spin_lock_irqsave(&swim3_lock, flags);
640 fs->timeout_pending = 0;
641 out_le32(&dr->control, RUN << 16);
642 /* We must wait a bit for dbdma to stop */
643 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
644 udelay(1);
645 out_8(&sw->intr_enable, 0);
646 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
647 out_8(&sw->select, RELAX);
648 swim3_err("Timeout %sing sector %ld\n",
649 (rq_data_dir(fs->cur_req)==WRITE? "writ": "read"),
650 (long)blk_rq_pos(fs->cur_req));
651 swim3_end_request(fs, BLK_STS_IOERR, 0);
652 fs->state = idle;
653 spin_unlock_irqrestore(&swim3_lock, flags);
654}
655
656static irqreturn_t swim3_interrupt(int irq, void *dev_id)
657{
658 struct floppy_state *fs = (struct floppy_state *) dev_id;
659 struct swim3 __iomem *sw = fs->swim3;
660 int intr, err, n;
661 int stat, resid;
662 struct dbdma_regs __iomem *dr;
663 struct dbdma_cmd *cp;
664 unsigned long flags;
665 struct request *req = fs->cur_req;
666
667 swim3_dbg("* interrupt, state=%d\n", fs->state);
668
669 spin_lock_irqsave(&swim3_lock, flags);
670 intr = in_8(&sw->intr);
671 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
672 if ((intr & ERROR_INTR) && fs->state != do_transfer)
673 swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
674 fs->state, rq_data_dir(req), intr, err);
675 switch (fs->state) {
676 case locating:
677 if (intr & SEEN_SECTOR) {
678 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
679 out_8(&sw->select, RELAX);
680 out_8(&sw->intr_enable, 0);
681 del_timer(&fs->timeout);
682 fs->timeout_pending = 0;
683 if (sw->ctrack == 0xff) {
684 swim3_err("%s", "Seen sector but cyl=ff?\n");
685 fs->cur_cyl = -1;
686 if (fs->retries > 5) {
687 swim3_end_request(fs, BLK_STS_IOERR, 0);
688 fs->state = idle;
689 } else {
690 fs->state = jogging;
691 act(fs);
692 }
693 break;
694 }
695 fs->cur_cyl = sw->ctrack;
696 fs->cur_sector = sw->csect;
697 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
698 swim3_err("Expected cyl %d, got %d\n",
699 fs->expect_cyl, fs->cur_cyl);
700 fs->state = do_transfer;
701 act(fs);
702 }
703 break;
704 case seeking:
705 case jogging:
706 if (sw->nseek == 0) {
707 out_8(&sw->control_bic, DO_SEEK);
708 out_8(&sw->select, RELAX);
709 out_8(&sw->intr_enable, 0);
710 del_timer(&fs->timeout);
711 fs->timeout_pending = 0;
712 if (fs->state == seeking)
713 ++fs->retries;
714 fs->state = settling;
715 act(fs);
716 }
717 break;
718 case settling:
719 out_8(&sw->intr_enable, 0);
720 del_timer(&fs->timeout);
721 fs->timeout_pending = 0;
722 act(fs);
723 break;
724 case do_transfer:
725 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
726 break;
727 out_8(&sw->intr_enable, 0);
728 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
729 out_8(&sw->select, RELAX);
730 del_timer(&fs->timeout);
731 fs->timeout_pending = 0;
732 dr = fs->dma;
733 cp = fs->dma_cmd;
734 if (rq_data_dir(req) == WRITE)
735 ++cp;
736 /*
737 * Check that the main data transfer has finished.
738 * On writing, the swim3 sometimes doesn't use
739 * up all the bytes of the postamble, so we can still
740 * see DMA active here. That doesn't matter as long
741 * as all the sector data has been transferred.
742 */
743 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
744 /* wait a little while for DMA to complete */
745 for (n = 0; n < 100; ++n) {
746 if (cp->xfer_status != 0)
747 break;
748 udelay(1);
749 barrier();
750 }
751 }
752 /* turn off DMA */
753 out_le32(&dr->control, (RUN | PAUSE) << 16);
754 stat = le16_to_cpu(cp->xfer_status);
755 resid = le16_to_cpu(cp->res_count);
756 if (intr & ERROR_INTR) {
757 n = fs->scount - 1 - resid / 512;
758 if (n > 0) {
759 blk_update_request(req, 0, n << 9);
760 fs->req_sector += n;
761 }
762 if (fs->retries < 5) {
763 ++fs->retries;
764 act(fs);
765 } else {
766 swim3_err("Error %sing block %ld (err=%x)\n",
767 rq_data_dir(req) == WRITE? "writ": "read",
768 (long)blk_rq_pos(req), err);
769 swim3_end_request(fs, BLK_STS_IOERR, 0);
770 fs->state = idle;
771 }
772 } else {
773 if ((stat & ACTIVE) == 0 || resid != 0) {
774 /* musta been an error */
775 swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid);
776 swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
777 fs->state, rq_data_dir(req), intr, err);
778 swim3_end_request(fs, BLK_STS_IOERR, 0);
779 fs->state = idle;
780 break;
781 }
782 fs->retries = 0;
783 if (swim3_end_request(fs, 0, fs->scount << 9)) {
784 fs->req_sector += fs->scount;
785 if (fs->req_sector > fs->secpertrack) {
786 fs->req_sector -= fs->secpertrack;
787 if (++fs->head > 1) {
788 fs->head = 0;
789 ++fs->req_cyl;
790 }
791 }
792 act(fs);
793 } else
794 fs->state = idle;
795 }
796 break;
797 default:
798 swim3_err("Don't know what to do in state %d\n", fs->state);
799 }
800 spin_unlock_irqrestore(&swim3_lock, flags);
801 return IRQ_HANDLED;
802}
803
804/*
805static void fd_dma_interrupt(int irq, void *dev_id)
806{
807}
808*/
809
810/* Called under the mutex to grab exclusive access to a drive */
811static int grab_drive(struct floppy_state *fs, enum swim_state state,
812 int interruptible)
813{
814 unsigned long flags;
815
816 swim3_dbg("%s", "-> grab drive\n");
817
818 spin_lock_irqsave(&swim3_lock, flags);
819 if (fs->state != idle && fs->state != available) {
820 ++fs->wanted;
821 /* this will enable irqs in order to sleep */
822 if (!interruptible)
823 wait_event_lock_irq(fs->wait,
824 fs->state == available,
825 swim3_lock);
826 else if (wait_event_interruptible_lock_irq(fs->wait,
827 fs->state == available,
828 swim3_lock)) {
829 --fs->wanted;
830 spin_unlock_irqrestore(&swim3_lock, flags);
831 return -EINTR;
832 }
833 --fs->wanted;
834 }
835 fs->state = state;
836 spin_unlock_irqrestore(&swim3_lock, flags);
837
838 return 0;
839}
840
841static void release_drive(struct floppy_state *fs)
842{
843 struct request_queue *q = disks[fs->index]->queue;
844 unsigned long flags;
845
846 swim3_dbg("%s", "-> release drive\n");
847
848 spin_lock_irqsave(&swim3_lock, flags);
849 fs->state = idle;
850 spin_unlock_irqrestore(&swim3_lock, flags);
851
852 blk_mq_freeze_queue(q);
853 blk_mq_quiesce_queue(q);
854 blk_mq_unquiesce_queue(q);
855 blk_mq_unfreeze_queue(q);
856}
857
858static int fd_eject(struct floppy_state *fs)
859{
860 int err, n;
861
862 err = grab_drive(fs, ejecting, 1);
863 if (err)
864 return err;
865 swim3_action(fs, EJECT);
866 for (n = 20; n > 0; --n) {
867 if (signal_pending(current)) {
868 err = -EINTR;
869 break;
870 }
871 swim3_select(fs, RELAX);
872 schedule_timeout_interruptible(1);
873 if (swim3_readbit(fs, DISK_IN) == 0)
874 break;
875 }
876 swim3_select(fs, RELAX);
877 udelay(150);
878 fs->ejected = 1;
879 release_drive(fs);
880 return err;
881}
882
883static struct floppy_struct floppy_type =
884 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
885
886static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
887 unsigned int cmd, unsigned long param)
888{
889 struct floppy_state *fs = bdev->bd_disk->private_data;
890 int err;
891
892 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
893 return -EPERM;
894
895 if (fs->mdev->media_bay &&
896 check_media_bay(fs->mdev->media_bay) != MB_FD)
897 return -ENXIO;
898
899 switch (cmd) {
900 case FDEJECT:
901 if (fs->ref_count != 1)
902 return -EBUSY;
903 err = fd_eject(fs);
904 return err;
905 case FDGETPRM:
906 if (copy_to_user((void __user *) param, &floppy_type,
907 sizeof(struct floppy_struct)))
908 return -EFAULT;
909 return 0;
910 }
911 return -ENOTTY;
912}
913
914static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
915 unsigned int cmd, unsigned long param)
916{
917 int ret;
918
919 mutex_lock(&swim3_mutex);
920 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
921 mutex_unlock(&swim3_mutex);
922
923 return ret;
924}
925
926static int floppy_open(struct block_device *bdev, fmode_t mode)
927{
928 struct floppy_state *fs = bdev->bd_disk->private_data;
929 struct swim3 __iomem *sw = fs->swim3;
930 int n, err = 0;
931
932 if (fs->ref_count == 0) {
933 if (fs->mdev->media_bay &&
934 check_media_bay(fs->mdev->media_bay) != MB_FD)
935 return -ENXIO;
936 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
937 out_8(&sw->control_bic, 0xff);
938 out_8(&sw->mode, 0x95);
939 udelay(10);
940 out_8(&sw->intr_enable, 0);
941 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
942 swim3_action(fs, MOTOR_ON);
943 fs->write_prot = -1;
944 fs->cur_cyl = -1;
945 for (n = 0; n < 2 * HZ; ++n) {
946 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
947 break;
948 if (signal_pending(current)) {
949 err = -EINTR;
950 break;
951 }
952 swim3_select(fs, RELAX);
953 schedule_timeout_interruptible(1);
954 }
955 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
956 || swim3_readbit(fs, DISK_IN) == 0))
957 err = -ENXIO;
958 swim3_action(fs, SETMFM);
959 swim3_select(fs, RELAX);
960
961 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
962 return -EBUSY;
963
964 if (err == 0 && (mode & FMODE_NDELAY) == 0
965 && (mode & (FMODE_READ|FMODE_WRITE))) {
966 if (bdev_check_media_change(bdev))
967 floppy_revalidate(bdev->bd_disk);
968 if (fs->ejected)
969 err = -ENXIO;
970 }
971
972 if (err == 0 && (mode & FMODE_WRITE)) {
973 if (fs->write_prot < 0)
974 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
975 if (fs->write_prot)
976 err = -EROFS;
977 }
978
979 if (err) {
980 if (fs->ref_count == 0) {
981 swim3_action(fs, MOTOR_OFF);
982 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
983 swim3_select(fs, RELAX);
984 }
985 return err;
986 }
987
988 if (mode & FMODE_EXCL)
989 fs->ref_count = -1;
990 else
991 ++fs->ref_count;
992
993 return 0;
994}
995
996static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
997{
998 int ret;
999
1000 mutex_lock(&swim3_mutex);
1001 ret = floppy_open(bdev, mode);
1002 mutex_unlock(&swim3_mutex);
1003
1004 return ret;
1005}
1006
1007static void floppy_release(struct gendisk *disk, fmode_t mode)
1008{
1009 struct floppy_state *fs = disk->private_data;
1010 struct swim3 __iomem *sw = fs->swim3;
1011
1012 mutex_lock(&swim3_mutex);
1013 if (fs->ref_count > 0)
1014 --fs->ref_count;
1015 else if (fs->ref_count == -1)
1016 fs->ref_count = 0;
1017 if (fs->ref_count == 0) {
1018 swim3_action(fs, MOTOR_OFF);
1019 out_8(&sw->control_bic, 0xff);
1020 swim3_select(fs, RELAX);
1021 }
1022 mutex_unlock(&swim3_mutex);
1023}
1024
1025static unsigned int floppy_check_events(struct gendisk *disk,
1026 unsigned int clearing)
1027{
1028 struct floppy_state *fs = disk->private_data;
1029 return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
1030}
1031
1032static int floppy_revalidate(struct gendisk *disk)
1033{
1034 struct floppy_state *fs = disk->private_data;
1035 struct swim3 __iomem *sw;
1036 int ret, n;
1037
1038 if (fs->mdev->media_bay &&
1039 check_media_bay(fs->mdev->media_bay) != MB_FD)
1040 return -ENXIO;
1041
1042 sw = fs->swim3;
1043 grab_drive(fs, revalidating, 0);
1044 out_8(&sw->intr_enable, 0);
1045 out_8(&sw->control_bis, DRIVE_ENABLE);
1046 swim3_action(fs, MOTOR_ON); /* necessary? */
1047 fs->write_prot = -1;
1048 fs->cur_cyl = -1;
1049 mdelay(1);
1050 for (n = HZ; n > 0; --n) {
1051 if (swim3_readbit(fs, SEEK_COMPLETE))
1052 break;
1053 if (signal_pending(current))
1054 break;
1055 swim3_select(fs, RELAX);
1056 schedule_timeout_interruptible(1);
1057 }
1058 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1059 || swim3_readbit(fs, DISK_IN) == 0;
1060 if (ret)
1061 swim3_action(fs, MOTOR_OFF);
1062 else {
1063 fs->ejected = 0;
1064 swim3_action(fs, SETMFM);
1065 }
1066 swim3_select(fs, RELAX);
1067
1068 release_drive(fs);
1069 return ret;
1070}
1071
1072static const struct block_device_operations floppy_fops = {
1073 .open = floppy_unlocked_open,
1074 .release = floppy_release,
1075 .ioctl = floppy_ioctl,
1076 .check_events = floppy_check_events,
1077};
1078
1079static const struct blk_mq_ops swim3_mq_ops = {
1080 .queue_rq = swim3_queue_rq,
1081};
1082
1083static void swim3_mb_event(struct macio_dev* mdev, int mb_state)
1084{
1085 struct floppy_state *fs = macio_get_drvdata(mdev);
1086 struct swim3 __iomem *sw;
1087
1088 if (!fs)
1089 return;
1090
1091 sw = fs->swim3;
1092
1093 if (mb_state != MB_FD)
1094 return;
1095
1096 /* Clear state */
1097 out_8(&sw->intr_enable, 0);
1098 in_8(&sw->intr);
1099 in_8(&sw->error);
1100}
1101
1102static int swim3_add_device(struct macio_dev *mdev, int index)
1103{
1104 struct device_node *swim = mdev->ofdev.dev.of_node;
1105 struct floppy_state *fs = &floppy_states[index];
1106 int rc = -EBUSY;
1107
1108 fs->mdev = mdev;
1109 fs->index = index;
1110
1111 /* Check & Request resources */
1112 if (macio_resource_count(mdev) < 2) {
1113 swim3_err("%s", "No address in device-tree\n");
1114 return -ENXIO;
1115 }
1116 if (macio_irq_count(mdev) < 1) {
1117 swim3_err("%s", "No interrupt in device-tree\n");
1118 return -ENXIO;
1119 }
1120 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1121 swim3_err("%s", "Can't request mmio resource\n");
1122 return -EBUSY;
1123 }
1124 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1125 swim3_err("%s", "Can't request dma resource\n");
1126 macio_release_resource(mdev, 0);
1127 return -EBUSY;
1128 }
1129 dev_set_drvdata(&mdev->ofdev.dev, fs);
1130
1131 if (mdev->media_bay == NULL)
1132 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1133
1134 fs->state = idle;
1135 fs->swim3 = (struct swim3 __iomem *)
1136 ioremap(macio_resource_start(mdev, 0), 0x200);
1137 if (fs->swim3 == NULL) {
1138 swim3_err("%s", "Couldn't map mmio registers\n");
1139 rc = -ENOMEM;
1140 goto out_release;
1141 }
1142 fs->dma = (struct dbdma_regs __iomem *)
1143 ioremap(macio_resource_start(mdev, 1), 0x200);
1144 if (fs->dma == NULL) {
1145 swim3_err("%s", "Couldn't map dma registers\n");
1146 iounmap(fs->swim3);
1147 rc = -ENOMEM;
1148 goto out_release;
1149 }
1150 fs->swim3_intr = macio_irq(mdev, 0);
1151 fs->dma_intr = macio_irq(mdev, 1);
1152 fs->cur_cyl = -1;
1153 fs->cur_sector = -1;
1154 fs->secpercyl = 36;
1155 fs->secpertrack = 18;
1156 fs->total_secs = 2880;
1157 init_waitqueue_head(&fs->wait);
1158
1159 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1160 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1161 fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
1162
1163 if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
1164 swim3_mb_event(mdev, MB_FD);
1165
1166 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1167 swim3_err("%s", "Couldn't request interrupt\n");
1168 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1169 goto out_unmap;
1170 }
1171
1172 timer_setup(&fs->timeout, NULL, 0);
1173
1174 swim3_info("SWIM3 floppy controller %s\n",
1175 mdev->media_bay ? "in media bay" : "");
1176
1177 return 0;
1178
1179 out_unmap:
1180 iounmap(fs->dma);
1181 iounmap(fs->swim3);
1182
1183 out_release:
1184 macio_release_resource(mdev, 0);
1185 macio_release_resource(mdev, 1);
1186
1187 return rc;
1188}
1189
1190static int swim3_attach(struct macio_dev *mdev,
1191 const struct of_device_id *match)
1192{
1193 struct floppy_state *fs;
1194 struct gendisk *disk;
1195 int rc;
1196
1197 if (floppy_count >= MAX_FLOPPIES)
1198 return -ENXIO;
1199
1200 if (floppy_count == 0) {
1201 rc = register_blkdev(FLOPPY_MAJOR, "fd");
1202 if (rc)
1203 return rc;
1204 }
1205
1206 fs = &floppy_states[floppy_count];
1207 memset(fs, 0, sizeof(*fs));
1208
1209 rc = blk_mq_alloc_sq_tag_set(&fs->tag_set, &swim3_mq_ops, 2,
1210 BLK_MQ_F_SHOULD_MERGE);
1211 if (rc)
1212 goto out_unregister;
1213
1214 disk = blk_mq_alloc_disk(&fs->tag_set, fs);
1215 if (IS_ERR(disk)) {
1216 rc = PTR_ERR(disk);
1217 goto out_free_tag_set;
1218 }
1219
1220 rc = swim3_add_device(mdev, floppy_count);
1221 if (rc)
1222 goto out_cleanup_disk;
1223
1224 disk->major = FLOPPY_MAJOR;
1225 disk->first_minor = floppy_count;
1226 disk->minors = 1;
1227 disk->fops = &floppy_fops;
1228 disk->private_data = fs;
1229 disk->events = DISK_EVENT_MEDIA_CHANGE;
1230 disk->flags |= GENHD_FL_REMOVABLE | GENHD_FL_NO_PART;
1231 sprintf(disk->disk_name, "fd%d", floppy_count);
1232 set_capacity(disk, 2880);
1233 rc = add_disk(disk);
1234 if (rc)
1235 goto out_cleanup_disk;
1236
1237 disks[floppy_count++] = disk;
1238 return 0;
1239
1240out_cleanup_disk:
1241 put_disk(disk);
1242out_free_tag_set:
1243 blk_mq_free_tag_set(&fs->tag_set);
1244out_unregister:
1245 if (floppy_count == 0)
1246 unregister_blkdev(FLOPPY_MAJOR, "fd");
1247 return rc;
1248}
1249
1250static const struct of_device_id swim3_match[] =
1251{
1252 {
1253 .name = "swim3",
1254 },
1255 {
1256 .compatible = "ohare-swim3"
1257 },
1258 {
1259 .compatible = "swim3"
1260 },
1261 { /* end of list */ }
1262};
1263
1264static struct macio_driver swim3_driver =
1265{
1266 .driver = {
1267 .name = "swim3",
1268 .of_match_table = swim3_match,
1269 },
1270 .probe = swim3_attach,
1271#ifdef CONFIG_PMAC_MEDIABAY
1272 .mediabay_event = swim3_mb_event,
1273#endif
1274#if 0
1275 .suspend = swim3_suspend,
1276 .resume = swim3_resume,
1277#endif
1278};
1279
1280
1281int swim3_init(void)
1282{
1283 macio_register_driver(&swim3_driver);
1284 return 0;
1285}
1286
1287module_init(swim3_init)
1288
1289MODULE_LICENSE("GPL");
1290MODULE_AUTHOR("Paul Mackerras");
1291MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);