1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * host.c - ChipIdea USB host controller driver
  4 *
  5 * Copyright (c) 2012 Intel Corporation
  6 *
  7 * Author: Alexander Shishkin
  8 */
  9
 10#include <linux/kernel.h>
 11#include <linux/io.h>
 12#include <linux/usb.h>
 13#include <linux/usb/hcd.h>
 14#include <linux/usb/chipidea.h>
 15#include <linux/regulator/consumer.h>
 16
 17#include "../host/ehci.h"
 18
 19#include "ci.h"
 20#include "bits.h"
 21#include "host.h"
 22
 23static struct hc_driver __read_mostly ci_ehci_hc_driver;
 24static int (*orig_bus_suspend)(struct usb_hcd *hcd);
 25
 26struct ehci_ci_priv {
 27	struct regulator *reg_vbus;
 28};
 29
 30static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
 31{
 32	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 33	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
 34	struct device *dev = hcd->self.controller;
 35	struct ci_hdrc *ci = dev_get_drvdata(dev);
 36	int ret = 0;
 37	int port = HCS_N_PORTS(ehci->hcs_params);
 38
 39	if (priv->reg_vbus) {
 40		if (port > 1) {
 41			dev_warn(dev,
 42				"Not support multi-port regulator control\n");
 43			return 0;
 44		}
 45		if (enable)
 46			ret = regulator_enable(priv->reg_vbus);
 47		else
 48			ret = regulator_disable(priv->reg_vbus);
 49		if (ret) {
 50			dev_err(dev,
 51				"Failed to %s vbus regulator, ret=%d\n",
 52				enable ? "enable" : "disable", ret);
 53			return ret;
 54		}
 55	}
 56
 57	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
 58		/*
 59		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
 60		 * As HSIC is always HS, this should be safe for others.
 61		 */
 62		hw_port_test_set(ci, 5);
 63		hw_port_test_set(ci, 0);
 64	}
 65	return 0;
 66};
 67
 68static int ehci_ci_reset(struct usb_hcd *hcd)
 69{
 70	struct device *dev = hcd->self.controller;
 71	struct ci_hdrc *ci = dev_get_drvdata(dev);
 72	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 73	int ret;
 74
 75	ret = ehci_setup(hcd);
 76	if (ret)
 77		return ret;
 78
 79	ehci->need_io_watchdog = 0;
 80
 81	if (ci->platdata->notify_event) {
 82		ret = ci->platdata->notify_event(ci,
 83				CI_HDRC_CONTROLLER_RESET_EVENT);
 84		if (ret)
 85			return ret;
 86	}
 87
 88	ci_platform_configure(ci);
 89
 90	return ret;
 91}
 92
 93static const struct ehci_driver_overrides ehci_ci_overrides = {
 94	.extra_priv_size = sizeof(struct ehci_ci_priv),
 95	.port_power	 = ehci_ci_portpower,
 96	.reset		 = ehci_ci_reset,
 97};
 98
 99static irqreturn_t host_irq(struct ci_hdrc *ci)
100{
101	return usb_hcd_irq(ci->irq, ci->hcd);
102}
103
104static int host_start(struct ci_hdrc *ci)
105{
106	struct usb_hcd *hcd;
107	struct ehci_hcd *ehci;
108	struct ehci_ci_priv *priv;
109	int ret;
110
111	if (usb_disabled())
112		return -ENODEV;
113
114	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
115			       ci->dev, dev_name(ci->dev), NULL);
116	if (!hcd)
117		return -ENOMEM;
118
119	dev_set_drvdata(ci->dev, ci);
120	hcd->rsrc_start = ci->hw_bank.phys;
121	hcd->rsrc_len = ci->hw_bank.size;
122	hcd->regs = ci->hw_bank.abs;
123	hcd->has_tt = 1;
124
125	hcd->power_budget = ci->platdata->power_budget;
126	hcd->tpl_support = ci->platdata->tpl_support;
127	if (ci->phy || ci->usb_phy)
128		hcd->skip_phy_initialization = 1;
129
130	ehci = hcd_to_ehci(hcd);
131	ehci->caps = ci->hw_bank.cap;
132	ehci->has_hostpc = ci->hw_bank.lpm;
133	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
134	ehci->imx28_write_fix = ci->imx28_write_fix;
135
136	priv = (struct ehci_ci_priv *)ehci->priv;
137	priv->reg_vbus = NULL;
138
139	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
140		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
141			ret = regulator_enable(ci->platdata->reg_vbus);
142			if (ret) {
143				dev_err(ci->dev,
144				"Failed to enable vbus regulator, ret=%d\n",
145									ret);
146				goto put_hcd;
147			}
148		} else {
149			priv->reg_vbus = ci->platdata->reg_vbus;
150		}
151	}
152
153	ret = usb_add_hcd(hcd, 0, 0);
154	if (ret) {
155		goto disable_reg;
156	} else {
157		struct usb_otg *otg = &ci->otg;
158
159		ci->hcd = hcd;
160
161		if (ci_otg_is_fsm_mode(ci)) {
162			otg->host = &hcd->self;
163			hcd->self.otg_port = 1;
164		}
165	}
166
167	return ret;
168
169disable_reg:
170	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
171			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
172		regulator_disable(ci->platdata->reg_vbus);
173put_hcd:
174	usb_put_hcd(hcd);
175
176	return ret;
177}
178
179static void host_stop(struct ci_hdrc *ci)
180{
181	struct usb_hcd *hcd = ci->hcd;
182
183	if (hcd) {
184		if (ci->platdata->notify_event)
185			ci->platdata->notify_event(ci,
186				CI_HDRC_CONTROLLER_STOPPED_EVENT);
187		usb_remove_hcd(hcd);
188		ci->role = CI_ROLE_END;
189		synchronize_irq(ci->irq);
190		usb_put_hcd(hcd);
191		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
192			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
193				regulator_disable(ci->platdata->reg_vbus);
194	}
195	ci->hcd = NULL;
196	ci->otg.host = NULL;
197}
198
199
200void ci_hdrc_host_destroy(struct ci_hdrc *ci)
201{
202	if (ci->role == CI_ROLE_HOST && ci->hcd)
203		host_stop(ci);
204}
205
206static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
207{
208	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
209	int port;
210	u32 tmp;
211
212	int ret = orig_bus_suspend(hcd);
213
214	if (ret)
215		return ret;
216
217	port = HCS_N_PORTS(ehci->hcs_params);
218	while (port--) {
219		u32 __iomem *reg = &ehci->regs->port_status[port];
220		u32 portsc = ehci_readl(ehci, reg);
221
222		if (portsc & PORT_CONNECT) {
223			/*
224			 * For chipidea, the resume signal will be ended
225			 * automatically, so for remote wakeup case, the
226			 * usbcmd.rs may not be set before the resume has
227			 * ended if other resume paths consumes too much
228			 * time (~24ms), in that case, the SOF will not
229			 * send out within 3ms after resume ends, then the
230			 * high speed device will enter full speed mode.
231			 */
232
233			tmp = ehci_readl(ehci, &ehci->regs->command);
234			tmp |= CMD_RUN;
235			ehci_writel(ehci, tmp, &ehci->regs->command);
236			/*
237			 * It needs a short delay between set RS bit and PHCD.
238			 */
239			usleep_range(150, 200);
240			break;
241		}
242	}
243
244	return 0;
245}
246
247int ci_hdrc_host_init(struct ci_hdrc *ci)
248{
249	struct ci_role_driver *rdrv;
250
251	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
252		return -ENXIO;
253
254	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
255	if (!rdrv)
256		return -ENOMEM;
257
258	rdrv->start	= host_start;
259	rdrv->stop	= host_stop;
260	rdrv->irq	= host_irq;
261	rdrv->name	= "host";
262	ci->roles[CI_ROLE_HOST] = rdrv;
263
264	return 0;
265}
266
267void ci_hdrc_host_driver_init(void)
268{
269	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
270	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
271	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
272}