1/*
  2 * host.c - ChipIdea USB host controller driver
  3 *
  4 * Copyright (c) 2012 Intel Corporation
  5 *
  6 * Author: Alexander Shishkin
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License version 2 as
 10 * published by the Free Software Foundation.
 11 *
 12 * This program is distributed in the hope that it will be useful,
 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 * GNU General Public License for more details.
 16 *
 17 * You should have received a copy of the GNU General Public License
 18 * along with this program; if not, write to the Free Software
 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 20 */
 21
 22#include <linux/kernel.h>
 23#include <linux/io.h>
 24#include <linux/usb.h>
 25#include <linux/usb/hcd.h>
 26#include <linux/usb/chipidea.h>
 27#include <linux/regulator/consumer.h>
 28
 29#include "../host/ehci.h"
 30
 31#include "ci.h"
 32#include "bits.h"
 33#include "host.h"
 34
 35static struct hc_driver __read_mostly ci_ehci_hc_driver;
 36static int (*orig_bus_suspend)(struct usb_hcd *hcd);
 37
 38struct ehci_ci_priv {
 39	struct regulator *reg_vbus;
 40};
 41
 42static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
 43{
 44	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 45	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
 46	struct device *dev = hcd->self.controller;
 47	struct ci_hdrc *ci = dev_get_drvdata(dev);
 48	int ret = 0;
 49	int port = HCS_N_PORTS(ehci->hcs_params);
 50
 51	if (priv->reg_vbus) {
 52		if (port > 1) {
 53			dev_warn(dev,
 54				"Not support multi-port regulator control\n");
 55			return 0;
 56		}
 57		if (enable)
 58			ret = regulator_enable(priv->reg_vbus);
 59		else
 60			ret = regulator_disable(priv->reg_vbus);
 61		if (ret) {
 62			dev_err(dev,
 63				"Failed to %s vbus regulator, ret=%d\n",
 64				enable ? "enable" : "disable", ret);
 65			return ret;
 66		}
 67	}
 68
 69	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
 70		/*
 71		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
 72		 * As HSIC is always HS, this should be safe for others.
 73		 */
 74		hw_port_test_set(ci, 5);
 75		hw_port_test_set(ci, 0);
 76	}
 77	return 0;
 78};
 79
 80static int ehci_ci_reset(struct usb_hcd *hcd)
 81{
 82	struct device *dev = hcd->self.controller;
 83	struct ci_hdrc *ci = dev_get_drvdata(dev);
 84	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 85	int ret;
 86
 87	ret = ehci_setup(hcd);
 88	if (ret)
 89		return ret;
 90
 91	ehci->need_io_watchdog = 0;
 92
 93	ci_platform_configure(ci);
 94
 95	return ret;
 96}
 97
 98static const struct ehci_driver_overrides ehci_ci_overrides = {
 99	.extra_priv_size = sizeof(struct ehci_ci_priv),
100	.port_power	 = ehci_ci_portpower,
101	.reset		 = ehci_ci_reset,
102};
103
104static irqreturn_t host_irq(struct ci_hdrc *ci)
105{
106	return usb_hcd_irq(ci->irq, ci->hcd);
107}
108
109static int host_start(struct ci_hdrc *ci)
110{
111	struct usb_hcd *hcd;
112	struct ehci_hcd *ehci;
113	struct ehci_ci_priv *priv;
114	int ret;
115
116	if (usb_disabled())
117		return -ENODEV;
118
119	hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev));
120	if (!hcd)
121		return -ENOMEM;
122
123	dev_set_drvdata(ci->dev, ci);
124	hcd->rsrc_start = ci->hw_bank.phys;
125	hcd->rsrc_len = ci->hw_bank.size;
126	hcd->regs = ci->hw_bank.abs;
127	hcd->has_tt = 1;
128
129	hcd->power_budget = ci->platdata->power_budget;
130	hcd->tpl_support = ci->platdata->tpl_support;
131	if (ci->phy)
132		hcd->phy = ci->phy;
133	else
134		hcd->usb_phy = ci->usb_phy;
135
136	ehci = hcd_to_ehci(hcd);
137	ehci->caps = ci->hw_bank.cap;
138	ehci->has_hostpc = ci->hw_bank.lpm;
139	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
140	ehci->imx28_write_fix = ci->imx28_write_fix;
141
142	priv = (struct ehci_ci_priv *)ehci->priv;
143	priv->reg_vbus = NULL;
144
145	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
146		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
147			ret = regulator_enable(ci->platdata->reg_vbus);
148			if (ret) {
149				dev_err(ci->dev,
150				"Failed to enable vbus regulator, ret=%d\n",
151									ret);
152				goto put_hcd;
153			}
154		} else {
155			priv->reg_vbus = ci->platdata->reg_vbus;
156		}
157	}
158
159	ret = usb_add_hcd(hcd, 0, 0);
160	if (ret) {
161		goto disable_reg;
162	} else {
163		struct usb_otg *otg = &ci->otg;
164
165		ci->hcd = hcd;
166
167		if (ci_otg_is_fsm_mode(ci)) {
168			otg->host = &hcd->self;
169			hcd->self.otg_port = 1;
170		}
171	}
172
173	return ret;
174
175disable_reg:
176	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
177			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
178		regulator_disable(ci->platdata->reg_vbus);
179put_hcd:
180	usb_put_hcd(hcd);
181
182	return ret;
183}
184
185static void host_stop(struct ci_hdrc *ci)
186{
187	struct usb_hcd *hcd = ci->hcd;
188
189	if (hcd) {
190		usb_remove_hcd(hcd);
191		ci->role = CI_ROLE_END;
192		synchronize_irq(ci->irq);
193		usb_put_hcd(hcd);
194		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
195			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
196				regulator_disable(ci->platdata->reg_vbus);
197	}
198	ci->hcd = NULL;
199	ci->otg.host = NULL;
200}
201
202
203void ci_hdrc_host_destroy(struct ci_hdrc *ci)
204{
205	if (ci->role == CI_ROLE_HOST && ci->hcd)
206		host_stop(ci);
207}
208
209static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
210{
211	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
212	int port;
213	u32 tmp;
214
215	int ret = orig_bus_suspend(hcd);
216
217	if (ret)
218		return ret;
219
220	port = HCS_N_PORTS(ehci->hcs_params);
221	while (port--) {
222		u32 __iomem *reg = &ehci->regs->port_status[port];
223		u32 portsc = ehci_readl(ehci, reg);
224
225		if (portsc & PORT_CONNECT) {
226			/*
227			 * For chipidea, the resume signal will be ended
228			 * automatically, so for remote wakeup case, the
229			 * usbcmd.rs may not be set before the resume has
230			 * ended if other resume paths consumes too much
231			 * time (~24ms), in that case, the SOF will not
232			 * send out within 3ms after resume ends, then the
233			 * high speed device will enter full speed mode.
234			 */
235
236			tmp = ehci_readl(ehci, &ehci->regs->command);
237			tmp |= CMD_RUN;
238			ehci_writel(ehci, tmp, &ehci->regs->command);
239			/*
240			 * It needs a short delay between set RS bit and PHCD.
241			 */
242			usleep_range(150, 200);
243			break;
244		}
245	}
246
247	return 0;
248}
249
250int ci_hdrc_host_init(struct ci_hdrc *ci)
251{
252	struct ci_role_driver *rdrv;
253
254	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
255		return -ENXIO;
256
257	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
258	if (!rdrv)
259		return -ENOMEM;
260
261	rdrv->start	= host_start;
262	rdrv->stop	= host_stop;
263	rdrv->irq	= host_irq;
264	rdrv->name	= "host";
265	ci->roles[CI_ROLE_HOST] = rdrv;
266
267	return 0;
268}
269
270void ci_hdrc_host_driver_init(void)
271{
272	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
273	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
274	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
275}