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1# Put here option for CPU selection and depending optimization
2choice
3 prompt "Processor family"
4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
6
7config M386
8 bool "386"
9 depends on X86_32 && !UML
10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
39 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45
46 If you don't know what to do, choose "386".
47
48config M486
49 bool "486"
50 depends on X86_32
51 ---help---
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 depends on X86_32
60 ---help---
61 Select this for an 586 or 686 series processor such as the AMD K5,
62 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
63 assume the RDTSC (Read Time Stamp Counter) instruction.
64
65config M586TSC
66 bool "Pentium-Classic"
67 depends on X86_32
68 ---help---
69 Select this for a Pentium Classic processor with the RDTSC (Read
70 Time Stamp Counter) instruction for benchmarking.
71
72config M586MMX
73 bool "Pentium-MMX"
74 depends on X86_32
75 ---help---
76 Select this for a Pentium with the MMX graphics/multimedia
77 extended instructions.
78
79config M686
80 bool "Pentium-Pro"
81 depends on X86_32
82 ---help---
83 Select this for Intel Pentium Pro chips. This enables the use of
84 Pentium Pro extended instructions, and disables the init-time guard
85 against the f00f bug found in earlier Pentiums.
86
87config MPENTIUMII
88 bool "Pentium-II/Celeron(pre-Coppermine)"
89 depends on X86_32
90 ---help---
91 Select this for Intel chips based on the Pentium-II and
92 pre-Coppermine Celeron core. This option enables an unaligned
93 copy optimization, compiles the kernel with optimization flags
94 tailored for the chip, and applies any applicable Pentium Pro
95 optimizations.
96
97config MPENTIUMIII
98 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
99 depends on X86_32
100 ---help---
101 Select this for Intel chips based on the Pentium-III and
102 Celeron-Coppermine core. This option enables use of some
103 extended prefetch instructions in addition to the Pentium II
104 extensions.
105
106config MPENTIUMM
107 bool "Pentium M"
108 depends on X86_32
109 ---help---
110 Select this for Intel Pentium M (not Pentium-4 M)
111 notebook chips.
112
113config MPENTIUM4
114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
115 depends on X86_32
116 ---help---
117 Select this for Intel Pentium 4 chips. This includes the
118 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
119 Pentium-4 M (not Pentium M) chips. This option enables compile
120 flags optimized for the chip, uses the correct cache line size, and
121 applies any applicable optimizations.
122
123 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
124
125 Select this for:
126 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
127 -Willamette
128 -Northwood
129 -Mobile Pentium 4
130 -Mobile Pentium 4 M
131 -Extreme Edition (Gallatin)
132 -Prescott
133 -Prescott 2M
134 -Cedar Mill
135 -Presler
136 -Smithfiled
137 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
138 -Foster
139 -Prestonia
140 -Gallatin
141 -Nocona
142 -Irwindale
143 -Cranford
144 -Potomac
145 -Paxville
146 -Dempsey
147
148
149config MK6
150 bool "K6/K6-II/K6-III"
151 depends on X86_32
152 ---help---
153 Select this for an AMD K6-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK7
158 bool "Athlon/Duron/K7"
159 depends on X86_32
160 ---help---
161 Select this for an AMD Athlon K7-family processor. Enables use of
162 some extended instructions, and passes appropriate optimization
163 flags to GCC.
164
165config MK8
166 bool "Opteron/Athlon64/Hammer/K8"
167 ---help---
168 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
169 Enables use of some extended instructions, and passes appropriate
170 optimization flags to GCC.
171
172config MCRUSOE
173 bool "Crusoe"
174 depends on X86_32
175 ---help---
176 Select this for a Transmeta Crusoe processor. Treats the processor
177 like a 586 with TSC, and sets some GCC optimization flags (like a
178 Pentium Pro with no alignment requirements).
179
180config MEFFICEON
181 bool "Efficeon"
182 depends on X86_32
183 ---help---
184 Select this for a Transmeta Efficeon processor.
185
186config MWINCHIPC6
187 bool "Winchip-C6"
188 depends on X86_32
189 ---help---
190 Select this for an IDT Winchip C6 chip. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements.
193
194config MWINCHIP3D
195 bool "Winchip-2/Winchip-2A/Winchip-3"
196 depends on X86_32
197 ---help---
198 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
199 treat this chip as a 586TSC with some extended instructions
200 and alignment requirements. Also enable out of order memory
201 stores for this CPU, which can increase performance of some
202 operations.
203
204config MELAN
205 bool "AMD Elan"
206 depends on X86_32
207 ---help---
208 Select this for an AMD Elan processor.
209
210 Do not use this option for K6/Athlon/Opteron processors!
211
212config MGEODEGX1
213 bool "GeodeGX1"
214 depends on X86_32
215 ---help---
216 Select this for a Geode GX1 (Cyrix MediaGX) chip.
217
218config MGEODE_LX
219 bool "Geode GX/LX"
220 depends on X86_32
221 ---help---
222 Select this for AMD Geode GX and LX processors.
223
224config MCYRIXIII
225 bool "CyrixIII/VIA-C3"
226 depends on X86_32
227 ---help---
228 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
229 treat this chip as a generic 586. Whilst the CPU is 686 class,
230 it lacks the cmov extension which gcc assumes is present when
231 generating 686 code.
232 Note that Nehemiah (Model 9) and above will not boot with this
233 kernel due to them lacking the 3DNow! instructions used in earlier
234 incarnations of the CPU.
235
236config MVIAC3_2
237 bool "VIA C3-2 (Nehemiah)"
238 depends on X86_32
239 ---help---
240 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
241 of SSE and tells gcc to treat the CPU as a 686.
242 Note, this kernel will not boot on older (pre model 9) C3s.
243
244config MVIAC7
245 bool "VIA C7"
246 depends on X86_32
247 ---help---
248 Select this for a VIA C7. Selecting this uses the correct cache
249 shift and tells gcc to treat the CPU as a 686.
250
251config MPSC
252 bool "Intel P4 / older Netburst based Xeon"
253 depends on X86_64
254 ---help---
255 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
256 Xeon CPUs with Intel 64bit which is compatible with x86-64.
257 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
258 Netburst core and shouldn't use this option. You can distinguish them
259 using the cpu family field
260 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
261
262config MCORE2
263 bool "Core 2/newer Xeon"
264 ---help---
265
266 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
267 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
268 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
269 (not a typo)
270
271config MATOM
272 bool "Intel Atom"
273 ---help---
274
275 Select this for the Intel Atom platform. Intel Atom CPUs have an
276 in-order pipelining architecture and thus can benefit from
277 accordingly optimized code. Use a recent GCC with specific Atom
278 support in order to fully benefit from selecting this option.
279
280config GENERIC_CPU
281 bool "Generic-x86-64"
282 depends on X86_64
283 ---help---
284 Generic x86-64 CPU.
285 Run equally well on all x86-64 CPUs.
286
287endchoice
288
289config X86_GENERIC
290 bool "Generic x86 support"
291 depends on X86_32
292 ---help---
293 Instead of just including optimizations for the selected
294 x86 variant (e.g. PII, Crusoe or Athlon), include some more
295 generic optimizations as well. This will make the kernel
296 perform better on x86 CPUs other than that selected.
297
298 This is really intended for distributors who need more
299 generic optimizations.
300
301#
302# Define implied options from the CPU selection here
303config X86_INTERNODE_CACHE_SHIFT
304 int
305 default "12" if X86_VSMP
306 default "7" if NUMA
307 default X86_L1_CACHE_SHIFT
308
309config X86_CMPXCHG
310 def_bool X86_64 || (X86_32 && !M386)
311
312config CMPXCHG_LOCAL
313 def_bool X86_64 || (X86_32 && !M386)
314
315config CMPXCHG_DOUBLE
316 def_bool y
317
318config X86_L1_CACHE_SHIFT
319 int
320 default "7" if MPENTIUM4 || MPSC
321 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
322 default "4" if MELAN || M486 || M386 || MGEODEGX1
323 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
324
325config X86_XADD
326 def_bool y
327 depends on X86_64 || !M386
328
329config X86_PPRO_FENCE
330 bool "PentiumPro memory ordering errata workaround"
331 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
332 ---help---
333 Old PentiumPro multiprocessor systems had errata that could cause
334 memory operations to violate the x86 ordering standard in rare cases.
335 Enabling this option will attempt to work around some (but not all)
336 occurrences of this problem, at the cost of much heavier spinlock and
337 memory barrier operations.
338
339 If unsure, say n here. Even distro kernels should think twice before
340 enabling this: there are few systems, and an unlikely bug.
341
342config X86_F00F_BUG
343 def_bool y
344 depends on M586MMX || M586TSC || M586 || M486 || M386
345
346config X86_INVD_BUG
347 def_bool y
348 depends on M486 || M386
349
350config X86_WP_WORKS_OK
351 def_bool y
352 depends on !M386
353
354config X86_INVLPG
355 def_bool y
356 depends on X86_32 && !M386
357
358config X86_BSWAP
359 def_bool y
360 depends on X86_32 && !M386
361
362config X86_POPAD_OK
363 def_bool y
364 depends on X86_32 && !M386
365
366config X86_ALIGNMENT_16
367 def_bool y
368 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
369
370config X86_INTEL_USERCOPY
371 def_bool y
372 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
373
374config X86_USE_PPRO_CHECKSUM
375 def_bool y
376 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
377
378config X86_USE_3DNOW
379 def_bool y
380 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
381
382config X86_OOSTORE
383 def_bool y
384 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
385
386#
387# P6_NOPs are a relatively minor optimization that require a family >=
388# 6 processor, except that it is broken on certain VIA chips.
389# Furthermore, AMD chips prefer a totally different sequence of NOPs
390# (which work on all CPUs). In addition, it looks like Virtual PC
391# does not understand them.
392#
393# As a result, disallow these if we're not compiling for X86_64 (these
394# NOPs do work on all x86-64 capable chips); the list of processors in
395# the right-hand clause are the cores that benefit from this optimization.
396#
397config X86_P6_NOP
398 def_bool y
399 depends on X86_64
400 depends on (MCORE2 || MPENTIUM4 || MPSC)
401
402config X86_TSC
403 def_bool y
404 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
405
406config X86_CMPXCHG64
407 def_bool y
408 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
409
410# this should be set for all -march=.. options where the compiler
411# generates cmov.
412config X86_CMOV
413 def_bool y
414 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
415
416config X86_MINIMUM_CPU_FAMILY
417 int
418 default "64" if X86_64
419 default "6" if X86_32 && X86_P6_NOP
420 default "5" if X86_32 && X86_CMPXCHG64
421 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
422 default "3"
423
424config X86_DEBUGCTLMSR
425 def_bool y
426 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
427
428menuconfig PROCESSOR_SELECT
429 bool "Supported processor vendors" if EXPERT
430 ---help---
431 This lets you choose what x86 vendor support code your kernel
432 will include.
433
434config CPU_SUP_INTEL
435 default y
436 bool "Support Intel processors" if PROCESSOR_SELECT
437 ---help---
438 This enables detection, tunings and quirks for Intel processors
439
440 You need this enabled if you want your kernel to run on an
441 Intel CPU. Disabling this option on other types of CPUs
442 makes the kernel a tiny bit smaller. Disabling it on an Intel
443 CPU might render the kernel unbootable.
444
445 If unsure, say N.
446
447config CPU_SUP_CYRIX_32
448 default y
449 bool "Support Cyrix processors" if PROCESSOR_SELECT
450 depends on !64BIT
451 ---help---
452 This enables detection, tunings and quirks for Cyrix processors
453
454 You need this enabled if you want your kernel to run on a
455 Cyrix CPU. Disabling this option on other types of CPUs
456 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
457 CPU might render the kernel unbootable.
458
459 If unsure, say N.
460
461config CPU_SUP_AMD
462 default y
463 bool "Support AMD processors" if PROCESSOR_SELECT
464 ---help---
465 This enables detection, tunings and quirks for AMD processors
466
467 You need this enabled if you want your kernel to run on an
468 AMD CPU. Disabling this option on other types of CPUs
469 makes the kernel a tiny bit smaller. Disabling it on an AMD
470 CPU might render the kernel unbootable.
471
472 If unsure, say N.
473
474config CPU_SUP_CENTAUR
475 default y
476 bool "Support Centaur processors" if PROCESSOR_SELECT
477 ---help---
478 This enables detection, tunings and quirks for Centaur processors
479
480 You need this enabled if you want your kernel to run on a
481 Centaur CPU. Disabling this option on other types of CPUs
482 makes the kernel a tiny bit smaller. Disabling it on a Centaur
483 CPU might render the kernel unbootable.
484
485 If unsure, say N.
486
487config CPU_SUP_TRANSMETA_32
488 default y
489 bool "Support Transmeta processors" if PROCESSOR_SELECT
490 depends on !64BIT
491 ---help---
492 This enables detection, tunings and quirks for Transmeta processors
493
494 You need this enabled if you want your kernel to run on a
495 Transmeta CPU. Disabling this option on other types of CPUs
496 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
497 CPU might render the kernel unbootable.
498
499 If unsure, say N.
500
501config CPU_SUP_UMC_32
502 default y
503 bool "Support UMC processors" if PROCESSOR_SELECT
504 depends on !64BIT
505 ---help---
506 This enables detection, tunings and quirks for UMC processors
507
508 You need this enabled if you want your kernel to run on a
509 UMC CPU. Disabling this option on other types of CPUs
510 makes the kernel a tiny bit smaller. Disabling it on a UMC
511 CPU might render the kernel unbootable.
512
513 If unsure, say N.
1# SPDX-License-Identifier: GPL-2.0
2# Put here option for CPU selection and depending optimization
3choice
4 prompt "Processor family"
5 default M686 if X86_32
6 default GENERIC_CPU if X86_64
7 ---help---
8 This is the processor type of your CPU. This information is
9 used for optimizing purposes. In order to compile a kernel
10 that can run on all supported x86 CPU types (albeit not
11 optimally fast), you can specify "486" here.
12
13 Note that the 386 is no longer supported, this includes
14 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
15 UMC 486SX-S and the NexGen Nx586.
16
17 The kernel will not necessarily run on earlier architectures than
18 the one you have chosen, e.g. a Pentium optimized kernel will run on
19 a PPro, but not necessarily on a i486.
20
21 Here are the settings recommended for greatest speed:
22 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
23 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
24 - "586" for generic Pentium CPUs lacking the TSC
25 (time stamp counter) register.
26 - "Pentium-Classic" for the Intel Pentium.
27 - "Pentium-MMX" for the Intel Pentium MMX.
28 - "Pentium-Pro" for the Intel Pentium Pro.
29 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
30 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
31 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
32 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
33 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
34 - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
35 - "Crusoe" for the Transmeta Crusoe series.
36 - "Efficeon" for the Transmeta Efficeon series.
37 - "Winchip-C6" for original IDT Winchip.
38 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
39 - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45 - "Intel P4" for the Pentium 4/Netburst microarchitecture.
46 - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
47 - "Intel Atom" for the Atom-microarchitecture CPUs.
48 - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
49
50 See each option's help text for additional details. If you don't know
51 what to do, choose "486".
52
53config M486
54 bool "486"
55 depends on X86_32
56 ---help---
57 Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
58 486DX/DX2/DX4 or SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
59
60config M586
61 bool "586/K5/5x86/6x86/6x86MX"
62 depends on X86_32
63 ---help---
64 Select this for an 586 or 686 series processor such as the AMD K5,
65 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
66 assume the RDTSC (Read Time Stamp Counter) instruction.
67
68config M586TSC
69 bool "Pentium-Classic"
70 depends on X86_32
71 ---help---
72 Select this for a Pentium Classic processor with the RDTSC (Read
73 Time Stamp Counter) instruction for benchmarking.
74
75config M586MMX
76 bool "Pentium-MMX"
77 depends on X86_32
78 ---help---
79 Select this for a Pentium with the MMX graphics/multimedia
80 extended instructions.
81
82config M686
83 bool "Pentium-Pro"
84 depends on X86_32
85 ---help---
86 Select this for Intel Pentium Pro chips. This enables the use of
87 Pentium Pro extended instructions, and disables the init-time guard
88 against the f00f bug found in earlier Pentiums.
89
90config MPENTIUMII
91 bool "Pentium-II/Celeron(pre-Coppermine)"
92 depends on X86_32
93 ---help---
94 Select this for Intel chips based on the Pentium-II and
95 pre-Coppermine Celeron core. This option enables an unaligned
96 copy optimization, compiles the kernel with optimization flags
97 tailored for the chip, and applies any applicable Pentium Pro
98 optimizations.
99
100config MPENTIUMIII
101 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
102 depends on X86_32
103 ---help---
104 Select this for Intel chips based on the Pentium-III and
105 Celeron-Coppermine core. This option enables use of some
106 extended prefetch instructions in addition to the Pentium II
107 extensions.
108
109config MPENTIUMM
110 bool "Pentium M"
111 depends on X86_32
112 ---help---
113 Select this for Intel Pentium M (not Pentium-4 M)
114 notebook chips.
115
116config MPENTIUM4
117 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
118 depends on X86_32
119 ---help---
120 Select this for Intel Pentium 4 chips. This includes the
121 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
122 Pentium-4 M (not Pentium M) chips. This option enables compile
123 flags optimized for the chip, uses the correct cache line size, and
124 applies any applicable optimizations.
125
126 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
127
128 Select this for:
129 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
130 -Willamette
131 -Northwood
132 -Mobile Pentium 4
133 -Mobile Pentium 4 M
134 -Extreme Edition (Gallatin)
135 -Prescott
136 -Prescott 2M
137 -Cedar Mill
138 -Presler
139 -Smithfiled
140 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
141 -Foster
142 -Prestonia
143 -Gallatin
144 -Nocona
145 -Irwindale
146 -Cranford
147 -Potomac
148 -Paxville
149 -Dempsey
150
151
152config MK6
153 bool "K6/K6-II/K6-III"
154 depends on X86_32
155 ---help---
156 Select this for an AMD K6-family processor. Enables use of
157 some extended instructions, and passes appropriate optimization
158 flags to GCC.
159
160config MK7
161 bool "Athlon/Duron/K7"
162 depends on X86_32
163 ---help---
164 Select this for an AMD Athlon K7-family processor. Enables use of
165 some extended instructions, and passes appropriate optimization
166 flags to GCC.
167
168config MK8
169 bool "Opteron/Athlon64/Hammer/K8"
170 ---help---
171 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
172 Enables use of some extended instructions, and passes appropriate
173 optimization flags to GCC.
174
175config MCRUSOE
176 bool "Crusoe"
177 depends on X86_32
178 ---help---
179 Select this for a Transmeta Crusoe processor. Treats the processor
180 like a 586 with TSC, and sets some GCC optimization flags (like a
181 Pentium Pro with no alignment requirements).
182
183config MEFFICEON
184 bool "Efficeon"
185 depends on X86_32
186 ---help---
187 Select this for a Transmeta Efficeon processor.
188
189config MWINCHIPC6
190 bool "Winchip-C6"
191 depends on X86_32
192 ---help---
193 Select this for an IDT Winchip C6 chip. Linux and GCC
194 treat this chip as a 586TSC with some extended instructions
195 and alignment requirements.
196
197config MWINCHIP3D
198 bool "Winchip-2/Winchip-2A/Winchip-3"
199 depends on X86_32
200 ---help---
201 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
202 treat this chip as a 586TSC with some extended instructions
203 and alignment requirements. Also enable out of order memory
204 stores for this CPU, which can increase performance of some
205 operations.
206
207config MELAN
208 bool "AMD Elan"
209 depends on X86_32
210 ---help---
211 Select this for an AMD Elan processor.
212
213 Do not use this option for K6/Athlon/Opteron processors!
214
215config MGEODEGX1
216 bool "GeodeGX1"
217 depends on X86_32
218 ---help---
219 Select this for a Geode GX1 (Cyrix MediaGX) chip.
220
221config MGEODE_LX
222 bool "Geode GX/LX"
223 depends on X86_32
224 ---help---
225 Select this for AMD Geode GX and LX processors.
226
227config MCYRIXIII
228 bool "CyrixIII/VIA-C3"
229 depends on X86_32
230 ---help---
231 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
232 treat this chip as a generic 586. Whilst the CPU is 686 class,
233 it lacks the cmov extension which gcc assumes is present when
234 generating 686 code.
235 Note that Nehemiah (Model 9) and above will not boot with this
236 kernel due to them lacking the 3DNow! instructions used in earlier
237 incarnations of the CPU.
238
239config MVIAC3_2
240 bool "VIA C3-2 (Nehemiah)"
241 depends on X86_32
242 ---help---
243 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
244 of SSE and tells gcc to treat the CPU as a 686.
245 Note, this kernel will not boot on older (pre model 9) C3s.
246
247config MVIAC7
248 bool "VIA C7"
249 depends on X86_32
250 ---help---
251 Select this for a VIA C7. Selecting this uses the correct cache
252 shift and tells gcc to treat the CPU as a 686.
253
254config MPSC
255 bool "Intel P4 / older Netburst based Xeon"
256 depends on X86_64
257 ---help---
258 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
259 Xeon CPUs with Intel 64bit which is compatible with x86-64.
260 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
261 Netburst core and shouldn't use this option. You can distinguish them
262 using the cpu family field
263 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
264
265config MCORE2
266 bool "Core 2/newer Xeon"
267 ---help---
268
269 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
270 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
271 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
272 (not a typo)
273
274config MATOM
275 bool "Intel Atom"
276 ---help---
277
278 Select this for the Intel Atom platform. Intel Atom CPUs have an
279 in-order pipelining architecture and thus can benefit from
280 accordingly optimized code. Use a recent GCC with specific Atom
281 support in order to fully benefit from selecting this option.
282
283config GENERIC_CPU
284 bool "Generic-x86-64"
285 depends on X86_64
286 ---help---
287 Generic x86-64 CPU.
288 Run equally well on all x86-64 CPUs.
289
290endchoice
291
292config X86_GENERIC
293 bool "Generic x86 support"
294 depends on X86_32
295 ---help---
296 Instead of just including optimizations for the selected
297 x86 variant (e.g. PII, Crusoe or Athlon), include some more
298 generic optimizations as well. This will make the kernel
299 perform better on x86 CPUs other than that selected.
300
301 This is really intended for distributors who need more
302 generic optimizations.
303
304#
305# Define implied options from the CPU selection here
306config X86_INTERNODE_CACHE_SHIFT
307 int
308 default "12" if X86_VSMP
309 default X86_L1_CACHE_SHIFT
310
311config X86_L1_CACHE_SHIFT
312 int
313 default "7" if MPENTIUM4 || MPSC
314 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
315 default "4" if MELAN || M486 || MGEODEGX1
316 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
317
318config X86_F00F_BUG
319 def_bool y
320 depends on M586MMX || M586TSC || M586 || M486
321
322config X86_INVD_BUG
323 def_bool y
324 depends on M486
325
326config X86_ALIGNMENT_16
327 def_bool y
328 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
329
330config X86_INTEL_USERCOPY
331 def_bool y
332 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
333
334config X86_USE_PPRO_CHECKSUM
335 def_bool y
336 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
337
338config X86_USE_3DNOW
339 def_bool y
340 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
341
342#
343# P6_NOPs are a relatively minor optimization that require a family >=
344# 6 processor, except that it is broken on certain VIA chips.
345# Furthermore, AMD chips prefer a totally different sequence of NOPs
346# (which work on all CPUs). In addition, it looks like Virtual PC
347# does not understand them.
348#
349# As a result, disallow these if we're not compiling for X86_64 (these
350# NOPs do work on all x86-64 capable chips); the list of processors in
351# the right-hand clause are the cores that benefit from this optimization.
352#
353config X86_P6_NOP
354 def_bool y
355 depends on X86_64
356 depends on (MCORE2 || MPENTIUM4 || MPSC)
357
358config X86_TSC
359 def_bool y
360 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
361
362config X86_CMPXCHG64
363 def_bool y
364 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8
365
366# this should be set for all -march=.. options where the compiler
367# generates cmov.
368config X86_CMOV
369 def_bool y
370 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
371
372config X86_MINIMUM_CPU_FAMILY
373 int
374 default "64" if X86_64
375 default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8)
376 default "5" if X86_32 && X86_CMPXCHG64
377 default "4"
378
379config X86_DEBUGCTLMSR
380 def_bool y
381 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML
382
383menuconfig PROCESSOR_SELECT
384 bool "Supported processor vendors" if EXPERT
385 ---help---
386 This lets you choose what x86 vendor support code your kernel
387 will include.
388
389config CPU_SUP_INTEL
390 default y
391 bool "Support Intel processors" if PROCESSOR_SELECT
392 ---help---
393 This enables detection, tunings and quirks for Intel processors
394
395 You need this enabled if you want your kernel to run on an
396 Intel CPU. Disabling this option on other types of CPUs
397 makes the kernel a tiny bit smaller. Disabling it on an Intel
398 CPU might render the kernel unbootable.
399
400 If unsure, say N.
401
402config CPU_SUP_CYRIX_32
403 default y
404 bool "Support Cyrix processors" if PROCESSOR_SELECT
405 depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
406 ---help---
407 This enables detection, tunings and quirks for Cyrix processors
408
409 You need this enabled if you want your kernel to run on a
410 Cyrix CPU. Disabling this option on other types of CPUs
411 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
412 CPU might render the kernel unbootable.
413
414 If unsure, say N.
415
416config CPU_SUP_AMD
417 default y
418 bool "Support AMD processors" if PROCESSOR_SELECT
419 ---help---
420 This enables detection, tunings and quirks for AMD processors
421
422 You need this enabled if you want your kernel to run on an
423 AMD CPU. Disabling this option on other types of CPUs
424 makes the kernel a tiny bit smaller. Disabling it on an AMD
425 CPU might render the kernel unbootable.
426
427 If unsure, say N.
428
429config CPU_SUP_CENTAUR
430 default y
431 bool "Support Centaur processors" if PROCESSOR_SELECT
432 ---help---
433 This enables detection, tunings and quirks for Centaur processors
434
435 You need this enabled if you want your kernel to run on a
436 Centaur CPU. Disabling this option on other types of CPUs
437 makes the kernel a tiny bit smaller. Disabling it on a Centaur
438 CPU might render the kernel unbootable.
439
440 If unsure, say N.
441
442config CPU_SUP_TRANSMETA_32
443 default y
444 bool "Support Transmeta processors" if PROCESSOR_SELECT
445 depends on !64BIT
446 ---help---
447 This enables detection, tunings and quirks for Transmeta processors
448
449 You need this enabled if you want your kernel to run on a
450 Transmeta CPU. Disabling this option on other types of CPUs
451 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
452 CPU might render the kernel unbootable.
453
454 If unsure, say N.
455
456config CPU_SUP_UMC_32
457 default y
458 bool "Support UMC processors" if PROCESSOR_SELECT
459 depends on M486 || (EXPERT && !64BIT)
460 ---help---
461 This enables detection, tunings and quirks for UMC processors
462
463 You need this enabled if you want your kernel to run on a
464 UMC CPU. Disabling this option on other types of CPUs
465 makes the kernel a tiny bit smaller. Disabling it on a UMC
466 CPU might render the kernel unbootable.
467
468 If unsure, say N.