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1# Put here option for CPU selection and depending optimization
2choice
3 prompt "Processor family"
4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
6
7config M386
8 bool "386"
9 depends on X86_32 && !UML
10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
39 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45
46 If you don't know what to do, choose "386".
47
48config M486
49 bool "486"
50 depends on X86_32
51 ---help---
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 depends on X86_32
60 ---help---
61 Select this for an 586 or 686 series processor such as the AMD K5,
62 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
63 assume the RDTSC (Read Time Stamp Counter) instruction.
64
65config M586TSC
66 bool "Pentium-Classic"
67 depends on X86_32
68 ---help---
69 Select this for a Pentium Classic processor with the RDTSC (Read
70 Time Stamp Counter) instruction for benchmarking.
71
72config M586MMX
73 bool "Pentium-MMX"
74 depends on X86_32
75 ---help---
76 Select this for a Pentium with the MMX graphics/multimedia
77 extended instructions.
78
79config M686
80 bool "Pentium-Pro"
81 depends on X86_32
82 ---help---
83 Select this for Intel Pentium Pro chips. This enables the use of
84 Pentium Pro extended instructions, and disables the init-time guard
85 against the f00f bug found in earlier Pentiums.
86
87config MPENTIUMII
88 bool "Pentium-II/Celeron(pre-Coppermine)"
89 depends on X86_32
90 ---help---
91 Select this for Intel chips based on the Pentium-II and
92 pre-Coppermine Celeron core. This option enables an unaligned
93 copy optimization, compiles the kernel with optimization flags
94 tailored for the chip, and applies any applicable Pentium Pro
95 optimizations.
96
97config MPENTIUMIII
98 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
99 depends on X86_32
100 ---help---
101 Select this for Intel chips based on the Pentium-III and
102 Celeron-Coppermine core. This option enables use of some
103 extended prefetch instructions in addition to the Pentium II
104 extensions.
105
106config MPENTIUMM
107 bool "Pentium M"
108 depends on X86_32
109 ---help---
110 Select this for Intel Pentium M (not Pentium-4 M)
111 notebook chips.
112
113config MPENTIUM4
114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
115 depends on X86_32
116 ---help---
117 Select this for Intel Pentium 4 chips. This includes the
118 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
119 Pentium-4 M (not Pentium M) chips. This option enables compile
120 flags optimized for the chip, uses the correct cache line size, and
121 applies any applicable optimizations.
122
123 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
124
125 Select this for:
126 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
127 -Willamette
128 -Northwood
129 -Mobile Pentium 4
130 -Mobile Pentium 4 M
131 -Extreme Edition (Gallatin)
132 -Prescott
133 -Prescott 2M
134 -Cedar Mill
135 -Presler
136 -Smithfiled
137 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
138 -Foster
139 -Prestonia
140 -Gallatin
141 -Nocona
142 -Irwindale
143 -Cranford
144 -Potomac
145 -Paxville
146 -Dempsey
147
148
149config MK6
150 bool "K6/K6-II/K6-III"
151 depends on X86_32
152 ---help---
153 Select this for an AMD K6-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK7
158 bool "Athlon/Duron/K7"
159 depends on X86_32
160 ---help---
161 Select this for an AMD Athlon K7-family processor. Enables use of
162 some extended instructions, and passes appropriate optimization
163 flags to GCC.
164
165config MK8
166 bool "Opteron/Athlon64/Hammer/K8"
167 ---help---
168 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
169 Enables use of some extended instructions, and passes appropriate
170 optimization flags to GCC.
171
172config MCRUSOE
173 bool "Crusoe"
174 depends on X86_32
175 ---help---
176 Select this for a Transmeta Crusoe processor. Treats the processor
177 like a 586 with TSC, and sets some GCC optimization flags (like a
178 Pentium Pro with no alignment requirements).
179
180config MEFFICEON
181 bool "Efficeon"
182 depends on X86_32
183 ---help---
184 Select this for a Transmeta Efficeon processor.
185
186config MWINCHIPC6
187 bool "Winchip-C6"
188 depends on X86_32
189 ---help---
190 Select this for an IDT Winchip C6 chip. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements.
193
194config MWINCHIP3D
195 bool "Winchip-2/Winchip-2A/Winchip-3"
196 depends on X86_32
197 ---help---
198 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
199 treat this chip as a 586TSC with some extended instructions
200 and alignment requirements. Also enable out of order memory
201 stores for this CPU, which can increase performance of some
202 operations.
203
204config MELAN
205 bool "AMD Elan"
206 depends on X86_32
207 ---help---
208 Select this for an AMD Elan processor.
209
210 Do not use this option for K6/Athlon/Opteron processors!
211
212config MGEODEGX1
213 bool "GeodeGX1"
214 depends on X86_32
215 ---help---
216 Select this for a Geode GX1 (Cyrix MediaGX) chip.
217
218config MGEODE_LX
219 bool "Geode GX/LX"
220 depends on X86_32
221 ---help---
222 Select this for AMD Geode GX and LX processors.
223
224config MCYRIXIII
225 bool "CyrixIII/VIA-C3"
226 depends on X86_32
227 ---help---
228 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
229 treat this chip as a generic 586. Whilst the CPU is 686 class,
230 it lacks the cmov extension which gcc assumes is present when
231 generating 686 code.
232 Note that Nehemiah (Model 9) and above will not boot with this
233 kernel due to them lacking the 3DNow! instructions used in earlier
234 incarnations of the CPU.
235
236config MVIAC3_2
237 bool "VIA C3-2 (Nehemiah)"
238 depends on X86_32
239 ---help---
240 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
241 of SSE and tells gcc to treat the CPU as a 686.
242 Note, this kernel will not boot on older (pre model 9) C3s.
243
244config MVIAC7
245 bool "VIA C7"
246 depends on X86_32
247 ---help---
248 Select this for a VIA C7. Selecting this uses the correct cache
249 shift and tells gcc to treat the CPU as a 686.
250
251config MPSC
252 bool "Intel P4 / older Netburst based Xeon"
253 depends on X86_64
254 ---help---
255 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
256 Xeon CPUs with Intel 64bit which is compatible with x86-64.
257 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
258 Netburst core and shouldn't use this option. You can distinguish them
259 using the cpu family field
260 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
261
262config MCORE2
263 bool "Core 2/newer Xeon"
264 ---help---
265
266 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
267 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
268 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
269 (not a typo)
270
271config MATOM
272 bool "Intel Atom"
273 ---help---
274
275 Select this for the Intel Atom platform. Intel Atom CPUs have an
276 in-order pipelining architecture and thus can benefit from
277 accordingly optimized code. Use a recent GCC with specific Atom
278 support in order to fully benefit from selecting this option.
279
280config GENERIC_CPU
281 bool "Generic-x86-64"
282 depends on X86_64
283 ---help---
284 Generic x86-64 CPU.
285 Run equally well on all x86-64 CPUs.
286
287endchoice
288
289config X86_GENERIC
290 bool "Generic x86 support"
291 depends on X86_32
292 ---help---
293 Instead of just including optimizations for the selected
294 x86 variant (e.g. PII, Crusoe or Athlon), include some more
295 generic optimizations as well. This will make the kernel
296 perform better on x86 CPUs other than that selected.
297
298 This is really intended for distributors who need more
299 generic optimizations.
300
301#
302# Define implied options from the CPU selection here
303config X86_INTERNODE_CACHE_SHIFT
304 int
305 default "12" if X86_VSMP
306 default "7" if NUMA
307 default X86_L1_CACHE_SHIFT
308
309config X86_CMPXCHG
310 def_bool X86_64 || (X86_32 && !M386)
311
312config CMPXCHG_LOCAL
313 def_bool X86_64 || (X86_32 && !M386)
314
315config CMPXCHG_DOUBLE
316 def_bool y
317
318config X86_L1_CACHE_SHIFT
319 int
320 default "7" if MPENTIUM4 || MPSC
321 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
322 default "4" if MELAN || M486 || M386 || MGEODEGX1
323 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
324
325config X86_XADD
326 def_bool y
327 depends on X86_64 || !M386
328
329config X86_PPRO_FENCE
330 bool "PentiumPro memory ordering errata workaround"
331 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
332 ---help---
333 Old PentiumPro multiprocessor systems had errata that could cause
334 memory operations to violate the x86 ordering standard in rare cases.
335 Enabling this option will attempt to work around some (but not all)
336 occurrences of this problem, at the cost of much heavier spinlock and
337 memory barrier operations.
338
339 If unsure, say n here. Even distro kernels should think twice before
340 enabling this: there are few systems, and an unlikely bug.
341
342config X86_F00F_BUG
343 def_bool y
344 depends on M586MMX || M586TSC || M586 || M486 || M386
345
346config X86_INVD_BUG
347 def_bool y
348 depends on M486 || M386
349
350config X86_WP_WORKS_OK
351 def_bool y
352 depends on !M386
353
354config X86_INVLPG
355 def_bool y
356 depends on X86_32 && !M386
357
358config X86_BSWAP
359 def_bool y
360 depends on X86_32 && !M386
361
362config X86_POPAD_OK
363 def_bool y
364 depends on X86_32 && !M386
365
366config X86_ALIGNMENT_16
367 def_bool y
368 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
369
370config X86_INTEL_USERCOPY
371 def_bool y
372 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
373
374config X86_USE_PPRO_CHECKSUM
375 def_bool y
376 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
377
378config X86_USE_3DNOW
379 def_bool y
380 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
381
382config X86_OOSTORE
383 def_bool y
384 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
385
386#
387# P6_NOPs are a relatively minor optimization that require a family >=
388# 6 processor, except that it is broken on certain VIA chips.
389# Furthermore, AMD chips prefer a totally different sequence of NOPs
390# (which work on all CPUs). In addition, it looks like Virtual PC
391# does not understand them.
392#
393# As a result, disallow these if we're not compiling for X86_64 (these
394# NOPs do work on all x86-64 capable chips); the list of processors in
395# the right-hand clause are the cores that benefit from this optimization.
396#
397config X86_P6_NOP
398 def_bool y
399 depends on X86_64
400 depends on (MCORE2 || MPENTIUM4 || MPSC)
401
402config X86_TSC
403 def_bool y
404 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
405
406config X86_CMPXCHG64
407 def_bool y
408 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
409
410# this should be set for all -march=.. options where the compiler
411# generates cmov.
412config X86_CMOV
413 def_bool y
414 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
415
416config X86_MINIMUM_CPU_FAMILY
417 int
418 default "64" if X86_64
419 default "6" if X86_32 && X86_P6_NOP
420 default "5" if X86_32 && X86_CMPXCHG64
421 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
422 default "3"
423
424config X86_DEBUGCTLMSR
425 def_bool y
426 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
427
428menuconfig PROCESSOR_SELECT
429 bool "Supported processor vendors" if EXPERT
430 ---help---
431 This lets you choose what x86 vendor support code your kernel
432 will include.
433
434config CPU_SUP_INTEL
435 default y
436 bool "Support Intel processors" if PROCESSOR_SELECT
437 ---help---
438 This enables detection, tunings and quirks for Intel processors
439
440 You need this enabled if you want your kernel to run on an
441 Intel CPU. Disabling this option on other types of CPUs
442 makes the kernel a tiny bit smaller. Disabling it on an Intel
443 CPU might render the kernel unbootable.
444
445 If unsure, say N.
446
447config CPU_SUP_CYRIX_32
448 default y
449 bool "Support Cyrix processors" if PROCESSOR_SELECT
450 depends on !64BIT
451 ---help---
452 This enables detection, tunings and quirks for Cyrix processors
453
454 You need this enabled if you want your kernel to run on a
455 Cyrix CPU. Disabling this option on other types of CPUs
456 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
457 CPU might render the kernel unbootable.
458
459 If unsure, say N.
460
461config CPU_SUP_AMD
462 default y
463 bool "Support AMD processors" if PROCESSOR_SELECT
464 ---help---
465 This enables detection, tunings and quirks for AMD processors
466
467 You need this enabled if you want your kernel to run on an
468 AMD CPU. Disabling this option on other types of CPUs
469 makes the kernel a tiny bit smaller. Disabling it on an AMD
470 CPU might render the kernel unbootable.
471
472 If unsure, say N.
473
474config CPU_SUP_CENTAUR
475 default y
476 bool "Support Centaur processors" if PROCESSOR_SELECT
477 ---help---
478 This enables detection, tunings and quirks for Centaur processors
479
480 You need this enabled if you want your kernel to run on a
481 Centaur CPU. Disabling this option on other types of CPUs
482 makes the kernel a tiny bit smaller. Disabling it on a Centaur
483 CPU might render the kernel unbootable.
484
485 If unsure, say N.
486
487config CPU_SUP_TRANSMETA_32
488 default y
489 bool "Support Transmeta processors" if PROCESSOR_SELECT
490 depends on !64BIT
491 ---help---
492 This enables detection, tunings and quirks for Transmeta processors
493
494 You need this enabled if you want your kernel to run on a
495 Transmeta CPU. Disabling this option on other types of CPUs
496 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
497 CPU might render the kernel unbootable.
498
499 If unsure, say N.
500
501config CPU_SUP_UMC_32
502 default y
503 bool "Support UMC processors" if PROCESSOR_SELECT
504 depends on !64BIT
505 ---help---
506 This enables detection, tunings and quirks for UMC processors
507
508 You need this enabled if you want your kernel to run on a
509 UMC CPU. Disabling this option on other types of CPUs
510 makes the kernel a tiny bit smaller. Disabling it on a UMC
511 CPU might render the kernel unbootable.
512
513 If unsure, say N.
1# Put here option for CPU selection and depending optimization
2choice
3 prompt "Processor family"
4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
6
7config M486
8 bool "486"
9 depends on X86_32
10 ---help---
11 This is the processor type of your CPU. This information is
12 used for optimizing purposes. In order to compile a kernel
13 that can run on all supported x86 CPU types (albeit not
14 optimally fast), you can specify "486" here.
15
16 Note that the 386 is no longer supported, this includes
17 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
18 UMC 486SX-S and the NexGen Nx586.
19
20 The kernel will not necessarily run on earlier architectures than
21 the one you have chosen, e.g. a Pentium optimized kernel will run on
22 a PPro, but not necessarily on a i486.
23
24 Here are the settings recommended for greatest speed:
25 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
26 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
27 - "586" for generic Pentium CPUs lacking the TSC
28 (time stamp counter) register.
29 - "Pentium-Classic" for the Intel Pentium.
30 - "Pentium-MMX" for the Intel Pentium MMX.
31 - "Pentium-Pro" for the Intel Pentium Pro.
32 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
33 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
34 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
35 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
36 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
37 - "Crusoe" for the Transmeta Crusoe series.
38 - "Efficeon" for the Transmeta Efficeon series.
39 - "Winchip-C6" for original IDT Winchip.
40 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
41 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
42 - "Geode GX/LX" For AMD Geode GX and LX processors.
43 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
44 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
45 - "VIA C7" for VIA C7.
46
47 If you don't know what to do, choose "486".
48
49config M586
50 bool "586/K5/5x86/6x86/6x86MX"
51 depends on X86_32
52 ---help---
53 Select this for an 586 or 686 series processor such as the AMD K5,
54 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
55 assume the RDTSC (Read Time Stamp Counter) instruction.
56
57config M586TSC
58 bool "Pentium-Classic"
59 depends on X86_32
60 ---help---
61 Select this for a Pentium Classic processor with the RDTSC (Read
62 Time Stamp Counter) instruction for benchmarking.
63
64config M586MMX
65 bool "Pentium-MMX"
66 depends on X86_32
67 ---help---
68 Select this for a Pentium with the MMX graphics/multimedia
69 extended instructions.
70
71config M686
72 bool "Pentium-Pro"
73 depends on X86_32
74 ---help---
75 Select this for Intel Pentium Pro chips. This enables the use of
76 Pentium Pro extended instructions, and disables the init-time guard
77 against the f00f bug found in earlier Pentiums.
78
79config MPENTIUMII
80 bool "Pentium-II/Celeron(pre-Coppermine)"
81 depends on X86_32
82 ---help---
83 Select this for Intel chips based on the Pentium-II and
84 pre-Coppermine Celeron core. This option enables an unaligned
85 copy optimization, compiles the kernel with optimization flags
86 tailored for the chip, and applies any applicable Pentium Pro
87 optimizations.
88
89config MPENTIUMIII
90 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
91 depends on X86_32
92 ---help---
93 Select this for Intel chips based on the Pentium-III and
94 Celeron-Coppermine core. This option enables use of some
95 extended prefetch instructions in addition to the Pentium II
96 extensions.
97
98config MPENTIUMM
99 bool "Pentium M"
100 depends on X86_32
101 ---help---
102 Select this for Intel Pentium M (not Pentium-4 M)
103 notebook chips.
104
105config MPENTIUM4
106 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
107 depends on X86_32
108 ---help---
109 Select this for Intel Pentium 4 chips. This includes the
110 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
111 Pentium-4 M (not Pentium M) chips. This option enables compile
112 flags optimized for the chip, uses the correct cache line size, and
113 applies any applicable optimizations.
114
115 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
116
117 Select this for:
118 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
119 -Willamette
120 -Northwood
121 -Mobile Pentium 4
122 -Mobile Pentium 4 M
123 -Extreme Edition (Gallatin)
124 -Prescott
125 -Prescott 2M
126 -Cedar Mill
127 -Presler
128 -Smithfiled
129 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
130 -Foster
131 -Prestonia
132 -Gallatin
133 -Nocona
134 -Irwindale
135 -Cranford
136 -Potomac
137 -Paxville
138 -Dempsey
139
140
141config MK6
142 bool "K6/K6-II/K6-III"
143 depends on X86_32
144 ---help---
145 Select this for an AMD K6-family processor. Enables use of
146 some extended instructions, and passes appropriate optimization
147 flags to GCC.
148
149config MK7
150 bool "Athlon/Duron/K7"
151 depends on X86_32
152 ---help---
153 Select this for an AMD Athlon K7-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK8
158 bool "Opteron/Athlon64/Hammer/K8"
159 ---help---
160 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
161 Enables use of some extended instructions, and passes appropriate
162 optimization flags to GCC.
163
164config MCRUSOE
165 bool "Crusoe"
166 depends on X86_32
167 ---help---
168 Select this for a Transmeta Crusoe processor. Treats the processor
169 like a 586 with TSC, and sets some GCC optimization flags (like a
170 Pentium Pro with no alignment requirements).
171
172config MEFFICEON
173 bool "Efficeon"
174 depends on X86_32
175 ---help---
176 Select this for a Transmeta Efficeon processor.
177
178config MWINCHIPC6
179 bool "Winchip-C6"
180 depends on X86_32
181 ---help---
182 Select this for an IDT Winchip C6 chip. Linux and GCC
183 treat this chip as a 586TSC with some extended instructions
184 and alignment requirements.
185
186config MWINCHIP3D
187 bool "Winchip-2/Winchip-2A/Winchip-3"
188 depends on X86_32
189 ---help---
190 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements. Also enable out of order memory
193 stores for this CPU, which can increase performance of some
194 operations.
195
196config MELAN
197 bool "AMD Elan"
198 depends on X86_32
199 ---help---
200 Select this for an AMD Elan processor.
201
202 Do not use this option for K6/Athlon/Opteron processors!
203
204config MGEODEGX1
205 bool "GeodeGX1"
206 depends on X86_32
207 ---help---
208 Select this for a Geode GX1 (Cyrix MediaGX) chip.
209
210config MGEODE_LX
211 bool "Geode GX/LX"
212 depends on X86_32
213 ---help---
214 Select this for AMD Geode GX and LX processors.
215
216config MCYRIXIII
217 bool "CyrixIII/VIA-C3"
218 depends on X86_32
219 ---help---
220 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
221 treat this chip as a generic 586. Whilst the CPU is 686 class,
222 it lacks the cmov extension which gcc assumes is present when
223 generating 686 code.
224 Note that Nehemiah (Model 9) and above will not boot with this
225 kernel due to them lacking the 3DNow! instructions used in earlier
226 incarnations of the CPU.
227
228config MVIAC3_2
229 bool "VIA C3-2 (Nehemiah)"
230 depends on X86_32
231 ---help---
232 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
233 of SSE and tells gcc to treat the CPU as a 686.
234 Note, this kernel will not boot on older (pre model 9) C3s.
235
236config MVIAC7
237 bool "VIA C7"
238 depends on X86_32
239 ---help---
240 Select this for a VIA C7. Selecting this uses the correct cache
241 shift and tells gcc to treat the CPU as a 686.
242
243config MPSC
244 bool "Intel P4 / older Netburst based Xeon"
245 depends on X86_64
246 ---help---
247 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
248 Xeon CPUs with Intel 64bit which is compatible with x86-64.
249 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
250 Netburst core and shouldn't use this option. You can distinguish them
251 using the cpu family field
252 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
253
254config MCORE2
255 bool "Core 2/newer Xeon"
256 ---help---
257
258 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
259 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
260 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
261 (not a typo)
262
263config MATOM
264 bool "Intel Atom"
265 ---help---
266
267 Select this for the Intel Atom platform. Intel Atom CPUs have an
268 in-order pipelining architecture and thus can benefit from
269 accordingly optimized code. Use a recent GCC with specific Atom
270 support in order to fully benefit from selecting this option.
271
272config GENERIC_CPU
273 bool "Generic-x86-64"
274 depends on X86_64
275 ---help---
276 Generic x86-64 CPU.
277 Run equally well on all x86-64 CPUs.
278
279endchoice
280
281config X86_GENERIC
282 bool "Generic x86 support"
283 depends on X86_32
284 ---help---
285 Instead of just including optimizations for the selected
286 x86 variant (e.g. PII, Crusoe or Athlon), include some more
287 generic optimizations as well. This will make the kernel
288 perform better on x86 CPUs other than that selected.
289
290 This is really intended for distributors who need more
291 generic optimizations.
292
293#
294# Define implied options from the CPU selection here
295config X86_INTERNODE_CACHE_SHIFT
296 int
297 default "12" if X86_VSMP
298 default X86_L1_CACHE_SHIFT
299
300config X86_L1_CACHE_SHIFT
301 int
302 default "7" if MPENTIUM4 || MPSC
303 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
304 default "4" if MELAN || M486 || MGEODEGX1
305 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
306
307config X86_PPRO_FENCE
308 bool "PentiumPro memory ordering errata workaround"
309 depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
310 ---help---
311 Old PentiumPro multiprocessor systems had errata that could cause
312 memory operations to violate the x86 ordering standard in rare cases.
313 Enabling this option will attempt to work around some (but not all)
314 occurrences of this problem, at the cost of much heavier spinlock and
315 memory barrier operations.
316
317 If unsure, say n here. Even distro kernels should think twice before
318 enabling this: there are few systems, and an unlikely bug.
319
320config X86_F00F_BUG
321 def_bool y
322 depends on M586MMX || M586TSC || M586 || M486
323
324config X86_INVD_BUG
325 def_bool y
326 depends on M486
327
328config X86_ALIGNMENT_16
329 def_bool y
330 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
331
332config X86_INTEL_USERCOPY
333 def_bool y
334 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
335
336config X86_USE_PPRO_CHECKSUM
337 def_bool y
338 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
339
340config X86_USE_3DNOW
341 def_bool y
342 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
343
344#
345# P6_NOPs are a relatively minor optimization that require a family >=
346# 6 processor, except that it is broken on certain VIA chips.
347# Furthermore, AMD chips prefer a totally different sequence of NOPs
348# (which work on all CPUs). In addition, it looks like Virtual PC
349# does not understand them.
350#
351# As a result, disallow these if we're not compiling for X86_64 (these
352# NOPs do work on all x86-64 capable chips); the list of processors in
353# the right-hand clause are the cores that benefit from this optimization.
354#
355config X86_P6_NOP
356 def_bool y
357 depends on X86_64
358 depends on (MCORE2 || MPENTIUM4 || MPSC)
359
360config X86_TSC
361 def_bool y
362 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
363
364config X86_CMPXCHG64
365 def_bool y
366 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
367
368# this should be set for all -march=.. options where the compiler
369# generates cmov.
370config X86_CMOV
371 def_bool y
372 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
373
374config X86_MINIMUM_CPU_FAMILY
375 int
376 default "64" if X86_64
377 default "6" if X86_32 && X86_P6_NOP
378 default "5" if X86_32 && X86_CMPXCHG64
379 default "4"
380
381config X86_DEBUGCTLMSR
382 def_bool y
383 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML
384
385menuconfig PROCESSOR_SELECT
386 bool "Supported processor vendors" if EXPERT
387 ---help---
388 This lets you choose what x86 vendor support code your kernel
389 will include.
390
391config CPU_SUP_INTEL
392 default y
393 bool "Support Intel processors" if PROCESSOR_SELECT
394 ---help---
395 This enables detection, tunings and quirks for Intel processors
396
397 You need this enabled if you want your kernel to run on an
398 Intel CPU. Disabling this option on other types of CPUs
399 makes the kernel a tiny bit smaller. Disabling it on an Intel
400 CPU might render the kernel unbootable.
401
402 If unsure, say N.
403
404config CPU_SUP_CYRIX_32
405 default y
406 bool "Support Cyrix processors" if PROCESSOR_SELECT
407 depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
408 ---help---
409 This enables detection, tunings and quirks for Cyrix processors
410
411 You need this enabled if you want your kernel to run on a
412 Cyrix CPU. Disabling this option on other types of CPUs
413 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
414 CPU might render the kernel unbootable.
415
416 If unsure, say N.
417
418config CPU_SUP_AMD
419 default y
420 bool "Support AMD processors" if PROCESSOR_SELECT
421 ---help---
422 This enables detection, tunings and quirks for AMD processors
423
424 You need this enabled if you want your kernel to run on an
425 AMD CPU. Disabling this option on other types of CPUs
426 makes the kernel a tiny bit smaller. Disabling it on an AMD
427 CPU might render the kernel unbootable.
428
429 If unsure, say N.
430
431config CPU_SUP_CENTAUR
432 default y
433 bool "Support Centaur processors" if PROCESSOR_SELECT
434 ---help---
435 This enables detection, tunings and quirks for Centaur processors
436
437 You need this enabled if you want your kernel to run on a
438 Centaur CPU. Disabling this option on other types of CPUs
439 makes the kernel a tiny bit smaller. Disabling it on a Centaur
440 CPU might render the kernel unbootable.
441
442 If unsure, say N.
443
444config CPU_SUP_TRANSMETA_32
445 default y
446 bool "Support Transmeta processors" if PROCESSOR_SELECT
447 depends on !64BIT
448 ---help---
449 This enables detection, tunings and quirks for Transmeta processors
450
451 You need this enabled if you want your kernel to run on a
452 Transmeta CPU. Disabling this option on other types of CPUs
453 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
454 CPU might render the kernel unbootable.
455
456 If unsure, say N.
457
458config CPU_SUP_UMC_32
459 default y
460 bool "Support UMC processors" if PROCESSOR_SELECT
461 depends on M486 || (EXPERT && !64BIT)
462 ---help---
463 This enables detection, tunings and quirks for UMC processors
464
465 You need this enabled if you want your kernel to run on a
466 UMC CPU. Disabling this option on other types of CPUs
467 makes the kernel a tiny bit smaller. Disabling it on a UMC
468 CPU might render the kernel unbootable.
469
470 If unsure, say N.