1/*
  2 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
  3 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
  4 *
  5 * This program is free software and is provided to you under the terms of the
  6 * GNU General Public License version 2 as published by the Free Software
  7 * Foundation, and any use by you of this program is subject to the terms
  8 * of such GNU licence.
  9 *
 10 * ARM Mali DP500/DP550/DP650 KMS/DRM driver
 11 */
 12
 13#include <linux/module.h>
 14#include <linux/clk.h>
 15#include <linux/component.h>
 16#include <linux/of_device.h>
 17#include <linux/of_graph.h>
 18#include <linux/of_reserved_mem.h>
 19
 20#include <drm/drmP.h>
 21#include <drm/drm_atomic.h>
 22#include <drm/drm_atomic_helper.h>
 23#include <drm/drm_crtc.h>
 24#include <drm/drm_crtc_helper.h>
 25#include <drm/drm_fb_helper.h>
 26#include <drm/drm_fb_cma_helper.h>
 27#include <drm/drm_gem_cma_helper.h>
 28#include <drm/drm_of.h>
 29
 30#include "malidp_drv.h"
 31#include "malidp_regs.h"
 32#include "malidp_hw.h"
 33
 34#define MALIDP_CONF_VALID_TIMEOUT	250
 35
 36/*
 37 * set the "config valid" bit and wait until the hardware acts on it
 38 */
 39static int malidp_set_and_wait_config_valid(struct drm_device *drm)
 40{
 41	struct malidp_drm *malidp = drm->dev_private;
 42	struct malidp_hw_device *hwdev = malidp->dev;
 43	int ret;
 44
 45	atomic_set(&malidp->config_valid, 0);
 46	hwdev->set_config_valid(hwdev);
 47	/* don't wait for config_valid flag if we are in config mode */
 48	if (hwdev->in_config_mode(hwdev))
 49		return 0;
 50
 51	ret = wait_event_interruptible_timeout(malidp->wq,
 52			atomic_read(&malidp->config_valid) == 1,
 53			msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));
 54
 55	return (ret > 0) ? 0 : -ETIMEDOUT;
 56}
 57
 58static void malidp_output_poll_changed(struct drm_device *drm)
 59{
 60	struct malidp_drm *malidp = drm->dev_private;
 61
 62	drm_fbdev_cma_hotplug_event(malidp->fbdev);
 63}
 64
 65static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
 66{
 67	struct drm_pending_vblank_event *event;
 68	struct drm_device *drm = state->dev;
 69	struct malidp_drm *malidp = drm->dev_private;
 70	int ret = malidp_set_and_wait_config_valid(drm);
 71
 72	if (ret)
 73		DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
 74
 75	event = malidp->crtc.state->event;
 76	if (event) {
 77		malidp->crtc.state->event = NULL;
 78
 79		spin_lock_irq(&drm->event_lock);
 80		if (drm_crtc_vblank_get(&malidp->crtc) == 0)
 81			drm_crtc_arm_vblank_event(&malidp->crtc, event);
 82		else
 83			drm_crtc_send_vblank_event(&malidp->crtc, event);
 84		spin_unlock_irq(&drm->event_lock);
 85	}
 86	drm_atomic_helper_commit_hw_done(state);
 87}
 88
 89static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
 90{
 91	struct drm_device *drm = state->dev;
 92
 93	drm_atomic_helper_commit_modeset_disables(drm, state);
 94	drm_atomic_helper_commit_modeset_enables(drm, state);
 95	drm_atomic_helper_commit_planes(drm, state, 0);
 96
 97	malidp_atomic_commit_hw_done(state);
 98
 99	drm_atomic_helper_wait_for_vblanks(drm, state);
100
101	drm_atomic_helper_cleanup_planes(drm, state);
102}
103
104static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
105	.atomic_commit_tail = malidp_atomic_commit_tail,
106};
107
108static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
109	.fb_create = drm_fb_cma_create,
110	.output_poll_changed = malidp_output_poll_changed,
111	.atomic_check = drm_atomic_helper_check,
112	.atomic_commit = drm_atomic_helper_commit,
113};
114
115static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
116{
117	struct malidp_drm *malidp = drm->dev_private;
118	struct malidp_hw_device *hwdev = malidp->dev;
119
120	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
121			     hwdev->map.de_irq_map.vsync_irq);
122	return 0;
123}
124
125static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
126{
127	struct malidp_drm *malidp = drm->dev_private;
128	struct malidp_hw_device *hwdev = malidp->dev;
129
130	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
131			      hwdev->map.de_irq_map.vsync_irq);
132}
133
134static int malidp_init(struct drm_device *drm)
135{
136	int ret;
137	struct malidp_drm *malidp = drm->dev_private;
138	struct malidp_hw_device *hwdev = malidp->dev;
139
140	drm_mode_config_init(drm);
141
142	drm->mode_config.min_width = hwdev->min_line_size;
143	drm->mode_config.min_height = hwdev->min_line_size;
144	drm->mode_config.max_width = hwdev->max_line_size;
145	drm->mode_config.max_height = hwdev->max_line_size;
146	drm->mode_config.funcs = &malidp_mode_config_funcs;
147	drm->mode_config.helper_private = &malidp_mode_config_helpers;
148
149	ret = malidp_crtc_init(drm);
150	if (ret) {
151		drm_mode_config_cleanup(drm);
152		return ret;
153	}
154
155	return 0;
156}
157
158static void malidp_fini(struct drm_device *drm)
159{
160	malidp_de_planes_destroy(drm);
161	drm_mode_config_cleanup(drm);
162}
163
164static int malidp_irq_init(struct platform_device *pdev)
165{
166	int irq_de, irq_se, ret = 0;
167	struct drm_device *drm = dev_get_drvdata(&pdev->dev);
168
169	/* fetch the interrupts from DT */
170	irq_de = platform_get_irq_byname(pdev, "DE");
171	if (irq_de < 0) {
172		DRM_ERROR("no 'DE' IRQ specified!\n");
173		return irq_de;
174	}
175	irq_se = platform_get_irq_byname(pdev, "SE");
176	if (irq_se < 0) {
177		DRM_ERROR("no 'SE' IRQ specified!\n");
178		return irq_se;
179	}
180
181	ret = malidp_de_irq_init(drm, irq_de);
182	if (ret)
183		return ret;
184
185	ret = malidp_se_irq_init(drm, irq_se);
186	if (ret) {
187		malidp_de_irq_fini(drm);
188		return ret;
189	}
190
191	return 0;
192}
193
194static void malidp_lastclose(struct drm_device *drm)
195{
196	struct malidp_drm *malidp = drm->dev_private;
197
198	drm_fbdev_cma_restore_mode(malidp->fbdev);
199}
200
201static const struct file_operations fops = {
202	.owner = THIS_MODULE,
203	.open = drm_open,
204	.release = drm_release,
205	.unlocked_ioctl = drm_ioctl,
206	.compat_ioctl = drm_compat_ioctl,
207	.poll = drm_poll,
208	.read = drm_read,
209	.llseek = noop_llseek,
210	.mmap = drm_gem_cma_mmap,
211};
212
213static struct drm_driver malidp_driver = {
214	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
215			   DRIVER_PRIME,
216	.lastclose = malidp_lastclose,
217	.get_vblank_counter = drm_vblank_no_hw_counter,
218	.enable_vblank = malidp_enable_vblank,
219	.disable_vblank = malidp_disable_vblank,
220	.gem_free_object_unlocked = drm_gem_cma_free_object,
221	.gem_vm_ops = &drm_gem_cma_vm_ops,
222	.dumb_create = drm_gem_cma_dumb_create,
223	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
224	.dumb_destroy = drm_gem_dumb_destroy,
225	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
226	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
227	.gem_prime_export = drm_gem_prime_export,
228	.gem_prime_import = drm_gem_prime_import,
229	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
230	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
231	.gem_prime_vmap = drm_gem_cma_prime_vmap,
232	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
233	.gem_prime_mmap = drm_gem_cma_prime_mmap,
234	.fops = &fops,
235	.name = "mali-dp",
236	.desc = "ARM Mali Display Processor driver",
237	.date = "20160106",
238	.major = 1,
239	.minor = 0,
240};
241
242static const struct of_device_id  malidp_drm_of_match[] = {
243	{
244		.compatible = "arm,mali-dp500",
245		.data = &malidp_device[MALIDP_500]
246	},
247	{
248		.compatible = "arm,mali-dp550",
249		.data = &malidp_device[MALIDP_550]
250	},
251	{
252		.compatible = "arm,mali-dp650",
253		.data = &malidp_device[MALIDP_650]
254	},
255	{},
256};
257MODULE_DEVICE_TABLE(of, malidp_drm_of_match);
258
259#define MAX_OUTPUT_CHANNELS	3
260
261static int malidp_bind(struct device *dev)
262{
263	struct resource *res;
264	struct drm_device *drm;
265	struct device_node *ep;
266	struct malidp_drm *malidp;
267	struct malidp_hw_device *hwdev;
268	struct platform_device *pdev = to_platform_device(dev);
269	/* number of lines for the R, G and B output */
270	u8 output_width[MAX_OUTPUT_CHANNELS];
271	int ret = 0, i;
272	u32 version, out_depth = 0;
273
274	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
275	if (!malidp)
276		return -ENOMEM;
277
278	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
279	if (!hwdev)
280		return -ENOMEM;
281
282	/*
283	 * copy the associated data from malidp_drm_of_match to avoid
284	 * having to keep a reference to the OF node after binding
285	 */
286	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
287	malidp->dev = hwdev;
288
289	INIT_LIST_HEAD(&malidp->event_list);
290
291	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
292	hwdev->regs = devm_ioremap_resource(dev, res);
293	if (IS_ERR(hwdev->regs))
294		return PTR_ERR(hwdev->regs);
295
296	hwdev->pclk = devm_clk_get(dev, "pclk");
297	if (IS_ERR(hwdev->pclk))
298		return PTR_ERR(hwdev->pclk);
299
300	hwdev->aclk = devm_clk_get(dev, "aclk");
301	if (IS_ERR(hwdev->aclk))
302		return PTR_ERR(hwdev->aclk);
303
304	hwdev->mclk = devm_clk_get(dev, "mclk");
305	if (IS_ERR(hwdev->mclk))
306		return PTR_ERR(hwdev->mclk);
307
308	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
309	if (IS_ERR(hwdev->pxlclk))
310		return PTR_ERR(hwdev->pxlclk);
311
312	/* Get the optional framebuffer memory resource */
313	ret = of_reserved_mem_device_init(dev);
314	if (ret && ret != -ENODEV)
315		return ret;
316
317	drm = drm_dev_alloc(&malidp_driver, dev);
318	if (IS_ERR(drm)) {
319		ret = PTR_ERR(drm);
320		goto alloc_fail;
321	}
322
323	/* Enable APB clock in order to get access to the registers */
324	clk_prepare_enable(hwdev->pclk);
325	/*
326	 * Enable AXI clock and main clock so that prefetch can start once
327	 * the registers are set
328	 */
329	clk_prepare_enable(hwdev->aclk);
330	clk_prepare_enable(hwdev->mclk);
331
332	ret = hwdev->query_hw(hwdev);
333	if (ret) {
334		DRM_ERROR("Invalid HW configuration\n");
335		goto query_hw_fail;
336	}
337
338	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
339	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
340		 (version >> 12) & 0xf, (version >> 8) & 0xf);
341
342	/* set the number of lines used for output of RGB data */
343	ret = of_property_read_u8_array(dev->of_node,
344					"arm,malidp-output-port-lines",
345					output_width, MAX_OUTPUT_CHANNELS);
346	if (ret)
347		goto query_hw_fail;
348
349	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
350		out_depth = (out_depth << 8) | (output_width[i] & 0xf);
351	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
352
353	drm->dev_private = malidp;
354	dev_set_drvdata(dev, drm);
355	atomic_set(&malidp->config_valid, 0);
356	init_waitqueue_head(&malidp->wq);
357
358	ret = malidp_init(drm);
359	if (ret < 0)
360		goto init_fail;
361
362	/* Set the CRTC's port so that the encoder component can find it */
363	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
364	if (!ep) {
365		ret = -EINVAL;
366		goto port_fail;
367	}
368	malidp->crtc.port = of_get_next_parent(ep);
369
370	ret = component_bind_all(dev, drm);
371	if (ret) {
372		DRM_ERROR("Failed to bind all components\n");
373		goto bind_fail;
374	}
375
376	ret = malidp_irq_init(pdev);
377	if (ret < 0)
378		goto irq_init_fail;
379
380	drm->irq_enabled = true;
381
382	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
383	if (ret < 0) {
384		DRM_ERROR("failed to initialise vblank\n");
385		goto vblank_fail;
386	}
387
388	drm_mode_config_reset(drm);
389
390	malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
391					   drm->mode_config.num_connector);
392
393	if (IS_ERR(malidp->fbdev)) {
394		ret = PTR_ERR(malidp->fbdev);
395		malidp->fbdev = NULL;
396		goto fbdev_fail;
397	}
398
399	drm_kms_helper_poll_init(drm);
400
401	ret = drm_dev_register(drm, 0);
402	if (ret)
403		goto register_fail;
404
405	return 0;
406
407register_fail:
408	if (malidp->fbdev) {
409		drm_fbdev_cma_fini(malidp->fbdev);
410		malidp->fbdev = NULL;
411	}
412fbdev_fail:
413	drm_vblank_cleanup(drm);
414vblank_fail:
415	malidp_se_irq_fini(drm);
416	malidp_de_irq_fini(drm);
417	drm->irq_enabled = false;
418irq_init_fail:
419	component_unbind_all(dev, drm);
420bind_fail:
421	of_node_put(malidp->crtc.port);
422	malidp->crtc.port = NULL;
423port_fail:
424	malidp_fini(drm);
425init_fail:
426	drm->dev_private = NULL;
427	dev_set_drvdata(dev, NULL);
428query_hw_fail:
429	clk_disable_unprepare(hwdev->mclk);
430	clk_disable_unprepare(hwdev->aclk);
431	clk_disable_unprepare(hwdev->pclk);
432	drm_dev_unref(drm);
433alloc_fail:
434	of_reserved_mem_device_release(dev);
435
436	return ret;
437}
438
439static void malidp_unbind(struct device *dev)
440{
441	struct drm_device *drm = dev_get_drvdata(dev);
442	struct malidp_drm *malidp = drm->dev_private;
443	struct malidp_hw_device *hwdev = malidp->dev;
444
445	drm_dev_unregister(drm);
446	if (malidp->fbdev) {
447		drm_fbdev_cma_fini(malidp->fbdev);
448		malidp->fbdev = NULL;
449	}
450	drm_kms_helper_poll_fini(drm);
451	malidp_se_irq_fini(drm);
452	malidp_de_irq_fini(drm);
453	drm_vblank_cleanup(drm);
454	component_unbind_all(dev, drm);
455	of_node_put(malidp->crtc.port);
456	malidp->crtc.port = NULL;
457	malidp_fini(drm);
458	drm->dev_private = NULL;
459	dev_set_drvdata(dev, NULL);
460	clk_disable_unprepare(hwdev->mclk);
461	clk_disable_unprepare(hwdev->aclk);
462	clk_disable_unprepare(hwdev->pclk);
463	drm_dev_unref(drm);
464	of_reserved_mem_device_release(dev);
465}
466
467static const struct component_master_ops malidp_master_ops = {
468	.bind = malidp_bind,
469	.unbind = malidp_unbind,
470};
471
472static int malidp_compare_dev(struct device *dev, void *data)
473{
474	struct device_node *np = data;
475
476	return dev->of_node == np;
477}
478
479static int malidp_platform_probe(struct platform_device *pdev)
480{
481	struct device_node *port, *ep;
482	struct component_match *match = NULL;
483
484	if (!pdev->dev.of_node)
485		return -ENODEV;
486
487	/* there is only one output port inside each device, find it */
488	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
489	if (!ep)
490		return -ENODEV;
491
492	if (!of_device_is_available(ep)) {
493		of_node_put(ep);
494		return -ENODEV;
495	}
496
497	/* add the remote encoder port as component */
498	port = of_graph_get_remote_port_parent(ep);
499	of_node_put(ep);
500	if (!port || !of_device_is_available(port)) {
501		of_node_put(port);
502		return -EAGAIN;
503	}
504
505	drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
506				   port);
507	of_node_put(port);
508	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
509					       match);
510}
511
512static int malidp_platform_remove(struct platform_device *pdev)
513{
514	component_master_del(&pdev->dev, &malidp_master_ops);
515	return 0;
516}
517
518static struct platform_driver malidp_platform_driver = {
519	.probe		= malidp_platform_probe,
520	.remove		= malidp_platform_remove,
521	.driver	= {
522		.name = "mali-dp",
523		.of_match_table	= malidp_drm_of_match,
524	},
525};
526
527module_platform_driver(malidp_platform_driver);
528
529MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
530MODULE_DESCRIPTION("ARM Mali DP DRM driver");
531MODULE_LICENSE("GPL v2");