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1/*
2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on a lot of other RTC drivers.
11 *
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20#include <linux/i2c.h>
21#include <linux/bcd.h>
22#include <linux/rtc.h>
23#include <linux/delay.h>
24
25#define DRV_VERSION "1.0.8"
26
27/* offsets into CCR area */
28
29#define CCR_SEC 0
30#define CCR_MIN 1
31#define CCR_HOUR 2
32#define CCR_MDAY 3
33#define CCR_MONTH 4
34#define CCR_YEAR 5
35#define CCR_WDAY 6
36#define CCR_Y2K 7
37
38#define X1205_REG_SR 0x3F /* status register */
39#define X1205_REG_Y2K 0x37
40#define X1205_REG_DW 0x36
41#define X1205_REG_YR 0x35
42#define X1205_REG_MO 0x34
43#define X1205_REG_DT 0x33
44#define X1205_REG_HR 0x32
45#define X1205_REG_MN 0x31
46#define X1205_REG_SC 0x30
47#define X1205_REG_DTR 0x13
48#define X1205_REG_ATR 0x12
49#define X1205_REG_INT 0x11
50#define X1205_REG_0 0x10
51#define X1205_REG_Y2K1 0x0F
52#define X1205_REG_DWA1 0x0E
53#define X1205_REG_YRA1 0x0D
54#define X1205_REG_MOA1 0x0C
55#define X1205_REG_DTA1 0x0B
56#define X1205_REG_HRA1 0x0A
57#define X1205_REG_MNA1 0x09
58#define X1205_REG_SCA1 0x08
59#define X1205_REG_Y2K0 0x07
60#define X1205_REG_DWA0 0x06
61#define X1205_REG_YRA0 0x05
62#define X1205_REG_MOA0 0x04
63#define X1205_REG_DTA0 0x03
64#define X1205_REG_HRA0 0x02
65#define X1205_REG_MNA0 0x01
66#define X1205_REG_SCA0 0x00
67
68#define X1205_CCR_BASE 0x30 /* Base address of CCR */
69#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
70
71#define X1205_SR_RTCF 0x01 /* Clock failure */
72#define X1205_SR_WEL 0x02 /* Write Enable Latch */
73#define X1205_SR_RWEL 0x04 /* Register Write Enable */
74#define X1205_SR_AL0 0x20 /* Alarm 0 match */
75
76#define X1205_DTR_DTR0 0x01
77#define X1205_DTR_DTR1 0x02
78#define X1205_DTR_DTR2 0x04
79
80#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
81
82#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
83
84static struct i2c_driver x1205_driver;
85
86/*
87 * In the routines that deal directly with the x1205 hardware, we use
88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
89 * Epoch is initialized as 2000. Time is set to UTC.
90 */
91static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
92 unsigned char reg_base)
93{
94 unsigned char dt_addr[2] = { 0, reg_base };
95 unsigned char buf[8];
96 int i;
97
98 struct i2c_msg msgs[] = {
99 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
100 { client->addr, I2C_M_RD, 8, buf }, /* read date */
101 };
102
103 /* read date registers */
104 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
105 dev_err(&client->dev, "%s: read error\n", __func__);
106 return -EIO;
107 }
108
109 dev_dbg(&client->dev,
110 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
111 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
112 __func__,
113 buf[0], buf[1], buf[2], buf[3],
114 buf[4], buf[5], buf[6], buf[7]);
115
116 /* Mask out the enable bits if these are alarm registers */
117 if (reg_base < X1205_CCR_BASE)
118 for (i = 0; i <= 4; i++)
119 buf[i] &= 0x7F;
120
121 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
122 tm->tm_min = bcd2bin(buf[CCR_MIN]);
123 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
124 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
125 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
126 tm->tm_year = bcd2bin(buf[CCR_YEAR])
127 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
128 tm->tm_wday = buf[CCR_WDAY];
129
130 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
131 "mday=%d, mon=%d, year=%d, wday=%d\n",
132 __func__,
133 tm->tm_sec, tm->tm_min, tm->tm_hour,
134 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
135
136 return 0;
137}
138
139static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
140{
141 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
142
143 struct i2c_msg msgs[] = {
144 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
145 { client->addr, I2C_M_RD, 1, sr }, /* read status */
146 };
147
148 /* read status register */
149 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
150 dev_err(&client->dev, "%s: read error\n", __func__);
151 return -EIO;
152 }
153
154 return 0;
155}
156
157static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
158 u8 reg_base, unsigned char alm_enable)
159{
160 int i, xfer;
161 unsigned char rdata[10] = { 0, reg_base };
162 unsigned char *buf = rdata + 2;
163
164 static const unsigned char wel[3] = { 0, X1205_REG_SR,
165 X1205_SR_WEL };
166
167 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
168 X1205_SR_WEL | X1205_SR_RWEL };
169
170 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
171
172 dev_dbg(&client->dev,
173 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
174 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
175 tm->tm_mon, tm->tm_year, tm->tm_wday);
176
177 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
178 buf[CCR_MIN] = bin2bcd(tm->tm_min);
179
180 /* set hour and 24hr bit */
181 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
182
183 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
184
185 /* month, 1 - 12 */
186 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
187
188 /* year, since the rtc epoch*/
189 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
190 buf[CCR_WDAY] = tm->tm_wday & 0x07;
191 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
192
193 /* If writing alarm registers, set compare bits on registers 0-4 */
194 if (reg_base < X1205_CCR_BASE)
195 for (i = 0; i <= 4; i++)
196 buf[i] |= 0x80;
197
198 /* this sequence is required to unlock the chip */
199 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
200 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
201 return -EIO;
202 }
203
204 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
205 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
206 return -EIO;
207 }
208
209 xfer = i2c_master_send(client, rdata, sizeof(rdata));
210 if (xfer != sizeof(rdata)) {
211 dev_err(&client->dev,
212 "%s: result=%d addr=%02x, data=%02x\n",
213 __func__,
214 xfer, rdata[1], rdata[2]);
215 return -EIO;
216 }
217
218 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
219 if (reg_base < X1205_CCR_BASE) {
220 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
221
222 msleep(10);
223
224 /* ...and set or clear the AL0E bit in the INT register */
225
226 /* Need to set RWEL again as the write has cleared it */
227 xfer = i2c_master_send(client, rwel, 3);
228 if (xfer != 3) {
229 dev_err(&client->dev,
230 "%s: aloe rwel - %d\n",
231 __func__,
232 xfer);
233 return -EIO;
234 }
235
236 if (alm_enable)
237 al0e[2] = X1205_INT_AL0E;
238
239 xfer = i2c_master_send(client, al0e, 3);
240 if (xfer != 3) {
241 dev_err(&client->dev,
242 "%s: al0e - %d\n",
243 __func__,
244 xfer);
245 return -EIO;
246 }
247
248 /* and wait 10msec again for this write to complete */
249 msleep(10);
250 }
251
252 /* disable further writes */
253 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
254 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
255 return -EIO;
256 }
257
258 return 0;
259}
260
261static int x1205_fix_osc(struct i2c_client *client)
262{
263 int err;
264 struct rtc_time tm;
265
266 memset(&tm, 0, sizeof(tm));
267
268 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
269 if (err < 0)
270 dev_err(&client->dev, "unable to restart the oscillator\n");
271
272 return err;
273}
274
275static int x1205_get_dtrim(struct i2c_client *client, int *trim)
276{
277 unsigned char dtr;
278 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
279
280 struct i2c_msg msgs[] = {
281 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
282 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
283 };
284
285 /* read dtr register */
286 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
287 dev_err(&client->dev, "%s: read error\n", __func__);
288 return -EIO;
289 }
290
291 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
292
293 *trim = 0;
294
295 if (dtr & X1205_DTR_DTR0)
296 *trim += 20;
297
298 if (dtr & X1205_DTR_DTR1)
299 *trim += 10;
300
301 if (dtr & X1205_DTR_DTR2)
302 *trim = -*trim;
303
304 return 0;
305}
306
307static int x1205_get_atrim(struct i2c_client *client, int *trim)
308{
309 s8 atr;
310 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
311
312 struct i2c_msg msgs[] = {
313 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
314 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
315 };
316
317 /* read atr register */
318 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
319 dev_err(&client->dev, "%s: read error\n", __func__);
320 return -EIO;
321 }
322
323 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
324
325 /* atr is a two's complement value on 6 bits,
326 * perform sign extension. The formula is
327 * Catr = (atr * 0.25pF) + 11.00pF.
328 */
329 if (atr & 0x20)
330 atr |= 0xC0;
331
332 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
333
334 *trim = (atr * 250) + 11000;
335
336 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
337
338 return 0;
339}
340
341struct x1205_limit
342{
343 unsigned char reg, mask, min, max;
344};
345
346static int x1205_validate_client(struct i2c_client *client)
347{
348 int i, xfer;
349
350 /* Probe array. We will read the register at the specified
351 * address and check if the given bits are zero.
352 */
353 static const unsigned char probe_zero_pattern[] = {
354 /* register, mask */
355 X1205_REG_SR, 0x18,
356 X1205_REG_DTR, 0xF8,
357 X1205_REG_ATR, 0xC0,
358 X1205_REG_INT, 0x18,
359 X1205_REG_0, 0xFF,
360 };
361
362 static const struct x1205_limit probe_limits_pattern[] = {
363 /* register, mask, min, max */
364 { X1205_REG_Y2K, 0xFF, 19, 20 },
365 { X1205_REG_DW, 0xFF, 0, 6 },
366 { X1205_REG_YR, 0xFF, 0, 99 },
367 { X1205_REG_MO, 0xFF, 0, 12 },
368 { X1205_REG_DT, 0xFF, 0, 31 },
369 { X1205_REG_HR, 0x7F, 0, 23 },
370 { X1205_REG_MN, 0xFF, 0, 59 },
371 { X1205_REG_SC, 0xFF, 0, 59 },
372 { X1205_REG_Y2K1, 0xFF, 19, 20 },
373 { X1205_REG_Y2K0, 0xFF, 19, 20 },
374 };
375
376 /* check that registers have bits a 0 where expected */
377 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
378 unsigned char buf;
379
380 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
381
382 struct i2c_msg msgs[2] = {
383 { client->addr, 0, 2, addr },
384 { client->addr, I2C_M_RD, 1, &buf },
385 };
386
387 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
388 dev_err(&client->dev,
389 "%s: could not read register %x\n",
390 __func__, probe_zero_pattern[i]);
391
392 return -EIO;
393 }
394
395 if ((buf & probe_zero_pattern[i+1]) != 0) {
396 dev_err(&client->dev,
397 "%s: register=%02x, zero pattern=%d, value=%x\n",
398 __func__, probe_zero_pattern[i], i, buf);
399
400 return -ENODEV;
401 }
402 }
403
404 /* check limits (only registers with bcd values) */
405 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
406 unsigned char reg, value;
407
408 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
409
410 struct i2c_msg msgs[2] = {
411 { client->addr, 0, 2, addr },
412 { client->addr, I2C_M_RD, 1, ® },
413 };
414
415 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
416 dev_err(&client->dev,
417 "%s: could not read register %x\n",
418 __func__, probe_limits_pattern[i].reg);
419
420 return -EIO;
421 }
422
423 value = bcd2bin(reg & probe_limits_pattern[i].mask);
424
425 if (value > probe_limits_pattern[i].max ||
426 value < probe_limits_pattern[i].min) {
427 dev_dbg(&client->dev,
428 "%s: register=%x, lim pattern=%d, value=%d\n",
429 __func__, probe_limits_pattern[i].reg,
430 i, value);
431
432 return -ENODEV;
433 }
434 }
435
436 return 0;
437}
438
439static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
440{
441 int err;
442 unsigned char intreg, status;
443 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
444 struct i2c_client *client = to_i2c_client(dev);
445 struct i2c_msg msgs[] = {
446 { client->addr, 0, 2, int_addr }, /* setup read ptr */
447 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
448 };
449
450 /* read interrupt register and status register */
451 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
452 dev_err(&client->dev, "%s: read error\n", __func__);
453 return -EIO;
454 }
455 err = x1205_get_status(client, &status);
456 if (err == 0) {
457 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
458 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
459 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
460 }
461 return err;
462}
463
464static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
465{
466 return x1205_set_datetime(to_i2c_client(dev),
467 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
468}
469
470static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
471{
472 return x1205_get_datetime(to_i2c_client(dev),
473 tm, X1205_CCR_BASE);
474}
475
476static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
477{
478 return x1205_set_datetime(to_i2c_client(dev),
479 tm, X1205_CCR_BASE, 0);
480}
481
482static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
483{
484 int err, dtrim, atrim;
485
486 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
487 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
488
489 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
490 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
491 atrim / 1000, atrim % 1000);
492 return 0;
493}
494
495static const struct rtc_class_ops x1205_rtc_ops = {
496 .proc = x1205_rtc_proc,
497 .read_time = x1205_rtc_read_time,
498 .set_time = x1205_rtc_set_time,
499 .read_alarm = x1205_rtc_read_alarm,
500 .set_alarm = x1205_rtc_set_alarm,
501};
502
503static ssize_t x1205_sysfs_show_atrim(struct device *dev,
504 struct device_attribute *attr, char *buf)
505{
506 int err, atrim;
507
508 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
509 if (err)
510 return err;
511
512 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
513}
514static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
515
516static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
517 struct device_attribute *attr, char *buf)
518{
519 int err, dtrim;
520
521 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
522 if (err)
523 return err;
524
525 return sprintf(buf, "%d ppm\n", dtrim);
526}
527static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
528
529static int x1205_sysfs_register(struct device *dev)
530{
531 int err;
532
533 err = device_create_file(dev, &dev_attr_atrim);
534 if (err)
535 return err;
536
537 err = device_create_file(dev, &dev_attr_dtrim);
538 if (err)
539 device_remove_file(dev, &dev_attr_atrim);
540
541 return err;
542}
543
544static void x1205_sysfs_unregister(struct device *dev)
545{
546 device_remove_file(dev, &dev_attr_atrim);
547 device_remove_file(dev, &dev_attr_dtrim);
548}
549
550
551static int x1205_probe(struct i2c_client *client,
552 const struct i2c_device_id *id)
553{
554 int err = 0;
555 unsigned char sr;
556 struct rtc_device *rtc;
557
558 dev_dbg(&client->dev, "%s\n", __func__);
559
560 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
561 return -ENODEV;
562
563 if (x1205_validate_client(client) < 0)
564 return -ENODEV;
565
566 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
567
568 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
569 &x1205_rtc_ops, THIS_MODULE);
570
571 if (IS_ERR(rtc))
572 return PTR_ERR(rtc);
573
574 i2c_set_clientdata(client, rtc);
575
576 /* Check for power failures and eventually enable the osc */
577 if ((err = x1205_get_status(client, &sr)) == 0) {
578 if (sr & X1205_SR_RTCF) {
579 dev_err(&client->dev,
580 "power failure detected, "
581 "please set the clock\n");
582 udelay(50);
583 x1205_fix_osc(client);
584 }
585 }
586 else
587 dev_err(&client->dev, "couldn't read status\n");
588
589 err = x1205_sysfs_register(&client->dev);
590 if (err)
591 goto exit_devreg;
592
593 return 0;
594
595exit_devreg:
596 rtc_device_unregister(rtc);
597
598 return err;
599}
600
601static int x1205_remove(struct i2c_client *client)
602{
603 struct rtc_device *rtc = i2c_get_clientdata(client);
604
605 rtc_device_unregister(rtc);
606 x1205_sysfs_unregister(&client->dev);
607 return 0;
608}
609
610static const struct i2c_device_id x1205_id[] = {
611 { "x1205", 0 },
612 { }
613};
614MODULE_DEVICE_TABLE(i2c, x1205_id);
615
616static struct i2c_driver x1205_driver = {
617 .driver = {
618 .name = "rtc-x1205",
619 },
620 .probe = x1205_probe,
621 .remove = x1205_remove,
622 .id_table = x1205_id,
623};
624
625static int __init x1205_init(void)
626{
627 return i2c_add_driver(&x1205_driver);
628}
629
630static void __exit x1205_exit(void)
631{
632 i2c_del_driver(&x1205_driver);
633}
634
635MODULE_AUTHOR(
636 "Karen Spearel <kas111 at gmail dot com>, "
637 "Alessandro Zummo <a.zummo@towertech.it>");
638MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
639MODULE_LICENSE("GPL");
640MODULE_VERSION(DRV_VERSION);
641
642module_init(x1205_init);
643module_exit(x1205_exit);
1/*
2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on a lot of other RTC drivers.
11 *
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20#include <linux/i2c.h>
21#include <linux/bcd.h>
22#include <linux/rtc.h>
23#include <linux/delay.h>
24#include <linux/module.h>
25
26#define DRV_VERSION "1.0.8"
27
28/* offsets into CCR area */
29
30#define CCR_SEC 0
31#define CCR_MIN 1
32#define CCR_HOUR 2
33#define CCR_MDAY 3
34#define CCR_MONTH 4
35#define CCR_YEAR 5
36#define CCR_WDAY 6
37#define CCR_Y2K 7
38
39#define X1205_REG_SR 0x3F /* status register */
40#define X1205_REG_Y2K 0x37
41#define X1205_REG_DW 0x36
42#define X1205_REG_YR 0x35
43#define X1205_REG_MO 0x34
44#define X1205_REG_DT 0x33
45#define X1205_REG_HR 0x32
46#define X1205_REG_MN 0x31
47#define X1205_REG_SC 0x30
48#define X1205_REG_DTR 0x13
49#define X1205_REG_ATR 0x12
50#define X1205_REG_INT 0x11
51#define X1205_REG_0 0x10
52#define X1205_REG_Y2K1 0x0F
53#define X1205_REG_DWA1 0x0E
54#define X1205_REG_YRA1 0x0D
55#define X1205_REG_MOA1 0x0C
56#define X1205_REG_DTA1 0x0B
57#define X1205_REG_HRA1 0x0A
58#define X1205_REG_MNA1 0x09
59#define X1205_REG_SCA1 0x08
60#define X1205_REG_Y2K0 0x07
61#define X1205_REG_DWA0 0x06
62#define X1205_REG_YRA0 0x05
63#define X1205_REG_MOA0 0x04
64#define X1205_REG_DTA0 0x03
65#define X1205_REG_HRA0 0x02
66#define X1205_REG_MNA0 0x01
67#define X1205_REG_SCA0 0x00
68
69#define X1205_CCR_BASE 0x30 /* Base address of CCR */
70#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
71
72#define X1205_SR_RTCF 0x01 /* Clock failure */
73#define X1205_SR_WEL 0x02 /* Write Enable Latch */
74#define X1205_SR_RWEL 0x04 /* Register Write Enable */
75#define X1205_SR_AL0 0x20 /* Alarm 0 match */
76
77#define X1205_DTR_DTR0 0x01
78#define X1205_DTR_DTR1 0x02
79#define X1205_DTR_DTR2 0x04
80
81#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
82
83#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
84
85static struct i2c_driver x1205_driver;
86
87/*
88 * In the routines that deal directly with the x1205 hardware, we use
89 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
90 * Epoch is initialized as 2000. Time is set to UTC.
91 */
92static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
93 unsigned char reg_base)
94{
95 unsigned char dt_addr[2] = { 0, reg_base };
96 unsigned char buf[8];
97 int i;
98
99 struct i2c_msg msgs[] = {
100 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
101 { client->addr, I2C_M_RD, 8, buf }, /* read date */
102 };
103
104 /* read date registers */
105 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
106 dev_err(&client->dev, "%s: read error\n", __func__);
107 return -EIO;
108 }
109
110 dev_dbg(&client->dev,
111 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
112 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
113 __func__,
114 buf[0], buf[1], buf[2], buf[3],
115 buf[4], buf[5], buf[6], buf[7]);
116
117 /* Mask out the enable bits if these are alarm registers */
118 if (reg_base < X1205_CCR_BASE)
119 for (i = 0; i <= 4; i++)
120 buf[i] &= 0x7F;
121
122 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
123 tm->tm_min = bcd2bin(buf[CCR_MIN]);
124 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
125 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
126 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
127 tm->tm_year = bcd2bin(buf[CCR_YEAR])
128 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
129 tm->tm_wday = buf[CCR_WDAY];
130
131 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
132 "mday=%d, mon=%d, year=%d, wday=%d\n",
133 __func__,
134 tm->tm_sec, tm->tm_min, tm->tm_hour,
135 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
136
137 return 0;
138}
139
140static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
141{
142 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
143
144 struct i2c_msg msgs[] = {
145 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
146 { client->addr, I2C_M_RD, 1, sr }, /* read status */
147 };
148
149 /* read status register */
150 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
151 dev_err(&client->dev, "%s: read error\n", __func__);
152 return -EIO;
153 }
154
155 return 0;
156}
157
158static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
159 u8 reg_base, unsigned char alm_enable)
160{
161 int i, xfer;
162 unsigned char rdata[10] = { 0, reg_base };
163 unsigned char *buf = rdata + 2;
164
165 static const unsigned char wel[3] = { 0, X1205_REG_SR,
166 X1205_SR_WEL };
167
168 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
169 X1205_SR_WEL | X1205_SR_RWEL };
170
171 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
172
173 dev_dbg(&client->dev,
174 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
175 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
176 tm->tm_mon, tm->tm_year, tm->tm_wday);
177
178 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
179 buf[CCR_MIN] = bin2bcd(tm->tm_min);
180
181 /* set hour and 24hr bit */
182 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
183
184 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
185
186 /* month, 1 - 12 */
187 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
188
189 /* year, since the rtc epoch*/
190 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
191 buf[CCR_WDAY] = tm->tm_wday & 0x07;
192 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
193
194 /* If writing alarm registers, set compare bits on registers 0-4 */
195 if (reg_base < X1205_CCR_BASE)
196 for (i = 0; i <= 4; i++)
197 buf[i] |= 0x80;
198
199 /* this sequence is required to unlock the chip */
200 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
201 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
202 return -EIO;
203 }
204
205 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
206 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
207 return -EIO;
208 }
209
210 xfer = i2c_master_send(client, rdata, sizeof(rdata));
211 if (xfer != sizeof(rdata)) {
212 dev_err(&client->dev,
213 "%s: result=%d addr=%02x, data=%02x\n",
214 __func__,
215 xfer, rdata[1], rdata[2]);
216 return -EIO;
217 }
218
219 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
220 if (reg_base < X1205_CCR_BASE) {
221 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
222
223 msleep(10);
224
225 /* ...and set or clear the AL0E bit in the INT register */
226
227 /* Need to set RWEL again as the write has cleared it */
228 xfer = i2c_master_send(client, rwel, 3);
229 if (xfer != 3) {
230 dev_err(&client->dev,
231 "%s: aloe rwel - %d\n",
232 __func__,
233 xfer);
234 return -EIO;
235 }
236
237 if (alm_enable)
238 al0e[2] = X1205_INT_AL0E;
239
240 xfer = i2c_master_send(client, al0e, 3);
241 if (xfer != 3) {
242 dev_err(&client->dev,
243 "%s: al0e - %d\n",
244 __func__,
245 xfer);
246 return -EIO;
247 }
248
249 /* and wait 10msec again for this write to complete */
250 msleep(10);
251 }
252
253 /* disable further writes */
254 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
255 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
256 return -EIO;
257 }
258
259 return 0;
260}
261
262static int x1205_fix_osc(struct i2c_client *client)
263{
264 int err;
265 struct rtc_time tm;
266
267 memset(&tm, 0, sizeof(tm));
268
269 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
270 if (err < 0)
271 dev_err(&client->dev, "unable to restart the oscillator\n");
272
273 return err;
274}
275
276static int x1205_get_dtrim(struct i2c_client *client, int *trim)
277{
278 unsigned char dtr;
279 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
280
281 struct i2c_msg msgs[] = {
282 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
283 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
284 };
285
286 /* read dtr register */
287 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
288 dev_err(&client->dev, "%s: read error\n", __func__);
289 return -EIO;
290 }
291
292 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
293
294 *trim = 0;
295
296 if (dtr & X1205_DTR_DTR0)
297 *trim += 20;
298
299 if (dtr & X1205_DTR_DTR1)
300 *trim += 10;
301
302 if (dtr & X1205_DTR_DTR2)
303 *trim = -*trim;
304
305 return 0;
306}
307
308static int x1205_get_atrim(struct i2c_client *client, int *trim)
309{
310 s8 atr;
311 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
312
313 struct i2c_msg msgs[] = {
314 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
315 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
316 };
317
318 /* read atr register */
319 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
320 dev_err(&client->dev, "%s: read error\n", __func__);
321 return -EIO;
322 }
323
324 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
325
326 /* atr is a two's complement value on 6 bits,
327 * perform sign extension. The formula is
328 * Catr = (atr * 0.25pF) + 11.00pF.
329 */
330 if (atr & 0x20)
331 atr |= 0xC0;
332
333 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
334
335 *trim = (atr * 250) + 11000;
336
337 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
338
339 return 0;
340}
341
342struct x1205_limit
343{
344 unsigned char reg, mask, min, max;
345};
346
347static int x1205_validate_client(struct i2c_client *client)
348{
349 int i, xfer;
350
351 /* Probe array. We will read the register at the specified
352 * address and check if the given bits are zero.
353 */
354 static const unsigned char probe_zero_pattern[] = {
355 /* register, mask */
356 X1205_REG_SR, 0x18,
357 X1205_REG_DTR, 0xF8,
358 X1205_REG_ATR, 0xC0,
359 X1205_REG_INT, 0x18,
360 X1205_REG_0, 0xFF,
361 };
362
363 static const struct x1205_limit probe_limits_pattern[] = {
364 /* register, mask, min, max */
365 { X1205_REG_Y2K, 0xFF, 19, 20 },
366 { X1205_REG_DW, 0xFF, 0, 6 },
367 { X1205_REG_YR, 0xFF, 0, 99 },
368 { X1205_REG_MO, 0xFF, 0, 12 },
369 { X1205_REG_DT, 0xFF, 0, 31 },
370 { X1205_REG_HR, 0x7F, 0, 23 },
371 { X1205_REG_MN, 0xFF, 0, 59 },
372 { X1205_REG_SC, 0xFF, 0, 59 },
373 { X1205_REG_Y2K1, 0xFF, 19, 20 },
374 { X1205_REG_Y2K0, 0xFF, 19, 20 },
375 };
376
377 /* check that registers have bits a 0 where expected */
378 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
379 unsigned char buf;
380
381 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
382
383 struct i2c_msg msgs[2] = {
384 { client->addr, 0, 2, addr },
385 { client->addr, I2C_M_RD, 1, &buf },
386 };
387
388 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
389 dev_err(&client->dev,
390 "%s: could not read register %x\n",
391 __func__, probe_zero_pattern[i]);
392
393 return -EIO;
394 }
395
396 if ((buf & probe_zero_pattern[i+1]) != 0) {
397 dev_err(&client->dev,
398 "%s: register=%02x, zero pattern=%d, value=%x\n",
399 __func__, probe_zero_pattern[i], i, buf);
400
401 return -ENODEV;
402 }
403 }
404
405 /* check limits (only registers with bcd values) */
406 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
407 unsigned char reg, value;
408
409 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
410
411 struct i2c_msg msgs[2] = {
412 { client->addr, 0, 2, addr },
413 { client->addr, I2C_M_RD, 1, ® },
414 };
415
416 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
417 dev_err(&client->dev,
418 "%s: could not read register %x\n",
419 __func__, probe_limits_pattern[i].reg);
420
421 return -EIO;
422 }
423
424 value = bcd2bin(reg & probe_limits_pattern[i].mask);
425
426 if (value > probe_limits_pattern[i].max ||
427 value < probe_limits_pattern[i].min) {
428 dev_dbg(&client->dev,
429 "%s: register=%x, lim pattern=%d, value=%d\n",
430 __func__, probe_limits_pattern[i].reg,
431 i, value);
432
433 return -ENODEV;
434 }
435 }
436
437 return 0;
438}
439
440static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
441{
442 int err;
443 unsigned char intreg, status;
444 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
445 struct i2c_client *client = to_i2c_client(dev);
446 struct i2c_msg msgs[] = {
447 { client->addr, 0, 2, int_addr }, /* setup read ptr */
448 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
449 };
450
451 /* read interrupt register and status register */
452 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
453 dev_err(&client->dev, "%s: read error\n", __func__);
454 return -EIO;
455 }
456 err = x1205_get_status(client, &status);
457 if (err == 0) {
458 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
459 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
460 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
461 }
462 return err;
463}
464
465static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
466{
467 return x1205_set_datetime(to_i2c_client(dev),
468 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
469}
470
471static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
472{
473 return x1205_get_datetime(to_i2c_client(dev),
474 tm, X1205_CCR_BASE);
475}
476
477static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
478{
479 return x1205_set_datetime(to_i2c_client(dev),
480 tm, X1205_CCR_BASE, 0);
481}
482
483static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
484{
485 int err, dtrim, atrim;
486
487 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
488 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
489
490 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
491 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
492 atrim / 1000, atrim % 1000);
493 return 0;
494}
495
496static const struct rtc_class_ops x1205_rtc_ops = {
497 .proc = x1205_rtc_proc,
498 .read_time = x1205_rtc_read_time,
499 .set_time = x1205_rtc_set_time,
500 .read_alarm = x1205_rtc_read_alarm,
501 .set_alarm = x1205_rtc_set_alarm,
502};
503
504static ssize_t x1205_sysfs_show_atrim(struct device *dev,
505 struct device_attribute *attr, char *buf)
506{
507 int err, atrim;
508
509 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
510 if (err)
511 return err;
512
513 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
514}
515static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
516
517static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
518 struct device_attribute *attr, char *buf)
519{
520 int err, dtrim;
521
522 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
523 if (err)
524 return err;
525
526 return sprintf(buf, "%d ppm\n", dtrim);
527}
528static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
529
530static int x1205_sysfs_register(struct device *dev)
531{
532 int err;
533
534 err = device_create_file(dev, &dev_attr_atrim);
535 if (err)
536 return err;
537
538 err = device_create_file(dev, &dev_attr_dtrim);
539 if (err)
540 device_remove_file(dev, &dev_attr_atrim);
541
542 return err;
543}
544
545static void x1205_sysfs_unregister(struct device *dev)
546{
547 device_remove_file(dev, &dev_attr_atrim);
548 device_remove_file(dev, &dev_attr_dtrim);
549}
550
551
552static int x1205_probe(struct i2c_client *client,
553 const struct i2c_device_id *id)
554{
555 int err = 0;
556 unsigned char sr;
557 struct rtc_device *rtc;
558
559 dev_dbg(&client->dev, "%s\n", __func__);
560
561 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
562 return -ENODEV;
563
564 if (x1205_validate_client(client) < 0)
565 return -ENODEV;
566
567 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
568
569 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
570 &x1205_rtc_ops, THIS_MODULE);
571
572 if (IS_ERR(rtc))
573 return PTR_ERR(rtc);
574
575 i2c_set_clientdata(client, rtc);
576
577 /* Check for power failures and eventually enable the osc */
578 if ((err = x1205_get_status(client, &sr)) == 0) {
579 if (sr & X1205_SR_RTCF) {
580 dev_err(&client->dev,
581 "power failure detected, "
582 "please set the clock\n");
583 udelay(50);
584 x1205_fix_osc(client);
585 }
586 }
587 else
588 dev_err(&client->dev, "couldn't read status\n");
589
590 err = x1205_sysfs_register(&client->dev);
591 if (err)
592 goto exit_devreg;
593
594 return 0;
595
596exit_devreg:
597 rtc_device_unregister(rtc);
598
599 return err;
600}
601
602static int x1205_remove(struct i2c_client *client)
603{
604 struct rtc_device *rtc = i2c_get_clientdata(client);
605
606 rtc_device_unregister(rtc);
607 x1205_sysfs_unregister(&client->dev);
608 return 0;
609}
610
611static const struct i2c_device_id x1205_id[] = {
612 { "x1205", 0 },
613 { }
614};
615MODULE_DEVICE_TABLE(i2c, x1205_id);
616
617static struct i2c_driver x1205_driver = {
618 .driver = {
619 .name = "rtc-x1205",
620 },
621 .probe = x1205_probe,
622 .remove = x1205_remove,
623 .id_table = x1205_id,
624};
625
626module_i2c_driver(x1205_driver);
627
628MODULE_AUTHOR(
629 "Karen Spearel <kas111 at gmail dot com>, "
630 "Alessandro Zummo <a.zummo@towertech.it>");
631MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
632MODULE_LICENSE("GPL");
633MODULE_VERSION(DRV_VERSION);