1/*
  2 * An i2c driver for the Xicor/Intersil X1205 RTC
  3 * Copyright 2004 Karen Spearel
  4 * Copyright 2005 Alessandro Zummo
  5 *
  6 * please send all reports to:
  7 * 	Karen Spearel <kas111 at gmail dot com>
  8 *	Alessandro Zummo <a.zummo@towertech.it>
  9 *
 10 * based on a lot of other RTC drivers.
 11 *
 12 * Information and datasheet:
 13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 14 *
 15 * This program is free software; you can redistribute it and/or modify
 16 * it under the terms of the GNU General Public License version 2 as
 17 * published by the Free Software Foundation.
 18 */
 19
 20#include <linux/i2c.h>
 21#include <linux/bcd.h>
 22#include <linux/rtc.h>
 23#include <linux/delay.h>
 24
 25#define DRV_VERSION "1.0.8"
 26
 27/* offsets into CCR area */
 28
 29#define CCR_SEC			0
 30#define CCR_MIN			1
 31#define CCR_HOUR		2
 32#define CCR_MDAY		3
 33#define CCR_MONTH		4
 34#define CCR_YEAR		5
 35#define CCR_WDAY		6
 36#define CCR_Y2K			7
 37
 38#define X1205_REG_SR		0x3F	/* status register */
 39#define X1205_REG_Y2K		0x37
 40#define X1205_REG_DW		0x36
 41#define X1205_REG_YR		0x35
 42#define X1205_REG_MO		0x34
 43#define X1205_REG_DT		0x33
 44#define X1205_REG_HR		0x32
 45#define X1205_REG_MN		0x31
 46#define X1205_REG_SC		0x30
 47#define X1205_REG_DTR		0x13
 48#define X1205_REG_ATR		0x12
 49#define X1205_REG_INT		0x11
 50#define X1205_REG_0		0x10
 51#define X1205_REG_Y2K1		0x0F
 52#define X1205_REG_DWA1		0x0E
 53#define X1205_REG_YRA1		0x0D
 54#define X1205_REG_MOA1		0x0C
 55#define X1205_REG_DTA1		0x0B
 56#define X1205_REG_HRA1		0x0A
 57#define X1205_REG_MNA1		0x09
 58#define X1205_REG_SCA1		0x08
 59#define X1205_REG_Y2K0		0x07
 60#define X1205_REG_DWA0		0x06
 61#define X1205_REG_YRA0		0x05
 62#define X1205_REG_MOA0		0x04
 63#define X1205_REG_DTA0		0x03
 64#define X1205_REG_HRA0		0x02
 65#define X1205_REG_MNA0		0x01
 66#define X1205_REG_SCA0		0x00
 67
 68#define X1205_CCR_BASE		0x30	/* Base address of CCR */
 69#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */
 70
 71#define X1205_SR_RTCF		0x01	/* Clock failure */
 72#define X1205_SR_WEL		0x02	/* Write Enable Latch */
 73#define X1205_SR_RWEL		0x04	/* Register Write Enable */
 74#define X1205_SR_AL0		0x20	/* Alarm 0 match */
 75
 76#define X1205_DTR_DTR0		0x01
 77#define X1205_DTR_DTR1		0x02
 78#define X1205_DTR_DTR2		0x04
 79
 80#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */
 81
 82#define X1205_INT_AL0E		0x20	/* Alarm 0 enable */
 83
 84static struct i2c_driver x1205_driver;
 85
 86/*
 87 * In the routines that deal directly with the x1205 hardware, we use
 88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 89 * Epoch is initialized as 2000. Time is set to UTC.
 90 */
 91static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
 92				unsigned char reg_base)
 93{
 94	unsigned char dt_addr[2] = { 0, reg_base };
 95	unsigned char buf[8];
 96	int i;
 97
 98	struct i2c_msg msgs[] = {
 99		{ client->addr, 0, 2, dt_addr },	/* setup read ptr */
100		{ client->addr, I2C_M_RD, 8, buf },	/* read date */
 
 
 
 
 
 
 
 
 
101	};
102
103	/* read date registers */
104	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
105		dev_err(&client->dev, "%s: read error\n", __func__);
106		return -EIO;
107	}
108
109	dev_dbg(&client->dev,
110		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
111		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
112		__func__,
113		buf[0], buf[1], buf[2], buf[3],
114		buf[4], buf[5], buf[6], buf[7]);
115
116	/* Mask out the enable bits if these are alarm registers */
117	if (reg_base < X1205_CCR_BASE)
118		for (i = 0; i <= 4; i++)
119			buf[i] &= 0x7F;
120
121	tm->tm_sec = bcd2bin(buf[CCR_SEC]);
122	tm->tm_min = bcd2bin(buf[CCR_MIN]);
123	tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
124	tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
125	tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
126	tm->tm_year = bcd2bin(buf[CCR_YEAR])
127			+ (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
128	tm->tm_wday = buf[CCR_WDAY];
129
130	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
131		"mday=%d, mon=%d, year=%d, wday=%d\n",
132		__func__,
133		tm->tm_sec, tm->tm_min, tm->tm_hour,
134		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
135
136	return 0;
137}
138
139static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
140{
141	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
142
143	struct i2c_msg msgs[] = {
144		{ client->addr, 0, 2, sr_addr },	/* setup read ptr */
145		{ client->addr, I2C_M_RD, 1, sr },	/* read status */
 
 
 
 
 
 
 
 
 
146	};
147
148	/* read status register */
149	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
150		dev_err(&client->dev, "%s: read error\n", __func__);
151		return -EIO;
152	}
153
154	return 0;
155}
156
157static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
158			u8 reg_base, unsigned char alm_enable)
159{
160	int i, xfer;
161	unsigned char rdata[10] = { 0, reg_base };
162	unsigned char *buf = rdata + 2;
163
164	static const unsigned char wel[3] = { 0, X1205_REG_SR,
165						X1205_SR_WEL };
166
167	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
168						X1205_SR_WEL | X1205_SR_RWEL };
169
170	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
171
172	dev_dbg(&client->dev,
173		"%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
174		__func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
175		tm->tm_mon, tm->tm_year, tm->tm_wday);
176
177	buf[CCR_SEC] = bin2bcd(tm->tm_sec);
178	buf[CCR_MIN] = bin2bcd(tm->tm_min);
179
180	/* set hour and 24hr bit */
181	buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
182
183	buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
184
185	/* month, 1 - 12 */
186	buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
187
188	/* year, since the rtc epoch*/
189	buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
190	buf[CCR_WDAY] = tm->tm_wday & 0x07;
191	buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
192
193	/* If writing alarm registers, set compare bits on registers 0-4 */
194	if (reg_base < X1205_CCR_BASE)
195		for (i = 0; i <= 4; i++)
196			buf[i] |= 0x80;
197
198	/* this sequence is required to unlock the chip */
199	if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
 
200		dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
201		return -EIO;
202	}
203
204	if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
 
205		dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
206		return -EIO;
207	}
208
209	xfer = i2c_master_send(client, rdata, sizeof(rdata));
210	if (xfer != sizeof(rdata)) {
211		dev_err(&client->dev,
212			"%s: result=%d addr=%02x, data=%02x\n",
213			__func__,
214			 xfer, rdata[1], rdata[2]);
215		return -EIO;
216	}
217
218	/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
219	if (reg_base < X1205_CCR_BASE) {
220		unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
221
222		msleep(10);
223
224		/* ...and set or clear the AL0E bit in the INT register */
225
226		/* Need to set RWEL again as the write has cleared it */
227		xfer = i2c_master_send(client, rwel, 3);
228		if (xfer != 3) {
229			dev_err(&client->dev,
230				"%s: aloe rwel - %d\n",
231				__func__,
232				xfer);
233			return -EIO;
234		}
235
236		if (alm_enable)
237			al0e[2] = X1205_INT_AL0E;
238
239		xfer = i2c_master_send(client, al0e, 3);
240		if (xfer != 3) {
241			dev_err(&client->dev,
242				"%s: al0e - %d\n",
243				__func__,
244				xfer);
245			return -EIO;
246		}
247
248		/* and wait 10msec again for this write to complete */
249		msleep(10);
250	}
251
252	/* disable further writes */
253	if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
 
254		dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
255		return -EIO;
256	}
257
258	return 0;
259}
260
261static int x1205_fix_osc(struct i2c_client *client)
262{
263	int err;
264	struct rtc_time tm;
265
266	memset(&tm, 0, sizeof(tm));
267
268	err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
269	if (err < 0)
270		dev_err(&client->dev, "unable to restart the oscillator\n");
271
272	return err;
273}
274
275static int x1205_get_dtrim(struct i2c_client *client, int *trim)
276{
277	unsigned char dtr;
278	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
279
280	struct i2c_msg msgs[] = {
281		{ client->addr, 0, 2, dtr_addr },	/* setup read ptr */
282		{ client->addr, I2C_M_RD, 1, &dtr }, 	/* read dtr */
 
 
 
 
 
 
 
 
 
283	};
284
285	/* read dtr register */
286	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
287		dev_err(&client->dev, "%s: read error\n", __func__);
288		return -EIO;
289	}
290
291	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
292
293	*trim = 0;
294
295	if (dtr & X1205_DTR_DTR0)
296		*trim += 20;
297
298	if (dtr & X1205_DTR_DTR1)
299		*trim += 10;
300
301	if (dtr & X1205_DTR_DTR2)
302		*trim = -*trim;
303
304	return 0;
305}
306
307static int x1205_get_atrim(struct i2c_client *client, int *trim)
308{
309	s8 atr;
310	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
311
312	struct i2c_msg msgs[] = {
313		{ client->addr, 0, 2, atr_addr },	/* setup read ptr */
314		{ client->addr, I2C_M_RD, 1, &atr }, 	/* read atr */
 
 
 
 
 
 
 
 
 
315	};
316
317	/* read atr register */
318	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
319		dev_err(&client->dev, "%s: read error\n", __func__);
320		return -EIO;
321	}
322
323	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
324
325	/* atr is a two's complement value on 6 bits,
326	 * perform sign extension. The formula is
327	 * Catr = (atr * 0.25pF) + 11.00pF.
328	 */
329	if (atr & 0x20)
330		atr |= 0xC0;
331
332	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
333
334	*trim = (atr * 250) + 11000;
335
336	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
337
338	return 0;
339}
340
341struct x1205_limit
342{
343	unsigned char reg, mask, min, max;
344};
345
346static int x1205_validate_client(struct i2c_client *client)
347{
348	int i, xfer;
349
350	/* Probe array. We will read the register at the specified
351	 * address and check if the given bits are zero.
352	 */
353	static const unsigned char probe_zero_pattern[] = {
354		/* register, mask */
355		X1205_REG_SR,	0x18,
356		X1205_REG_DTR,	0xF8,
357		X1205_REG_ATR,	0xC0,
358		X1205_REG_INT,	0x18,
359		X1205_REG_0,	0xFF,
360	};
361
362	static const struct x1205_limit probe_limits_pattern[] = {
363		/* register, mask, min, max */
364		{ X1205_REG_Y2K,	0xFF,	19,	20	},
365		{ X1205_REG_DW,		0xFF,	0,	6	},
366		{ X1205_REG_YR,		0xFF,	0,	99	},
367		{ X1205_REG_MO,		0xFF,	0,	12	},
368		{ X1205_REG_DT,		0xFF,	0,	31	},
369		{ X1205_REG_HR,		0x7F,	0,	23	},
370		{ X1205_REG_MN,		0xFF,	0,	59	},
371		{ X1205_REG_SC,		0xFF,	0,	59	},
372		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
373		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
374	};
375
376	/* check that registers have bits a 0 where expected */
377	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
378		unsigned char buf;
379
380		unsigned char addr[2] = { 0, probe_zero_pattern[i] };
381
382		struct i2c_msg msgs[2] = {
383			{ client->addr, 0, 2, addr },
384			{ client->addr, I2C_M_RD, 1, &buf },
 
 
 
 
 
 
 
 
 
385		};
386
387		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
 
388			dev_err(&client->dev,
389				"%s: could not read register %x\n",
390				__func__, probe_zero_pattern[i]);
391
392			return -EIO;
393		}
394
395		if ((buf & probe_zero_pattern[i+1]) != 0) {
396			dev_err(&client->dev,
397				"%s: register=%02x, zero pattern=%d, value=%x\n",
398				__func__, probe_zero_pattern[i], i, buf);
399
400			return -ENODEV;
401		}
402	}
403
404	/* check limits (only registers with bcd values) */
405	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
406		unsigned char reg, value;
407
408		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
409
410		struct i2c_msg msgs[2] = {
411			{ client->addr, 0, 2, addr },
412			{ client->addr, I2C_M_RD, 1, &reg },
 
 
 
 
 
 
 
 
 
413		};
414
415		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
 
416			dev_err(&client->dev,
417				"%s: could not read register %x\n",
418				__func__, probe_limits_pattern[i].reg);
419
420			return -EIO;
421		}
422
423		value = bcd2bin(reg & probe_limits_pattern[i].mask);
424
425		if (value > probe_limits_pattern[i].max ||
426			value < probe_limits_pattern[i].min) {
427			dev_dbg(&client->dev,
428				"%s: register=%x, lim pattern=%d, value=%d\n",
429				__func__, probe_limits_pattern[i].reg,
430				i, value);
431
432			return -ENODEV;
433		}
434	}
435
436	return 0;
437}
438
439static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
440{
441	int err;
442	unsigned char intreg, status;
443	static unsigned char int_addr[2] = { 0, X1205_REG_INT };
444	struct i2c_client *client = to_i2c_client(dev);
445	struct i2c_msg msgs[] = {
446		{ client->addr, 0, 2, int_addr },        /* setup read ptr */
447		{ client->addr, I2C_M_RD, 1, &intreg },  /* read INT register */
 
 
 
 
 
 
 
 
 
 
448	};
449
450	/* read interrupt register and status register */
451	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
452		dev_err(&client->dev, "%s: read error\n", __func__);
453		return -EIO;
454	}
455	err = x1205_get_status(client, &status);
456	if (err == 0) {
457		alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
458		alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
459		err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
460	}
461	return err;
462}
463
464static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
465{
466	return x1205_set_datetime(to_i2c_client(dev),
467		&alrm->time, X1205_ALM0_BASE, alrm->enabled);
468}
469
470static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
471{
472	return x1205_get_datetime(to_i2c_client(dev),
473		tm, X1205_CCR_BASE);
474}
475
476static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
477{
478	return x1205_set_datetime(to_i2c_client(dev),
479		tm, X1205_CCR_BASE, 0);
480}
481
482static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
483{
484	int err, dtrim, atrim;
485
486	if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
 
487		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
488
489	if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
 
490		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
491			atrim / 1000, atrim % 1000);
492	return 0;
493}
494
495static const struct rtc_class_ops x1205_rtc_ops = {
496	.proc		= x1205_rtc_proc,
497	.read_time	= x1205_rtc_read_time,
498	.set_time	= x1205_rtc_set_time,
499	.read_alarm	= x1205_rtc_read_alarm,
500	.set_alarm	= x1205_rtc_set_alarm,
501};
502
503static ssize_t x1205_sysfs_show_atrim(struct device *dev,
504				struct device_attribute *attr, char *buf)
505{
506	int err, atrim;
507
508	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
509	if (err)
510		return err;
511
512	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
513}
514static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
515
516static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
517				struct device_attribute *attr, char *buf)
518{
519	int err, dtrim;
520
521	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
522	if (err)
523		return err;
524
525	return sprintf(buf, "%d ppm\n", dtrim);
526}
527static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
528
529static int x1205_sysfs_register(struct device *dev)
530{
531	int err;
532
533	err = device_create_file(dev, &dev_attr_atrim);
534	if (err)
535		return err;
536
537	err = device_create_file(dev, &dev_attr_dtrim);
538	if (err)
539		device_remove_file(dev, &dev_attr_atrim);
540
541	return err;
542}
543
544static void x1205_sysfs_unregister(struct device *dev)
545{
546	device_remove_file(dev, &dev_attr_atrim);
547	device_remove_file(dev, &dev_attr_dtrim);
548}
549
550
551static int x1205_probe(struct i2c_client *client,
552			const struct i2c_device_id *id)
553{
554	int err = 0;
555	unsigned char sr;
556	struct rtc_device *rtc;
557
558	dev_dbg(&client->dev, "%s\n", __func__);
559
560	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
561		return -ENODEV;
562
563	if (x1205_validate_client(client) < 0)
564		return -ENODEV;
565
566	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
567
568	rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
569				&x1205_rtc_ops, THIS_MODULE);
570
571	if (IS_ERR(rtc))
572		return PTR_ERR(rtc);
573
574	i2c_set_clientdata(client, rtc);
575
576	/* Check for power failures and eventually enable the osc */
577	if ((err = x1205_get_status(client, &sr)) == 0) {
 
578		if (sr & X1205_SR_RTCF) {
579			dev_err(&client->dev,
580				"power failure detected, "
581				"please set the clock\n");
582			udelay(50);
583			x1205_fix_osc(client);
584		}
585	}
586	else
587		dev_err(&client->dev, "couldn't read status\n");
 
588
589	err = x1205_sysfs_register(&client->dev);
590	if (err)
591		goto exit_devreg;
592
593	return 0;
594
595exit_devreg:
596	rtc_device_unregister(rtc);
597
598	return err;
599}
600
601static int x1205_remove(struct i2c_client *client)
602{
603	struct rtc_device *rtc = i2c_get_clientdata(client);
604
605	rtc_device_unregister(rtc);
606	x1205_sysfs_unregister(&client->dev);
607	return 0;
608}
609
610static const struct i2c_device_id x1205_id[] = {
611	{ "x1205", 0 },
612	{ }
613};
614MODULE_DEVICE_TABLE(i2c, x1205_id);
615
616static struct i2c_driver x1205_driver = {
617	.driver		= {
618		.name	= "rtc-x1205",
619	},
620	.probe		= x1205_probe,
621	.remove		= x1205_remove,
622	.id_table	= x1205_id,
623};
624
625static int __init x1205_init(void)
626{
627	return i2c_add_driver(&x1205_driver);
628}
629
630static void __exit x1205_exit(void)
631{
632	i2c_del_driver(&x1205_driver);
633}
634
635MODULE_AUTHOR(
636	"Karen Spearel <kas111 at gmail dot com>, "
637	"Alessandro Zummo <a.zummo@towertech.it>");
638MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
639MODULE_LICENSE("GPL");
640MODULE_VERSION(DRV_VERSION);
641
642module_init(x1205_init);
643module_exit(x1205_exit);

  1/*
  2 * An i2c driver for the Xicor/Intersil X1205 RTC
  3 * Copyright 2004 Karen Spearel
  4 * Copyright 2005 Alessandro Zummo
  5 *
  6 * please send all reports to:
  7 *	Karen Spearel <kas111 at gmail dot com>
  8 *	Alessandro Zummo <a.zummo@towertech.it>
  9 *
 10 * based on a lot of other RTC drivers.
 11 *
 12 * Information and datasheet:
 13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 14 *
 15 * This program is free software; you can redistribute it and/or modify
 16 * it under the terms of the GNU General Public License version 2 as
 17 * published by the Free Software Foundation.
 18 */
 19
 20#include <linux/i2c.h>
 21#include <linux/bcd.h>
 22#include <linux/rtc.h>
 23#include <linux/delay.h>
 24#include <linux/module.h>
 25#include <linux/bitops.h>
 26
 27/* offsets into CCR area */
 28
 29#define CCR_SEC			0
 30#define CCR_MIN			1
 31#define CCR_HOUR		2
 32#define CCR_MDAY		3
 33#define CCR_MONTH		4
 34#define CCR_YEAR		5
 35#define CCR_WDAY		6
 36#define CCR_Y2K			7
 37
 38#define X1205_REG_SR		0x3F	/* status register */
 39#define X1205_REG_Y2K		0x37
 40#define X1205_REG_DW		0x36
 41#define X1205_REG_YR		0x35
 42#define X1205_REG_MO		0x34
 43#define X1205_REG_DT		0x33
 44#define X1205_REG_HR		0x32
 45#define X1205_REG_MN		0x31
 46#define X1205_REG_SC		0x30
 47#define X1205_REG_DTR		0x13
 48#define X1205_REG_ATR		0x12
 49#define X1205_REG_INT		0x11
 50#define X1205_REG_0		0x10
 51#define X1205_REG_Y2K1		0x0F
 52#define X1205_REG_DWA1		0x0E
 53#define X1205_REG_YRA1		0x0D
 54#define X1205_REG_MOA1		0x0C
 55#define X1205_REG_DTA1		0x0B
 56#define X1205_REG_HRA1		0x0A
 57#define X1205_REG_MNA1		0x09
 58#define X1205_REG_SCA1		0x08
 59#define X1205_REG_Y2K0		0x07
 60#define X1205_REG_DWA0		0x06
 61#define X1205_REG_YRA0		0x05
 62#define X1205_REG_MOA0		0x04
 63#define X1205_REG_DTA0		0x03
 64#define X1205_REG_HRA0		0x02
 65#define X1205_REG_MNA0		0x01
 66#define X1205_REG_SCA0		0x00
 67
 68#define X1205_CCR_BASE		0x30	/* Base address of CCR */
 69#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */
 70
 71#define X1205_SR_RTCF		0x01	/* Clock failure */
 72#define X1205_SR_WEL		0x02	/* Write Enable Latch */
 73#define X1205_SR_RWEL		0x04	/* Register Write Enable */
 74#define X1205_SR_AL0		0x20	/* Alarm 0 match */
 75
 76#define X1205_DTR_DTR0		0x01
 77#define X1205_DTR_DTR1		0x02
 78#define X1205_DTR_DTR2		0x04
 79
 80#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */
 81
 82#define X1205_INT_AL0E		0x20	/* Alarm 0 enable */
 83
 84static struct i2c_driver x1205_driver;
 85
 86/*
 87 * In the routines that deal directly with the x1205 hardware, we use
 88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 89 * Epoch is initialized as 2000. Time is set to UTC.
 90 */
 91static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
 92				unsigned char reg_base)
 93{
 94	unsigned char dt_addr[2] = { 0, reg_base };
 95	unsigned char buf[8];
 96	int i;
 97
 98	struct i2c_msg msgs[] = {
 99		{/* setup read ptr */
100			.addr = client->addr,
101			.len = 2,
102			.buf = dt_addr
103		},
104		{/* read date */
105			.addr = client->addr,
106			.flags = I2C_M_RD,
107			.len = 8,
108			.buf = buf
109		},
110	};
111
112	/* read date registers */
113	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
114		dev_err(&client->dev, "%s: read error\n", __func__);
115		return -EIO;
116	}
117
118	dev_dbg(&client->dev,
119		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
120		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
121		__func__,
122		buf[0], buf[1], buf[2], buf[3],
123		buf[4], buf[5], buf[6], buf[7]);
124
125	/* Mask out the enable bits if these are alarm registers */
126	if (reg_base < X1205_CCR_BASE)
127		for (i = 0; i <= 4; i++)
128			buf[i] &= 0x7F;
129
130	tm->tm_sec = bcd2bin(buf[CCR_SEC]);
131	tm->tm_min = bcd2bin(buf[CCR_MIN]);
132	tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
133	tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
134	tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
135	tm->tm_year = bcd2bin(buf[CCR_YEAR])
136			+ (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
137	tm->tm_wday = buf[CCR_WDAY];
138
139	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
140		"mday=%d, mon=%d, year=%d, wday=%d\n",
141		__func__,
142		tm->tm_sec, tm->tm_min, tm->tm_hour,
143		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
144
145	return 0;
146}
147
148static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
149{
150	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
151
152	struct i2c_msg msgs[] = {
153		{     /* setup read ptr */
154			.addr = client->addr,
155			.len = 2,
156			.buf = sr_addr
157		},
158		{    /* read status */
159			.addr = client->addr,
160			.flags = I2C_M_RD,
161			.len = 1,
162			.buf = sr
163		},
164	};
165
166	/* read status register */
167	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
168		dev_err(&client->dev, "%s: read error\n", __func__);
169		return -EIO;
170	}
171
172	return 0;
173}
174
175static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
176			u8 reg_base, unsigned char alm_enable)
177{
178	int i, xfer;
179	unsigned char rdata[10] = { 0, reg_base };
180	unsigned char *buf = rdata + 2;
181
182	static const unsigned char wel[3] = { 0, X1205_REG_SR,
183						X1205_SR_WEL };
184
185	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
186						X1205_SR_WEL | X1205_SR_RWEL };
187
188	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
189
190	dev_dbg(&client->dev,
191		"%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
192		__func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
193		tm->tm_mon, tm->tm_year, tm->tm_wday);
194
195	buf[CCR_SEC] = bin2bcd(tm->tm_sec);
196	buf[CCR_MIN] = bin2bcd(tm->tm_min);
197
198	/* set hour and 24hr bit */
199	buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
200
201	buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
202
203	/* month, 1 - 12 */
204	buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
205
206	/* year, since the rtc epoch*/
207	buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
208	buf[CCR_WDAY] = tm->tm_wday & 0x07;
209	buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
210
211	/* If writing alarm registers, set compare bits on registers 0-4 */
212	if (reg_base < X1205_CCR_BASE)
213		for (i = 0; i <= 4; i++)
214			buf[i] |= 0x80;
215
216	/* this sequence is required to unlock the chip */
217	xfer = i2c_master_send(client, wel, 3);
218	if (xfer != 3) {
219		dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
220		return -EIO;
221	}
222
223	xfer = i2c_master_send(client, rwel, 3);
224	if (xfer != 3) {
225		dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
226		return -EIO;
227	}
228
229	xfer = i2c_master_send(client, rdata, sizeof(rdata));
230	if (xfer != sizeof(rdata)) {
231		dev_err(&client->dev,
232			"%s: result=%d addr=%02x, data=%02x\n",
233			__func__,
234			 xfer, rdata[1], rdata[2]);
235		return -EIO;
236	}
237
238	/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
239	if (reg_base < X1205_CCR_BASE) {
240		unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
241
242		msleep(10);
243
244		/* ...and set or clear the AL0E bit in the INT register */
245
246		/* Need to set RWEL again as the write has cleared it */
247		xfer = i2c_master_send(client, rwel, 3);
248		if (xfer != 3) {
249			dev_err(&client->dev,
250				"%s: aloe rwel - %d\n",
251				__func__,
252				xfer);
253			return -EIO;
254		}
255
256		if (alm_enable)
257			al0e[2] = X1205_INT_AL0E;
258
259		xfer = i2c_master_send(client, al0e, 3);
260		if (xfer != 3) {
261			dev_err(&client->dev,
262				"%s: al0e - %d\n",
263				__func__,
264				xfer);
265			return -EIO;
266		}
267
268		/* and wait 10msec again for this write to complete */
269		msleep(10);
270	}
271
272	/* disable further writes */
273	xfer = i2c_master_send(client, diswe, 3);
274	if (xfer != 3) {
275		dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
276		return -EIO;
277	}
278
279	return 0;
280}
281
282static int x1205_fix_osc(struct i2c_client *client)
283{
284	int err;
285	struct rtc_time tm;
286
287	memset(&tm, 0, sizeof(tm));
288
289	err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
290	if (err < 0)
291		dev_err(&client->dev, "unable to restart the oscillator\n");
292
293	return err;
294}
295
296static int x1205_get_dtrim(struct i2c_client *client, int *trim)
297{
298	unsigned char dtr;
299	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
300
301	struct i2c_msg msgs[] = {
302		{	/* setup read ptr */
303			.addr = client->addr,
304			.len = 2,
305			.buf = dtr_addr
306		},
307		{      /* read dtr */
308			.addr = client->addr,
309			.flags = I2C_M_RD,
310			.len = 1,
311			.buf = &dtr
312		},
313	};
314
315	/* read dtr register */
316	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
317		dev_err(&client->dev, "%s: read error\n", __func__);
318		return -EIO;
319	}
320
321	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
322
323	*trim = 0;
324
325	if (dtr & X1205_DTR_DTR0)
326		*trim += 20;
327
328	if (dtr & X1205_DTR_DTR1)
329		*trim += 10;
330
331	if (dtr & X1205_DTR_DTR2)
332		*trim = -*trim;
333
334	return 0;
335}
336
337static int x1205_get_atrim(struct i2c_client *client, int *trim)
338{
339	s8 atr;
340	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
341
342	struct i2c_msg msgs[] = {
343		{/* setup read ptr */
344			.addr = client->addr,
345			.len = 2,
346			.buf = atr_addr
347		},
348		{/* read atr */
349			.addr = client->addr,
350			.flags = I2C_M_RD,
351			.len = 1,
352			.buf = &atr
353		},
354	};
355
356	/* read atr register */
357	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
358		dev_err(&client->dev, "%s: read error\n", __func__);
359		return -EIO;
360	}
361
362	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
363
364	/* atr is a two's complement value on 6 bits,
365	 * perform sign extension. The formula is
366	 * Catr = (atr * 0.25pF) + 11.00pF.
367	 */
368	atr = sign_extend32(atr, 5);
 
369
370	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
371
372	*trim = (atr * 250) + 11000;
373
374	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
375
376	return 0;
377}
378
379struct x1205_limit {
 
380	unsigned char reg, mask, min, max;
381};
382
383static int x1205_validate_client(struct i2c_client *client)
384{
385	int i, xfer;
386
387	/* Probe array. We will read the register at the specified
388	 * address and check if the given bits are zero.
389	 */
390	static const unsigned char probe_zero_pattern[] = {
391		/* register, mask */
392		X1205_REG_SR,	0x18,
393		X1205_REG_DTR,	0xF8,
394		X1205_REG_ATR,	0xC0,
395		X1205_REG_INT,	0x18,
396		X1205_REG_0,	0xFF,
397	};
398
399	static const struct x1205_limit probe_limits_pattern[] = {
400		/* register, mask, min, max */
401		{ X1205_REG_Y2K,	0xFF,	19,	20	},
402		{ X1205_REG_DW,		0xFF,	0,	6	},
403		{ X1205_REG_YR,		0xFF,	0,	99	},
404		{ X1205_REG_MO,		0xFF,	0,	12	},
405		{ X1205_REG_DT,		0xFF,	0,	31	},
406		{ X1205_REG_HR,		0x7F,	0,	23	},
407		{ X1205_REG_MN,		0xFF,	0,	59	},
408		{ X1205_REG_SC,		0xFF,	0,	59	},
409		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
410		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
411	};
412
413	/* check that registers have bits a 0 where expected */
414	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
415		unsigned char buf;
416
417		unsigned char addr[2] = { 0, probe_zero_pattern[i] };
418
419		struct i2c_msg msgs[2] = {
420			{
421				.addr = client->addr,
422				.len = 2,
423				.buf = addr
424			},
425			{
426				.addr = client->addr,
427				.flags = I2C_M_RD,
428				.len = 1,
429				.buf = &buf
430			},
431		};
432
433		xfer = i2c_transfer(client->adapter, msgs, 2);
434		if (xfer != 2) {
435			dev_err(&client->dev,
436				"%s: could not read register %x\n",
437				__func__, probe_zero_pattern[i]);
438
439			return -EIO;
440		}
441
442		if ((buf & probe_zero_pattern[i+1]) != 0) {
443			dev_err(&client->dev,
444				"%s: register=%02x, zero pattern=%d, value=%x\n",
445				__func__, probe_zero_pattern[i], i, buf);
446
447			return -ENODEV;
448		}
449	}
450
451	/* check limits (only registers with bcd values) */
452	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
453		unsigned char reg, value;
454
455		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
456
457		struct i2c_msg msgs[2] = {
458			{
459				.addr = client->addr,
460				.len = 2,
461				.buf = addr
462			},
463			{
464				.addr = client->addr,
465				.flags = I2C_M_RD,
466				.len = 1,
467				.buf = &reg
468			},
469		};
470
471		xfer = i2c_transfer(client->adapter, msgs, 2);
472		if (xfer != 2) {
473			dev_err(&client->dev,
474				"%s: could not read register %x\n",
475				__func__, probe_limits_pattern[i].reg);
476
477			return -EIO;
478		}
479
480		value = bcd2bin(reg & probe_limits_pattern[i].mask);
481
482		if (value > probe_limits_pattern[i].max ||
483			value < probe_limits_pattern[i].min) {
484			dev_dbg(&client->dev,
485				"%s: register=%x, lim pattern=%d, value=%d\n",
486				__func__, probe_limits_pattern[i].reg,
487				i, value);
488
489			return -ENODEV;
490		}
491	}
492
493	return 0;
494}
495
496static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
497{
498	int err;
499	unsigned char intreg, status;
500	static unsigned char int_addr[2] = { 0, X1205_REG_INT };
501	struct i2c_client *client = to_i2c_client(dev);
502	struct i2c_msg msgs[] = {
503		{ /* setup read ptr */
504			.addr = client->addr,
505			.len = 2,
506			.buf = int_addr
507		},
508		{/* read INT register */
509
510			.addr = client->addr,
511			.flags = I2C_M_RD,
512			.len = 1,
513			.buf = &intreg
514		},
515	};
516
517	/* read interrupt register and status register */
518	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
519		dev_err(&client->dev, "%s: read error\n", __func__);
520		return -EIO;
521	}
522	err = x1205_get_status(client, &status);
523	if (err == 0) {
524		alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
525		alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
526		err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
527	}
528	return err;
529}
530
531static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
532{
533	return x1205_set_datetime(to_i2c_client(dev),
534		&alrm->time, X1205_ALM0_BASE, alrm->enabled);
535}
536
537static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
538{
539	return x1205_get_datetime(to_i2c_client(dev),
540		tm, X1205_CCR_BASE);
541}
542
543static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
544{
545	return x1205_set_datetime(to_i2c_client(dev),
546		tm, X1205_CCR_BASE, 0);
547}
548
549static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
550{
551	int err, dtrim, atrim;
552
553	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
554	if (!err)
555		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
556
557	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
558	if (!err)
559		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
560			atrim / 1000, atrim % 1000);
561	return 0;
562}
563
564static const struct rtc_class_ops x1205_rtc_ops = {
565	.proc		= x1205_rtc_proc,
566	.read_time	= x1205_rtc_read_time,
567	.set_time	= x1205_rtc_set_time,
568	.read_alarm	= x1205_rtc_read_alarm,
569	.set_alarm	= x1205_rtc_set_alarm,
570};
571
572static ssize_t x1205_sysfs_show_atrim(struct device *dev,
573				struct device_attribute *attr, char *buf)
574{
575	int err, atrim;
576
577	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
578	if (err)
579		return err;
580
581	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
582}
583static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
584
585static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
586				struct device_attribute *attr, char *buf)
587{
588	int err, dtrim;
589
590	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
591	if (err)
592		return err;
593
594	return sprintf(buf, "%d ppm\n", dtrim);
595}
596static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
597
598static int x1205_sysfs_register(struct device *dev)
599{
600	int err;
601
602	err = device_create_file(dev, &dev_attr_atrim);
603	if (err)
604		return err;
605
606	err = device_create_file(dev, &dev_attr_dtrim);
607	if (err)
608		device_remove_file(dev, &dev_attr_atrim);
609
610	return err;
611}
612
613static void x1205_sysfs_unregister(struct device *dev)
614{
615	device_remove_file(dev, &dev_attr_atrim);
616	device_remove_file(dev, &dev_attr_dtrim);
617}
618
619
620static int x1205_probe(struct i2c_client *client,
621			const struct i2c_device_id *id)
622{
623	int err = 0;
624	unsigned char sr;
625	struct rtc_device *rtc;
626
627	dev_dbg(&client->dev, "%s\n", __func__);
628
629	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
630		return -ENODEV;
631
632	if (x1205_validate_client(client) < 0)
633		return -ENODEV;
634
635	rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
636					&x1205_rtc_ops, THIS_MODULE);
 
 
637
638	if (IS_ERR(rtc))
639		return PTR_ERR(rtc);
640
641	i2c_set_clientdata(client, rtc);
642
643	/* Check for power failures and eventually enable the osc */
644	err = x1205_get_status(client, &sr);
645	if (!err) {
646		if (sr & X1205_SR_RTCF) {
647			dev_err(&client->dev,
648				"power failure detected, "
649				"please set the clock\n");
650			udelay(50);
651			x1205_fix_osc(client);
652		}
653	} else {
 
654		dev_err(&client->dev, "couldn't read status\n");
655	}
656
657	err = x1205_sysfs_register(&client->dev);
658	if (err)
659		dev_err(&client->dev, "Unable to create sysfs entries\n");
660
661	return 0;
 
 
 
 
 
662}
663
664static int x1205_remove(struct i2c_client *client)
665{
 
 
 
666	x1205_sysfs_unregister(&client->dev);
667	return 0;
668}
669
670static const struct i2c_device_id x1205_id[] = {
671	{ "x1205", 0 },
672	{ }
673};
674MODULE_DEVICE_TABLE(i2c, x1205_id);
675
676static struct i2c_driver x1205_driver = {
677	.driver		= {
678		.name	= "rtc-x1205",
679	},
680	.probe		= x1205_probe,
681	.remove		= x1205_remove,
682	.id_table	= x1205_id,
683};
684
685module_i2c_driver(x1205_driver);
 
 
 
 
 
 
 
 
686
687MODULE_AUTHOR(
688	"Karen Spearel <kas111 at gmail dot com>, "
689	"Alessandro Zummo <a.zummo@towertech.it>");
690MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
691MODULE_LICENSE("GPL");