1/*
   2 * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   3 *
   4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   5 * Copyright (C) 2006 David Brownell (convert to new framework)
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * as published by the Free Software Foundation; either version
  10 * 2 of the License, or (at your option) any later version.
  11 */
  12
  13/*
  14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  15 * That defined the register interface now provided by all PCs, some
  16 * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  17 * integrate an MC146818 clone in their southbridge, and boards use
  18 * that instead of discrete clones like the DS12887 or M48T86.  There
  19 * are also clones that connect using the LPC bus.
  20 *
  21 * That register API is also used directly by various other drivers
  22 * (notably for integrated NVRAM), infrastructure (x86 has code to
  23 * bypass the RTC framework, directly reading the RTC during boot
  24 * and updating minutes/seconds for systems using NTP synch) and
  25 * utilities (like userspace 'hwclock', if no /dev node exists).
  26 *
  27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  28 * interrupts disabled, holding the global rtc_lock, to exclude those
  29 * other drivers and utilities on correctly configured systems.
  30 */
  31#include <linux/kernel.h>
  32#include <linux/module.h>
  33#include <linux/init.h>
  34#include <linux/interrupt.h>
  35#include <linux/spinlock.h>
  36#include <linux/platform_device.h>
  37#include <linux/mod_devicetable.h>
  38#include <linux/log2.h>
  39#include <linux/pm.h>
  40#include <linux/of.h>
  41#include <linux/of_platform.h>
  42
  43/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  44#include <asm-generic/rtc.h>
  45
  46struct cmos_rtc {
  47	struct rtc_device	*rtc;
  48	struct device		*dev;
  49	int			irq;
  50	struct resource		*iomem;
  51
  52	void			(*wake_on)(struct device *);
  53	void			(*wake_off)(struct device *);
  54
  55	u8			enabled_wake;
  56	u8			suspend_ctrl;
  57
  58	/* newer hardware extends the original register set */
  59	u8			day_alrm;
  60	u8			mon_alrm;
  61	u8			century;
  62};
  63
  64/* both platform and pnp busses use negative numbers for invalid irqs */
  65#define is_valid_irq(n)		((n) > 0)
  66
  67static const char driver_name[] = "rtc_cmos";
  68
  69/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  70 * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
  71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  72 */
  73#define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
  74
  75static inline int is_intr(u8 rtc_intr)
  76{
  77	if (!(rtc_intr & RTC_IRQF))
  78		return 0;
  79	return rtc_intr & RTC_IRQMASK;
  80}
  81
  82/*----------------------------------------------------------------*/
  83
  84/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  86 * used in a broken "legacy replacement" mode.  The breakage includes
  87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  88 * other (better) use.
  89 *
  90 * When that broken mode is in use, platform glue provides a partial
  91 * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
  92 * want to use HPET for anything except those IRQs though...
  93 */
  94#ifdef CONFIG_HPET_EMULATE_RTC
  95#include <asm/hpet.h>
  96#else
  97
  98static inline int is_hpet_enabled(void)
  99{
 100	return 0;
 101}
 102
 103static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 104{
 105	return 0;
 106}
 107
 108static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 109{
 110	return 0;
 111}
 112
 113static inline int
 114hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 115{
 116	return 0;
 117}
 118
 119static inline int hpet_set_periodic_freq(unsigned long freq)
 120{
 121	return 0;
 122}
 123
 124static inline int hpet_rtc_dropped_irq(void)
 125{
 126	return 0;
 127}
 128
 129static inline int hpet_rtc_timer_init(void)
 130{
 131	return 0;
 132}
 133
 134extern irq_handler_t hpet_rtc_interrupt;
 135
 136static inline int hpet_register_irq_handler(irq_handler_t handler)
 137{
 138	return 0;
 139}
 140
 141static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 142{
 143	return 0;
 144}
 145
 146#endif
 147
 148/*----------------------------------------------------------------*/
 149
 150#ifdef RTC_PORT
 151
 152/* Most newer x86 systems have two register banks, the first used
 153 * for RTC and NVRAM and the second only for NVRAM.  Caller must
 154 * own rtc_lock ... and we won't worry about access during NMI.
 155 */
 156#define can_bank2	true
 157
 158static inline unsigned char cmos_read_bank2(unsigned char addr)
 159{
 160	outb(addr, RTC_PORT(2));
 161	return inb(RTC_PORT(3));
 162}
 163
 164static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 165{
 166	outb(addr, RTC_PORT(2));
 167	outb(val, RTC_PORT(2));
 168}
 169
 170#else
 171
 172#define can_bank2	false
 173
 174static inline unsigned char cmos_read_bank2(unsigned char addr)
 175{
 176	return 0;
 177}
 178
 179static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 180{
 181}
 182
 183#endif
 184
 185/*----------------------------------------------------------------*/
 186
 187static int cmos_read_time(struct device *dev, struct rtc_time *t)
 188{
 189	/* REVISIT:  if the clock has a "century" register, use
 190	 * that instead of the heuristic in get_rtc_time().
 191	 * That'll make Y3K compatility (year > 2070) easy!
 192	 */
 193	get_rtc_time(t);
 194	return 0;
 195}
 196
 197static int cmos_set_time(struct device *dev, struct rtc_time *t)
 198{
 199	/* REVISIT:  set the "century" register if available
 200	 *
 201	 * NOTE: this ignores the issue whereby updating the seconds
 202	 * takes effect exactly 500ms after we write the register.
 203	 * (Also queueing and other delays before we get this far.)
 204	 */
 205	return set_rtc_time(t);
 206}
 207
 208static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 209{
 210	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 211	unsigned char	rtc_control;
 212
 213	if (!is_valid_irq(cmos->irq))
 214		return -EIO;
 215
 216	/* Basic alarms only support hour, minute, and seconds fields.
 217	 * Some also support day and month, for alarms up to a year in
 218	 * the future.
 219	 */
 220	t->time.tm_mday = -1;
 221	t->time.tm_mon = -1;
 222
 223	spin_lock_irq(&rtc_lock);
 224	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 225	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 226	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 227
 228	if (cmos->day_alrm) {
 229		/* ignore upper bits on readback per ACPI spec */
 230		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 231		if (!t->time.tm_mday)
 232			t->time.tm_mday = -1;
 233
 234		if (cmos->mon_alrm) {
 235			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 236			if (!t->time.tm_mon)
 237				t->time.tm_mon = -1;
 238		}
 239	}
 240
 241	rtc_control = CMOS_READ(RTC_CONTROL);
 242	spin_unlock_irq(&rtc_lock);
 243
 244	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 245		if (((unsigned)t->time.tm_sec) < 0x60)
 246			t->time.tm_sec = bcd2bin(t->time.tm_sec);
 247		else
 248			t->time.tm_sec = -1;
 249		if (((unsigned)t->time.tm_min) < 0x60)
 250			t->time.tm_min = bcd2bin(t->time.tm_min);
 251		else
 252			t->time.tm_min = -1;
 253		if (((unsigned)t->time.tm_hour) < 0x24)
 254			t->time.tm_hour = bcd2bin(t->time.tm_hour);
 255		else
 256			t->time.tm_hour = -1;
 257
 258		if (cmos->day_alrm) {
 259			if (((unsigned)t->time.tm_mday) <= 0x31)
 260				t->time.tm_mday = bcd2bin(t->time.tm_mday);
 261			else
 262				t->time.tm_mday = -1;
 263
 264			if (cmos->mon_alrm) {
 265				if (((unsigned)t->time.tm_mon) <= 0x12)
 266					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 267				else
 268					t->time.tm_mon = -1;
 269			}
 270		}
 271	}
 272	t->time.tm_year = -1;
 273
 274	t->enabled = !!(rtc_control & RTC_AIE);
 275	t->pending = 0;
 276
 277	return 0;
 278}
 279
 280static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 281{
 282	unsigned char	rtc_intr;
 283
 284	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 285	 * allegedly some older rtcs need that to handle irqs properly
 286	 */
 287	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 288
 289	if (is_hpet_enabled())
 290		return;
 291
 292	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 293	if (is_intr(rtc_intr))
 294		rtc_update_irq(cmos->rtc, 1, rtc_intr);
 295}
 296
 297static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 298{
 299	unsigned char	rtc_control;
 300
 301	/* flush any pending IRQ status, notably for update irqs,
 302	 * before we enable new IRQs
 303	 */
 304	rtc_control = CMOS_READ(RTC_CONTROL);
 305	cmos_checkintr(cmos, rtc_control);
 306
 307	rtc_control |= mask;
 308	CMOS_WRITE(rtc_control, RTC_CONTROL);
 309	hpet_set_rtc_irq_bit(mask);
 310
 311	cmos_checkintr(cmos, rtc_control);
 312}
 313
 314static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 315{
 316	unsigned char	rtc_control;
 317
 318	rtc_control = CMOS_READ(RTC_CONTROL);
 319	rtc_control &= ~mask;
 320	CMOS_WRITE(rtc_control, RTC_CONTROL);
 321	hpet_mask_rtc_irq_bit(mask);
 322
 323	cmos_checkintr(cmos, rtc_control);
 324}
 325
 326static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 327{
 328	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 329       unsigned char   mon, mday, hrs, min, sec, rtc_control;
 330
 331	if (!is_valid_irq(cmos->irq))
 332		return -EIO;
 333
 334	mon = t->time.tm_mon + 1;
 335	mday = t->time.tm_mday;
 336	hrs = t->time.tm_hour;
 337	min = t->time.tm_min;
 338	sec = t->time.tm_sec;
 339
 340	rtc_control = CMOS_READ(RTC_CONTROL);
 341	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 342		/* Writing 0xff means "don't care" or "match all".  */
 343		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 344		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 345		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 346		min = (min < 60) ? bin2bcd(min) : 0xff;
 347		sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 348	}
 349
 350	spin_lock_irq(&rtc_lock);
 351
 352	/* next rtc irq must not be from previous alarm setting */
 353	cmos_irq_disable(cmos, RTC_AIE);
 354
 355	/* update alarm */
 356	CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 357	CMOS_WRITE(min, RTC_MINUTES_ALARM);
 358	CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 359
 360	/* the system may support an "enhanced" alarm */
 361	if (cmos->day_alrm) {
 362		CMOS_WRITE(mday, cmos->day_alrm);
 363		if (cmos->mon_alrm)
 364			CMOS_WRITE(mon, cmos->mon_alrm);
 365	}
 366
 367	/* FIXME the HPET alarm glue currently ignores day_alrm
 368	 * and mon_alrm ...
 369	 */
 370	hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
 371
 372	if (t->enabled)
 373		cmos_irq_enable(cmos, RTC_AIE);
 374
 375	spin_unlock_irq(&rtc_lock);
 376
 377	return 0;
 378}
 379
 380static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 381{
 382	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 383	unsigned long	flags;
 384
 385	if (!is_valid_irq(cmos->irq))
 386		return -EINVAL;
 387
 388	spin_lock_irqsave(&rtc_lock, flags);
 389
 390	if (enabled)
 391		cmos_irq_enable(cmos, RTC_AIE);
 392	else
 393		cmos_irq_disable(cmos, RTC_AIE);
 394
 395	spin_unlock_irqrestore(&rtc_lock, flags);
 396	return 0;
 397}
 398
 399#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
 400
 401static int cmos_procfs(struct device *dev, struct seq_file *seq)
 402{
 403	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 404	unsigned char	rtc_control, valid;
 405
 406	spin_lock_irq(&rtc_lock);
 407	rtc_control = CMOS_READ(RTC_CONTROL);
 408	valid = CMOS_READ(RTC_VALID);
 409	spin_unlock_irq(&rtc_lock);
 410
 411	/* NOTE:  at least ICH6 reports battery status using a different
 412	 * (non-RTC) bit; and SQWE is ignored on many current systems.
 413	 */
 414	return seq_printf(seq,
 415			"periodic_IRQ\t: %s\n"
 416			"update_IRQ\t: %s\n"
 417			"HPET_emulated\t: %s\n"
 418			// "square_wave\t: %s\n"
 419			"BCD\t\t: %s\n"
 420			"DST_enable\t: %s\n"
 421			"periodic_freq\t: %d\n"
 422			"batt_status\t: %s\n",
 423			(rtc_control & RTC_PIE) ? "yes" : "no",
 424			(rtc_control & RTC_UIE) ? "yes" : "no",
 425			is_hpet_enabled() ? "yes" : "no",
 426			// (rtc_control & RTC_SQWE) ? "yes" : "no",
 427			(rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 428			(rtc_control & RTC_DST_EN) ? "yes" : "no",
 429			cmos->rtc->irq_freq,
 430			(valid & RTC_VRT) ? "okay" : "dead");
 431}
 432
 433#else
 434#define	cmos_procfs	NULL
 435#endif
 436
 437static const struct rtc_class_ops cmos_rtc_ops = {
 438	.read_time		= cmos_read_time,
 439	.set_time		= cmos_set_time,
 440	.read_alarm		= cmos_read_alarm,
 441	.set_alarm		= cmos_set_alarm,
 442	.proc			= cmos_procfs,
 443	.alarm_irq_enable	= cmos_alarm_irq_enable,
 444};
 445
 446/*----------------------------------------------------------------*/
 447
 448/*
 449 * All these chips have at least 64 bytes of address space, shared by
 450 * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 451 * by boot firmware.  Modern chips have 128 or 256 bytes.
 452 */
 453
 454#define NVRAM_OFFSET	(RTC_REG_D + 1)
 455
 456static ssize_t
 457cmos_nvram_read(struct file *filp, struct kobject *kobj,
 458		struct bin_attribute *attr,
 459		char *buf, loff_t off, size_t count)
 460{
 461	int	retval;
 462
 463	if (unlikely(off >= attr->size))
 464		return 0;
 465	if (unlikely(off < 0))
 466		return -EINVAL;
 467	if ((off + count) > attr->size)
 468		count = attr->size - off;
 469
 470	off += NVRAM_OFFSET;
 471	spin_lock_irq(&rtc_lock);
 472	for (retval = 0; count; count--, off++, retval++) {
 473		if (off < 128)
 474			*buf++ = CMOS_READ(off);
 475		else if (can_bank2)
 476			*buf++ = cmos_read_bank2(off);
 477		else
 478			break;
 479	}
 480	spin_unlock_irq(&rtc_lock);
 481
 482	return retval;
 483}
 484
 485static ssize_t
 486cmos_nvram_write(struct file *filp, struct kobject *kobj,
 487		struct bin_attribute *attr,
 488		char *buf, loff_t off, size_t count)
 489{
 490	struct cmos_rtc	*cmos;
 491	int		retval;
 492
 493	cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
 494	if (unlikely(off >= attr->size))
 495		return -EFBIG;
 496	if (unlikely(off < 0))
 497		return -EINVAL;
 498	if ((off + count) > attr->size)
 499		count = attr->size - off;
 500
 501	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 502	 * checksum on part of the NVRAM data.  That's currently ignored
 503	 * here.  If userspace is smart enough to know what fields of
 504	 * NVRAM to update, updating checksums is also part of its job.
 505	 */
 506	off += NVRAM_OFFSET;
 507	spin_lock_irq(&rtc_lock);
 508	for (retval = 0; count; count--, off++, retval++) {
 509		/* don't trash RTC registers */
 510		if (off == cmos->day_alrm
 511				|| off == cmos->mon_alrm
 512				|| off == cmos->century)
 513			buf++;
 514		else if (off < 128)
 515			CMOS_WRITE(*buf++, off);
 516		else if (can_bank2)
 517			cmos_write_bank2(*buf++, off);
 518		else
 519			break;
 520	}
 521	spin_unlock_irq(&rtc_lock);
 522
 523	return retval;
 524}
 525
 526static struct bin_attribute nvram = {
 527	.attr = {
 528		.name	= "nvram",
 529		.mode	= S_IRUGO | S_IWUSR,
 530	},
 531
 532	.read	= cmos_nvram_read,
 533	.write	= cmos_nvram_write,
 534	/* size gets set up later */
 535};
 536
 537/*----------------------------------------------------------------*/
 538
 539static struct cmos_rtc	cmos_rtc;
 540
 541static irqreturn_t cmos_interrupt(int irq, void *p)
 542{
 543	u8		irqstat;
 544	u8		rtc_control;
 545
 546	spin_lock(&rtc_lock);
 547
 548	/* When the HPET interrupt handler calls us, the interrupt
 549	 * status is passed as arg1 instead of the irq number.  But
 550	 * always clear irq status, even when HPET is in the way.
 551	 *
 552	 * Note that HPET and RTC are almost certainly out of phase,
 553	 * giving different IRQ status ...
 554	 */
 555	irqstat = CMOS_READ(RTC_INTR_FLAGS);
 556	rtc_control = CMOS_READ(RTC_CONTROL);
 557	if (is_hpet_enabled())
 558		irqstat = (unsigned long)irq & 0xF0;
 559	irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 560
 561	/* All Linux RTC alarms should be treated as if they were oneshot.
 562	 * Similar code may be needed in system wakeup paths, in case the
 563	 * alarm woke the system.
 564	 */
 565	if (irqstat & RTC_AIE) {
 566		rtc_control &= ~RTC_AIE;
 567		CMOS_WRITE(rtc_control, RTC_CONTROL);
 568		hpet_mask_rtc_irq_bit(RTC_AIE);
 569
 570		CMOS_READ(RTC_INTR_FLAGS);
 571	}
 572	spin_unlock(&rtc_lock);
 573
 574	if (is_intr(irqstat)) {
 575		rtc_update_irq(p, 1, irqstat);
 576		return IRQ_HANDLED;
 577	} else
 578		return IRQ_NONE;
 579}
 580
 581#ifdef	CONFIG_PNP
 582#define	INITSECTION
 583
 584#else
 585#define	INITSECTION	__init
 586#endif
 587
 588static int INITSECTION
 589cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 590{
 591	struct cmos_rtc_board_info	*info = dev->platform_data;
 592	int				retval = 0;
 593	unsigned char			rtc_control;
 594	unsigned			address_space;
 595
 596	/* there can be only one ... */
 597	if (cmos_rtc.dev)
 598		return -EBUSY;
 599
 600	if (!ports)
 601		return -ENODEV;
 602
 603	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 604	 *
 605	 * REVISIT non-x86 systems may instead use memory space resources
 606	 * (needing ioremap etc), not i/o space resources like this ...
 607	 */
 608	ports = request_region(ports->start,
 609			resource_size(ports),
 610			driver_name);
 611	if (!ports) {
 612		dev_dbg(dev, "i/o registers already in use\n");
 613		return -EBUSY;
 614	}
 615
 616	cmos_rtc.irq = rtc_irq;
 617	cmos_rtc.iomem = ports;
 618
 619	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 620	 * driver did, but don't reject unknown configs.   Old hardware
 621	 * won't address 128 bytes.  Newer chips have multiple banks,
 622	 * though they may not be listed in one I/O resource.
 623	 */
 624#if	defined(CONFIG_ATARI)
 625	address_space = 64;
 626#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 627			|| defined(__sparc__) || defined(__mips__) \
 628			|| defined(__powerpc__)
 629	address_space = 128;
 630#else
 631#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 632	address_space = 128;
 633#endif
 634	if (can_bank2 && ports->end > (ports->start + 1))
 635		address_space = 256;
 636
 637	/* For ACPI systems extension info comes from the FADT.  On others,
 638	 * board specific setup provides it as appropriate.  Systems where
 639	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 640	 * some almost-clones) can provide hooks to make that behave.
 641	 *
 642	 * Note that ACPI doesn't preclude putting these registers into
 643	 * "extended" areas of the chip, including some that we won't yet
 644	 * expect CMOS_READ and friends to handle.
 645	 */
 646	if (info) {
 647		if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 648			cmos_rtc.day_alrm = info->rtc_day_alarm;
 649		if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 650			cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 651		if (info->rtc_century && info->rtc_century < 128)
 652			cmos_rtc.century = info->rtc_century;
 653
 654		if (info->wake_on && info->wake_off) {
 655			cmos_rtc.wake_on = info->wake_on;
 656			cmos_rtc.wake_off = info->wake_off;
 657		}
 658	}
 659
 660	cmos_rtc.dev = dev;
 661	dev_set_drvdata(dev, &cmos_rtc);
 662
 663	cmos_rtc.rtc = rtc_device_register(driver_name, dev,
 664				&cmos_rtc_ops, THIS_MODULE);
 665	if (IS_ERR(cmos_rtc.rtc)) {
 666		retval = PTR_ERR(cmos_rtc.rtc);
 667		goto cleanup0;
 668	}
 669
 670	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 671
 672	spin_lock_irq(&rtc_lock);
 673
 674	/* force periodic irq to CMOS reset default of 1024Hz;
 675	 *
 676	 * REVISIT it's been reported that at least one x86_64 ALI mobo
 677	 * doesn't use 32KHz here ... for portability we might need to
 678	 * do something about other clock frequencies.
 679	 */
 680	cmos_rtc.rtc->irq_freq = 1024;
 681	hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 682	CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 683
 684	/* disable irqs */
 685	cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 686
 687	rtc_control = CMOS_READ(RTC_CONTROL);
 688
 689	spin_unlock_irq(&rtc_lock);
 690
 691	/* FIXME:
 692	 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
 693	 */
 694       if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
 695		dev_warn(dev, "only 24-hr supported\n");
 696		retval = -ENXIO;
 697		goto cleanup1;
 698	}
 699
 700	if (is_valid_irq(rtc_irq)) {
 701		irq_handler_t rtc_cmos_int_handler;
 702
 703		if (is_hpet_enabled()) {
 704			int err;
 705
 706			rtc_cmos_int_handler = hpet_rtc_interrupt;
 707			err = hpet_register_irq_handler(cmos_interrupt);
 708			if (err != 0) {
 709				printk(KERN_WARNING "hpet_register_irq_handler "
 710						" failed in rtc_init().");
 711				goto cleanup1;
 712			}
 713		} else
 714			rtc_cmos_int_handler = cmos_interrupt;
 715
 716		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 717				IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
 718				cmos_rtc.rtc);
 719		if (retval < 0) {
 720			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 721			goto cleanup1;
 722		}
 723	}
 724	hpet_rtc_timer_init();
 725
 726	/* export at least the first block of NVRAM */
 727	nvram.size = address_space - NVRAM_OFFSET;
 728	retval = sysfs_create_bin_file(&dev->kobj, &nvram);
 729	if (retval < 0) {
 730		dev_dbg(dev, "can't create nvram file? %d\n", retval);
 731		goto cleanup2;
 732	}
 733
 734	pr_info("%s: %s%s, %zd bytes nvram%s\n",
 735		dev_name(&cmos_rtc.rtc->dev),
 736		!is_valid_irq(rtc_irq) ? "no alarms" :
 737			cmos_rtc.mon_alrm ? "alarms up to one year" :
 738			cmos_rtc.day_alrm ? "alarms up to one month" :
 739			"alarms up to one day",
 740		cmos_rtc.century ? ", y3k" : "",
 741		nvram.size,
 742		is_hpet_enabled() ? ", hpet irqs" : "");
 743
 744	return 0;
 745
 746cleanup2:
 747	if (is_valid_irq(rtc_irq))
 748		free_irq(rtc_irq, cmos_rtc.rtc);
 749cleanup1:
 750	cmos_rtc.dev = NULL;
 751	rtc_device_unregister(cmos_rtc.rtc);
 752cleanup0:
 753	release_region(ports->start, resource_size(ports));
 754	return retval;
 755}
 756
 757static void cmos_do_shutdown(void)
 758{
 759	spin_lock_irq(&rtc_lock);
 760	cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 761	spin_unlock_irq(&rtc_lock);
 762}
 763
 764static void __exit cmos_do_remove(struct device *dev)
 765{
 766	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 767	struct resource *ports;
 768
 769	cmos_do_shutdown();
 770
 771	sysfs_remove_bin_file(&dev->kobj, &nvram);
 772
 773	if (is_valid_irq(cmos->irq)) {
 774		free_irq(cmos->irq, cmos->rtc);
 775		hpet_unregister_irq_handler(cmos_interrupt);
 776	}
 777
 778	rtc_device_unregister(cmos->rtc);
 779	cmos->rtc = NULL;
 780
 781	ports = cmos->iomem;
 782	release_region(ports->start, resource_size(ports));
 783	cmos->iomem = NULL;
 784
 785	cmos->dev = NULL;
 786	dev_set_drvdata(dev, NULL);
 787}
 788
 789#ifdef	CONFIG_PM
 790
 791static int cmos_suspend(struct device *dev)
 792{
 793	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 794	unsigned char	tmp;
 795
 796	/* only the alarm might be a wakeup event source */
 797	spin_lock_irq(&rtc_lock);
 798	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 799	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 800		unsigned char	mask;
 801
 802		if (device_may_wakeup(dev))
 803			mask = RTC_IRQMASK & ~RTC_AIE;
 804		else
 805			mask = RTC_IRQMASK;
 806		tmp &= ~mask;
 807		CMOS_WRITE(tmp, RTC_CONTROL);
 808
 809		/* shut down hpet emulation - we don't need it for alarm */
 810		hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
 811		cmos_checkintr(cmos, tmp);
 812	}
 813	spin_unlock_irq(&rtc_lock);
 814
 815	if (tmp & RTC_AIE) {
 816		cmos->enabled_wake = 1;
 817		if (cmos->wake_on)
 818			cmos->wake_on(dev);
 819		else
 820			enable_irq_wake(cmos->irq);
 821	}
 822
 823	pr_debug("%s: suspend%s, ctrl %02x\n",
 824			dev_name(&cmos_rtc.rtc->dev),
 825			(tmp & RTC_AIE) ? ", alarm may wake" : "",
 826			tmp);
 827
 828	return 0;
 829}
 830
 831/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
 832 * after a detour through G3 "mechanical off", although the ACPI spec
 833 * says wakeup should only work from G1/S4 "hibernate".  To most users,
 834 * distinctions between S4 and S5 are pointless.  So when the hardware
 835 * allows, don't draw that distinction.
 836 */
 837static inline int cmos_poweroff(struct device *dev)
 838{
 839	return cmos_suspend(dev);
 840}
 841
 842static int cmos_resume(struct device *dev)
 843{
 844	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 845	unsigned char	tmp = cmos->suspend_ctrl;
 846
 847	/* re-enable any irqs previously active */
 848	if (tmp & RTC_IRQMASK) {
 849		unsigned char	mask;
 850
 851		if (cmos->enabled_wake) {
 852			if (cmos->wake_off)
 853				cmos->wake_off(dev);
 854			else
 855				disable_irq_wake(cmos->irq);
 856			cmos->enabled_wake = 0;
 857		}
 858
 859		spin_lock_irq(&rtc_lock);
 860		do {
 861			CMOS_WRITE(tmp, RTC_CONTROL);
 862			hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
 863
 864			mask = CMOS_READ(RTC_INTR_FLAGS);
 865			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
 866			if (!is_hpet_enabled() || !is_intr(mask))
 867				break;
 868
 869			/* force one-shot behavior if HPET blocked
 870			 * the wake alarm's irq
 871			 */
 872			rtc_update_irq(cmos->rtc, 1, mask);
 873			tmp &= ~RTC_AIE;
 874			hpet_mask_rtc_irq_bit(RTC_AIE);
 875		} while (mask & RTC_AIE);
 876		spin_unlock_irq(&rtc_lock);
 877	}
 878
 879	pr_debug("%s: resume, ctrl %02x\n",
 880			dev_name(&cmos_rtc.rtc->dev),
 881			tmp);
 882
 883	return 0;
 884}
 885
 886static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
 887
 888#else
 889
 890static inline int cmos_poweroff(struct device *dev)
 891{
 892	return -ENOSYS;
 893}
 894
 895#endif
 896
 897/*----------------------------------------------------------------*/
 898
 899/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
 900 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
 901 * probably list them in similar PNPBIOS tables; so PNP is more common.
 902 *
 903 * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
 904 * predate even PNPBIOS should set up platform_bus devices.
 905 */
 906
 907#ifdef	CONFIG_ACPI
 908
 909#include <linux/acpi.h>
 910
 911static u32 rtc_handler(void *context)
 912{
 
 
 
 913	acpi_clear_event(ACPI_EVENT_RTC);
 914	acpi_disable_event(ACPI_EVENT_RTC, 0);
 915	return ACPI_INTERRUPT_HANDLED;
 916}
 917
 918static inline void rtc_wake_setup(void)
 919{
 920	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
 921	/*
 922	 * After the RTC handler is installed, the Fixed_RTC event should
 923	 * be disabled. Only when the RTC alarm is set will it be enabled.
 924	 */
 925	acpi_clear_event(ACPI_EVENT_RTC);
 926	acpi_disable_event(ACPI_EVENT_RTC, 0);
 927}
 928
 929static void rtc_wake_on(struct device *dev)
 930{
 931	acpi_clear_event(ACPI_EVENT_RTC);
 932	acpi_enable_event(ACPI_EVENT_RTC, 0);
 933}
 934
 935static void rtc_wake_off(struct device *dev)
 936{
 937	acpi_disable_event(ACPI_EVENT_RTC, 0);
 938}
 939
 940/* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
 941 * its device node and pass extra config data.  This helps its driver use
 942 * capabilities that the now-obsolete mc146818 didn't have, and informs it
 943 * that this board's RTC is wakeup-capable (per ACPI spec).
 944 */
 945static struct cmos_rtc_board_info acpi_rtc_info;
 946
 947static void __devinit
 948cmos_wake_setup(struct device *dev)
 949{
 950	if (acpi_disabled)
 951		return;
 952
 953	rtc_wake_setup();
 954	acpi_rtc_info.wake_on = rtc_wake_on;
 955	acpi_rtc_info.wake_off = rtc_wake_off;
 956
 957	/* workaround bug in some ACPI tables */
 958	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
 959		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
 960			acpi_gbl_FADT.month_alarm);
 961		acpi_gbl_FADT.month_alarm = 0;
 962	}
 963
 964	acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
 965	acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
 966	acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
 967
 968	/* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
 969	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
 970		dev_info(dev, "RTC can wake from S4\n");
 971
 972	dev->platform_data = &acpi_rtc_info;
 973
 974	/* RTC always wakes from S1/S2/S3, and often S4/STD */
 975	device_init_wakeup(dev, 1);
 976}
 977
 978#else
 979
 980static void __devinit
 981cmos_wake_setup(struct device *dev)
 982{
 983}
 984
 985#endif
 986
 987#ifdef	CONFIG_PNP
 988
 989#include <linux/pnp.h>
 990
 991static int __devinit
 992cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
 993{
 994	cmos_wake_setup(&pnp->dev);
 995
 996	if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
 997		/* Some machines contain a PNP entry for the RTC, but
 998		 * don't define the IRQ. It should always be safe to
 999		 * hardcode it in these cases
1000		 */
1001		return cmos_do_probe(&pnp->dev,
1002				pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1003	else
1004		return cmos_do_probe(&pnp->dev,
1005				pnp_get_resource(pnp, IORESOURCE_IO, 0),
1006				pnp_irq(pnp, 0));
1007}
1008
1009static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1010{
1011	cmos_do_remove(&pnp->dev);
1012}
1013
1014#ifdef	CONFIG_PM
1015
1016static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1017{
1018	return cmos_suspend(&pnp->dev);
1019}
1020
1021static int cmos_pnp_resume(struct pnp_dev *pnp)
1022{
1023	return cmos_resume(&pnp->dev);
1024}
1025
1026#else
1027#define	cmos_pnp_suspend	NULL
1028#define	cmos_pnp_resume		NULL
1029#endif
1030
1031static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1032{
1033	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1034		return;
1035
1036	cmos_do_shutdown();
1037}
1038
1039static const struct pnp_device_id rtc_ids[] = {
1040	{ .id = "PNP0b00", },
1041	{ .id = "PNP0b01", },
1042	{ .id = "PNP0b02", },
1043	{ },
1044};
1045MODULE_DEVICE_TABLE(pnp, rtc_ids);
1046
1047static struct pnp_driver cmos_pnp_driver = {
1048	.name		= (char *) driver_name,
1049	.id_table	= rtc_ids,
1050	.probe		= cmos_pnp_probe,
1051	.remove		= __exit_p(cmos_pnp_remove),
1052	.shutdown	= cmos_pnp_shutdown,
1053
1054	/* flag ensures resume() gets called, and stops syslog spam */
1055	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1056	.suspend	= cmos_pnp_suspend,
1057	.resume		= cmos_pnp_resume,
1058};
1059
1060#endif	/* CONFIG_PNP */
1061
1062#ifdef CONFIG_OF
1063static const struct of_device_id of_cmos_match[] = {
1064	{
1065		.compatible = "motorola,mc146818",
1066	},
1067	{ },
1068};
1069MODULE_DEVICE_TABLE(of, of_cmos_match);
1070
1071static __init void cmos_of_init(struct platform_device *pdev)
1072{
1073	struct device_node *node = pdev->dev.of_node;
1074	struct rtc_time time;
1075	int ret;
1076	const __be32 *val;
1077
1078	if (!node)
1079		return;
1080
1081	val = of_get_property(node, "ctrl-reg", NULL);
1082	if (val)
1083		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1084
1085	val = of_get_property(node, "freq-reg", NULL);
1086	if (val)
1087		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1088
1089	get_rtc_time(&time);
1090	ret = rtc_valid_tm(&time);
1091	if (ret) {
1092		struct rtc_time def_time = {
1093			.tm_year = 1,
1094			.tm_mday = 1,
1095		};
1096		set_rtc_time(&def_time);
1097	}
1098}
1099#else
1100static inline void cmos_of_init(struct platform_device *pdev) {}
1101#define of_cmos_match NULL
1102#endif
1103/*----------------------------------------------------------------*/
1104
1105/* Platform setup should have set up an RTC device, when PNP is
1106 * unavailable ... this could happen even on (older) PCs.
1107 */
1108
1109static int __init cmos_platform_probe(struct platform_device *pdev)
1110{
1111	cmos_of_init(pdev);
1112	cmos_wake_setup(&pdev->dev);
1113	return cmos_do_probe(&pdev->dev,
1114			platform_get_resource(pdev, IORESOURCE_IO, 0),
1115			platform_get_irq(pdev, 0));
1116}
1117
1118static int __exit cmos_platform_remove(struct platform_device *pdev)
1119{
1120	cmos_do_remove(&pdev->dev);
1121	return 0;
1122}
1123
1124static void cmos_platform_shutdown(struct platform_device *pdev)
1125{
1126	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1127		return;
1128
1129	cmos_do_shutdown();
1130}
1131
1132/* work with hotplug and coldplug */
1133MODULE_ALIAS("platform:rtc_cmos");
1134
1135static struct platform_driver cmos_platform_driver = {
1136	.remove		= __exit_p(cmos_platform_remove),
1137	.shutdown	= cmos_platform_shutdown,
1138	.driver = {
1139		.name		= (char *) driver_name,
1140#ifdef CONFIG_PM
1141		.pm		= &cmos_pm_ops,
1142#endif
1143		.of_match_table = of_cmos_match,
1144	}
1145};
1146
1147#ifdef CONFIG_PNP
1148static bool pnp_driver_registered;
1149#endif
1150static bool platform_driver_registered;
1151
1152static int __init cmos_init(void)
1153{
1154	int retval = 0;
1155
1156#ifdef	CONFIG_PNP
1157	retval = pnp_register_driver(&cmos_pnp_driver);
1158	if (retval == 0)
1159		pnp_driver_registered = true;
1160#endif
1161
1162	if (!cmos_rtc.dev) {
1163		retval = platform_driver_probe(&cmos_platform_driver,
1164					       cmos_platform_probe);
1165		if (retval == 0)
1166			platform_driver_registered = true;
1167	}
1168
1169	if (retval == 0)
1170		return 0;
1171
1172#ifdef	CONFIG_PNP
1173	if (pnp_driver_registered)
1174		pnp_unregister_driver(&cmos_pnp_driver);
1175#endif
1176	return retval;
1177}
1178module_init(cmos_init);
1179
1180static void __exit cmos_exit(void)
1181{
1182#ifdef	CONFIG_PNP
1183	if (pnp_driver_registered)
1184		pnp_unregister_driver(&cmos_pnp_driver);
1185#endif
1186	if (platform_driver_registered)
1187		platform_driver_unregister(&cmos_platform_driver);
1188}
1189module_exit(cmos_exit);
1190
1191
1192MODULE_AUTHOR("David Brownell");
1193MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1194MODULE_LICENSE("GPL");