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1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/interrupt.h>
35#include <linux/spinlock.h>
36#include <linux/platform_device.h>
37#include <linux/mod_devicetable.h>
38#include <linux/log2.h>
39#include <linux/pm.h>
40#include <linux/of.h>
41#include <linux/of_platform.h>
42
43/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44#include <asm-generic/rtc.h>
45
46struct cmos_rtc {
47 struct rtc_device *rtc;
48 struct device *dev;
49 int irq;
50 struct resource *iomem;
51
52 void (*wake_on)(struct device *);
53 void (*wake_off)(struct device *);
54
55 u8 enabled_wake;
56 u8 suspend_ctrl;
57
58 /* newer hardware extends the original register set */
59 u8 day_alrm;
60 u8 mon_alrm;
61 u8 century;
62};
63
64/* both platform and pnp busses use negative numbers for invalid irqs */
65#define is_valid_irq(n) ((n) > 0)
66
67static const char driver_name[] = "rtc_cmos";
68
69/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
70 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
72 */
73#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
74
75static inline int is_intr(u8 rtc_intr)
76{
77 if (!(rtc_intr & RTC_IRQF))
78 return 0;
79 return rtc_intr & RTC_IRQMASK;
80}
81
82/*----------------------------------------------------------------*/
83
84/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
86 * used in a broken "legacy replacement" mode. The breakage includes
87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
88 * other (better) use.
89 *
90 * When that broken mode is in use, platform glue provides a partial
91 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
92 * want to use HPET for anything except those IRQs though...
93 */
94#ifdef CONFIG_HPET_EMULATE_RTC
95#include <asm/hpet.h>
96#else
97
98static inline int is_hpet_enabled(void)
99{
100 return 0;
101}
102
103static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
104{
105 return 0;
106}
107
108static inline int hpet_set_rtc_irq_bit(unsigned long mask)
109{
110 return 0;
111}
112
113static inline int
114hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
115{
116 return 0;
117}
118
119static inline int hpet_set_periodic_freq(unsigned long freq)
120{
121 return 0;
122}
123
124static inline int hpet_rtc_dropped_irq(void)
125{
126 return 0;
127}
128
129static inline int hpet_rtc_timer_init(void)
130{
131 return 0;
132}
133
134extern irq_handler_t hpet_rtc_interrupt;
135
136static inline int hpet_register_irq_handler(irq_handler_t handler)
137{
138 return 0;
139}
140
141static inline int hpet_unregister_irq_handler(irq_handler_t handler)
142{
143 return 0;
144}
145
146#endif
147
148/*----------------------------------------------------------------*/
149
150#ifdef RTC_PORT
151
152/* Most newer x86 systems have two register banks, the first used
153 * for RTC and NVRAM and the second only for NVRAM. Caller must
154 * own rtc_lock ... and we won't worry about access during NMI.
155 */
156#define can_bank2 true
157
158static inline unsigned char cmos_read_bank2(unsigned char addr)
159{
160 outb(addr, RTC_PORT(2));
161 return inb(RTC_PORT(3));
162}
163
164static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
165{
166 outb(addr, RTC_PORT(2));
167 outb(val, RTC_PORT(2));
168}
169
170#else
171
172#define can_bank2 false
173
174static inline unsigned char cmos_read_bank2(unsigned char addr)
175{
176 return 0;
177}
178
179static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
180{
181}
182
183#endif
184
185/*----------------------------------------------------------------*/
186
187static int cmos_read_time(struct device *dev, struct rtc_time *t)
188{
189 /* REVISIT: if the clock has a "century" register, use
190 * that instead of the heuristic in get_rtc_time().
191 * That'll make Y3K compatility (year > 2070) easy!
192 */
193 get_rtc_time(t);
194 return 0;
195}
196
197static int cmos_set_time(struct device *dev, struct rtc_time *t)
198{
199 /* REVISIT: set the "century" register if available
200 *
201 * NOTE: this ignores the issue whereby updating the seconds
202 * takes effect exactly 500ms after we write the register.
203 * (Also queueing and other delays before we get this far.)
204 */
205 return set_rtc_time(t);
206}
207
208static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
209{
210 struct cmos_rtc *cmos = dev_get_drvdata(dev);
211 unsigned char rtc_control;
212
213 if (!is_valid_irq(cmos->irq))
214 return -EIO;
215
216 /* Basic alarms only support hour, minute, and seconds fields.
217 * Some also support day and month, for alarms up to a year in
218 * the future.
219 */
220 t->time.tm_mday = -1;
221 t->time.tm_mon = -1;
222
223 spin_lock_irq(&rtc_lock);
224 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
225 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
226 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
227
228 if (cmos->day_alrm) {
229 /* ignore upper bits on readback per ACPI spec */
230 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
231 if (!t->time.tm_mday)
232 t->time.tm_mday = -1;
233
234 if (cmos->mon_alrm) {
235 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
236 if (!t->time.tm_mon)
237 t->time.tm_mon = -1;
238 }
239 }
240
241 rtc_control = CMOS_READ(RTC_CONTROL);
242 spin_unlock_irq(&rtc_lock);
243
244 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
245 if (((unsigned)t->time.tm_sec) < 0x60)
246 t->time.tm_sec = bcd2bin(t->time.tm_sec);
247 else
248 t->time.tm_sec = -1;
249 if (((unsigned)t->time.tm_min) < 0x60)
250 t->time.tm_min = bcd2bin(t->time.tm_min);
251 else
252 t->time.tm_min = -1;
253 if (((unsigned)t->time.tm_hour) < 0x24)
254 t->time.tm_hour = bcd2bin(t->time.tm_hour);
255 else
256 t->time.tm_hour = -1;
257
258 if (cmos->day_alrm) {
259 if (((unsigned)t->time.tm_mday) <= 0x31)
260 t->time.tm_mday = bcd2bin(t->time.tm_mday);
261 else
262 t->time.tm_mday = -1;
263
264 if (cmos->mon_alrm) {
265 if (((unsigned)t->time.tm_mon) <= 0x12)
266 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
267 else
268 t->time.tm_mon = -1;
269 }
270 }
271 }
272 t->time.tm_year = -1;
273
274 t->enabled = !!(rtc_control & RTC_AIE);
275 t->pending = 0;
276
277 return 0;
278}
279
280static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
281{
282 unsigned char rtc_intr;
283
284 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
285 * allegedly some older rtcs need that to handle irqs properly
286 */
287 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
288
289 if (is_hpet_enabled())
290 return;
291
292 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
293 if (is_intr(rtc_intr))
294 rtc_update_irq(cmos->rtc, 1, rtc_intr);
295}
296
297static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
298{
299 unsigned char rtc_control;
300
301 /* flush any pending IRQ status, notably for update irqs,
302 * before we enable new IRQs
303 */
304 rtc_control = CMOS_READ(RTC_CONTROL);
305 cmos_checkintr(cmos, rtc_control);
306
307 rtc_control |= mask;
308 CMOS_WRITE(rtc_control, RTC_CONTROL);
309 hpet_set_rtc_irq_bit(mask);
310
311 cmos_checkintr(cmos, rtc_control);
312}
313
314static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
315{
316 unsigned char rtc_control;
317
318 rtc_control = CMOS_READ(RTC_CONTROL);
319 rtc_control &= ~mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_mask_rtc_irq_bit(mask);
322
323 cmos_checkintr(cmos, rtc_control);
324}
325
326static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
327{
328 struct cmos_rtc *cmos = dev_get_drvdata(dev);
329 unsigned char mon, mday, hrs, min, sec, rtc_control;
330
331 if (!is_valid_irq(cmos->irq))
332 return -EIO;
333
334 mon = t->time.tm_mon + 1;
335 mday = t->time.tm_mday;
336 hrs = t->time.tm_hour;
337 min = t->time.tm_min;
338 sec = t->time.tm_sec;
339
340 rtc_control = CMOS_READ(RTC_CONTROL);
341 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
342 /* Writing 0xff means "don't care" or "match all". */
343 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
344 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
345 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
346 min = (min < 60) ? bin2bcd(min) : 0xff;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
348 }
349
350 spin_lock_irq(&rtc_lock);
351
352 /* next rtc irq must not be from previous alarm setting */
353 cmos_irq_disable(cmos, RTC_AIE);
354
355 /* update alarm */
356 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
357 CMOS_WRITE(min, RTC_MINUTES_ALARM);
358 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
359
360 /* the system may support an "enhanced" alarm */
361 if (cmos->day_alrm) {
362 CMOS_WRITE(mday, cmos->day_alrm);
363 if (cmos->mon_alrm)
364 CMOS_WRITE(mon, cmos->mon_alrm);
365 }
366
367 /* FIXME the HPET alarm glue currently ignores day_alrm
368 * and mon_alrm ...
369 */
370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
371
372 if (t->enabled)
373 cmos_irq_enable(cmos, RTC_AIE);
374
375 spin_unlock_irq(&rtc_lock);
376
377 return 0;
378}
379
380static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
381{
382 struct cmos_rtc *cmos = dev_get_drvdata(dev);
383 unsigned long flags;
384
385 if (!is_valid_irq(cmos->irq))
386 return -EINVAL;
387
388 spin_lock_irqsave(&rtc_lock, flags);
389
390 if (enabled)
391 cmos_irq_enable(cmos, RTC_AIE);
392 else
393 cmos_irq_disable(cmos, RTC_AIE);
394
395 spin_unlock_irqrestore(&rtc_lock, flags);
396 return 0;
397}
398
399#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
400
401static int cmos_procfs(struct device *dev, struct seq_file *seq)
402{
403 struct cmos_rtc *cmos = dev_get_drvdata(dev);
404 unsigned char rtc_control, valid;
405
406 spin_lock_irq(&rtc_lock);
407 rtc_control = CMOS_READ(RTC_CONTROL);
408 valid = CMOS_READ(RTC_VALID);
409 spin_unlock_irq(&rtc_lock);
410
411 /* NOTE: at least ICH6 reports battery status using a different
412 * (non-RTC) bit; and SQWE is ignored on many current systems.
413 */
414 return seq_printf(seq,
415 "periodic_IRQ\t: %s\n"
416 "update_IRQ\t: %s\n"
417 "HPET_emulated\t: %s\n"
418 // "square_wave\t: %s\n"
419 "BCD\t\t: %s\n"
420 "DST_enable\t: %s\n"
421 "periodic_freq\t: %d\n"
422 "batt_status\t: %s\n",
423 (rtc_control & RTC_PIE) ? "yes" : "no",
424 (rtc_control & RTC_UIE) ? "yes" : "no",
425 is_hpet_enabled() ? "yes" : "no",
426 // (rtc_control & RTC_SQWE) ? "yes" : "no",
427 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
428 (rtc_control & RTC_DST_EN) ? "yes" : "no",
429 cmos->rtc->irq_freq,
430 (valid & RTC_VRT) ? "okay" : "dead");
431}
432
433#else
434#define cmos_procfs NULL
435#endif
436
437static const struct rtc_class_ops cmos_rtc_ops = {
438 .read_time = cmos_read_time,
439 .set_time = cmos_set_time,
440 .read_alarm = cmos_read_alarm,
441 .set_alarm = cmos_set_alarm,
442 .proc = cmos_procfs,
443 .alarm_irq_enable = cmos_alarm_irq_enable,
444};
445
446/*----------------------------------------------------------------*/
447
448/*
449 * All these chips have at least 64 bytes of address space, shared by
450 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
451 * by boot firmware. Modern chips have 128 or 256 bytes.
452 */
453
454#define NVRAM_OFFSET (RTC_REG_D + 1)
455
456static ssize_t
457cmos_nvram_read(struct file *filp, struct kobject *kobj,
458 struct bin_attribute *attr,
459 char *buf, loff_t off, size_t count)
460{
461 int retval;
462
463 if (unlikely(off >= attr->size))
464 return 0;
465 if (unlikely(off < 0))
466 return -EINVAL;
467 if ((off + count) > attr->size)
468 count = attr->size - off;
469
470 off += NVRAM_OFFSET;
471 spin_lock_irq(&rtc_lock);
472 for (retval = 0; count; count--, off++, retval++) {
473 if (off < 128)
474 *buf++ = CMOS_READ(off);
475 else if (can_bank2)
476 *buf++ = cmos_read_bank2(off);
477 else
478 break;
479 }
480 spin_unlock_irq(&rtc_lock);
481
482 return retval;
483}
484
485static ssize_t
486cmos_nvram_write(struct file *filp, struct kobject *kobj,
487 struct bin_attribute *attr,
488 char *buf, loff_t off, size_t count)
489{
490 struct cmos_rtc *cmos;
491 int retval;
492
493 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
494 if (unlikely(off >= attr->size))
495 return -EFBIG;
496 if (unlikely(off < 0))
497 return -EINVAL;
498 if ((off + count) > attr->size)
499 count = attr->size - off;
500
501 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
502 * checksum on part of the NVRAM data. That's currently ignored
503 * here. If userspace is smart enough to know what fields of
504 * NVRAM to update, updating checksums is also part of its job.
505 */
506 off += NVRAM_OFFSET;
507 spin_lock_irq(&rtc_lock);
508 for (retval = 0; count; count--, off++, retval++) {
509 /* don't trash RTC registers */
510 if (off == cmos->day_alrm
511 || off == cmos->mon_alrm
512 || off == cmos->century)
513 buf++;
514 else if (off < 128)
515 CMOS_WRITE(*buf++, off);
516 else if (can_bank2)
517 cmos_write_bank2(*buf++, off);
518 else
519 break;
520 }
521 spin_unlock_irq(&rtc_lock);
522
523 return retval;
524}
525
526static struct bin_attribute nvram = {
527 .attr = {
528 .name = "nvram",
529 .mode = S_IRUGO | S_IWUSR,
530 },
531
532 .read = cmos_nvram_read,
533 .write = cmos_nvram_write,
534 /* size gets set up later */
535};
536
537/*----------------------------------------------------------------*/
538
539static struct cmos_rtc cmos_rtc;
540
541static irqreturn_t cmos_interrupt(int irq, void *p)
542{
543 u8 irqstat;
544 u8 rtc_control;
545
546 spin_lock(&rtc_lock);
547
548 /* When the HPET interrupt handler calls us, the interrupt
549 * status is passed as arg1 instead of the irq number. But
550 * always clear irq status, even when HPET is in the way.
551 *
552 * Note that HPET and RTC are almost certainly out of phase,
553 * giving different IRQ status ...
554 */
555 irqstat = CMOS_READ(RTC_INTR_FLAGS);
556 rtc_control = CMOS_READ(RTC_CONTROL);
557 if (is_hpet_enabled())
558 irqstat = (unsigned long)irq & 0xF0;
559 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
560
561 /* All Linux RTC alarms should be treated as if they were oneshot.
562 * Similar code may be needed in system wakeup paths, in case the
563 * alarm woke the system.
564 */
565 if (irqstat & RTC_AIE) {
566 rtc_control &= ~RTC_AIE;
567 CMOS_WRITE(rtc_control, RTC_CONTROL);
568 hpet_mask_rtc_irq_bit(RTC_AIE);
569
570 CMOS_READ(RTC_INTR_FLAGS);
571 }
572 spin_unlock(&rtc_lock);
573
574 if (is_intr(irqstat)) {
575 rtc_update_irq(p, 1, irqstat);
576 return IRQ_HANDLED;
577 } else
578 return IRQ_NONE;
579}
580
581#ifdef CONFIG_PNP
582#define INITSECTION
583
584#else
585#define INITSECTION __init
586#endif
587
588static int INITSECTION
589cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
590{
591 struct cmos_rtc_board_info *info = dev->platform_data;
592 int retval = 0;
593 unsigned char rtc_control;
594 unsigned address_space;
595
596 /* there can be only one ... */
597 if (cmos_rtc.dev)
598 return -EBUSY;
599
600 if (!ports)
601 return -ENODEV;
602
603 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
604 *
605 * REVISIT non-x86 systems may instead use memory space resources
606 * (needing ioremap etc), not i/o space resources like this ...
607 */
608 ports = request_region(ports->start,
609 resource_size(ports),
610 driver_name);
611 if (!ports) {
612 dev_dbg(dev, "i/o registers already in use\n");
613 return -EBUSY;
614 }
615
616 cmos_rtc.irq = rtc_irq;
617 cmos_rtc.iomem = ports;
618
619 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
620 * driver did, but don't reject unknown configs. Old hardware
621 * won't address 128 bytes. Newer chips have multiple banks,
622 * though they may not be listed in one I/O resource.
623 */
624#if defined(CONFIG_ATARI)
625 address_space = 64;
626#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
627 || defined(__sparc__) || defined(__mips__) \
628 || defined(__powerpc__)
629 address_space = 128;
630#else
631#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
632 address_space = 128;
633#endif
634 if (can_bank2 && ports->end > (ports->start + 1))
635 address_space = 256;
636
637 /* For ACPI systems extension info comes from the FADT. On others,
638 * board specific setup provides it as appropriate. Systems where
639 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
640 * some almost-clones) can provide hooks to make that behave.
641 *
642 * Note that ACPI doesn't preclude putting these registers into
643 * "extended" areas of the chip, including some that we won't yet
644 * expect CMOS_READ and friends to handle.
645 */
646 if (info) {
647 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
648 cmos_rtc.day_alrm = info->rtc_day_alarm;
649 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
650 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
651 if (info->rtc_century && info->rtc_century < 128)
652 cmos_rtc.century = info->rtc_century;
653
654 if (info->wake_on && info->wake_off) {
655 cmos_rtc.wake_on = info->wake_on;
656 cmos_rtc.wake_off = info->wake_off;
657 }
658 }
659
660 cmos_rtc.dev = dev;
661 dev_set_drvdata(dev, &cmos_rtc);
662
663 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
664 &cmos_rtc_ops, THIS_MODULE);
665 if (IS_ERR(cmos_rtc.rtc)) {
666 retval = PTR_ERR(cmos_rtc.rtc);
667 goto cleanup0;
668 }
669
670 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
671
672 spin_lock_irq(&rtc_lock);
673
674 /* force periodic irq to CMOS reset default of 1024Hz;
675 *
676 * REVISIT it's been reported that at least one x86_64 ALI mobo
677 * doesn't use 32KHz here ... for portability we might need to
678 * do something about other clock frequencies.
679 */
680 cmos_rtc.rtc->irq_freq = 1024;
681 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
682 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
683
684 /* disable irqs */
685 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
686
687 rtc_control = CMOS_READ(RTC_CONTROL);
688
689 spin_unlock_irq(&rtc_lock);
690
691 /* FIXME:
692 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
693 */
694 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
695 dev_warn(dev, "only 24-hr supported\n");
696 retval = -ENXIO;
697 goto cleanup1;
698 }
699
700 if (is_valid_irq(rtc_irq)) {
701 irq_handler_t rtc_cmos_int_handler;
702
703 if (is_hpet_enabled()) {
704 int err;
705
706 rtc_cmos_int_handler = hpet_rtc_interrupt;
707 err = hpet_register_irq_handler(cmos_interrupt);
708 if (err != 0) {
709 printk(KERN_WARNING "hpet_register_irq_handler "
710 " failed in rtc_init().");
711 goto cleanup1;
712 }
713 } else
714 rtc_cmos_int_handler = cmos_interrupt;
715
716 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
717 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
718 cmos_rtc.rtc);
719 if (retval < 0) {
720 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
721 goto cleanup1;
722 }
723 }
724 hpet_rtc_timer_init();
725
726 /* export at least the first block of NVRAM */
727 nvram.size = address_space - NVRAM_OFFSET;
728 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
729 if (retval < 0) {
730 dev_dbg(dev, "can't create nvram file? %d\n", retval);
731 goto cleanup2;
732 }
733
734 pr_info("%s: %s%s, %zd bytes nvram%s\n",
735 dev_name(&cmos_rtc.rtc->dev),
736 !is_valid_irq(rtc_irq) ? "no alarms" :
737 cmos_rtc.mon_alrm ? "alarms up to one year" :
738 cmos_rtc.day_alrm ? "alarms up to one month" :
739 "alarms up to one day",
740 cmos_rtc.century ? ", y3k" : "",
741 nvram.size,
742 is_hpet_enabled() ? ", hpet irqs" : "");
743
744 return 0;
745
746cleanup2:
747 if (is_valid_irq(rtc_irq))
748 free_irq(rtc_irq, cmos_rtc.rtc);
749cleanup1:
750 cmos_rtc.dev = NULL;
751 rtc_device_unregister(cmos_rtc.rtc);
752cleanup0:
753 release_region(ports->start, resource_size(ports));
754 return retval;
755}
756
757static void cmos_do_shutdown(void)
758{
759 spin_lock_irq(&rtc_lock);
760 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
761 spin_unlock_irq(&rtc_lock);
762}
763
764static void __exit cmos_do_remove(struct device *dev)
765{
766 struct cmos_rtc *cmos = dev_get_drvdata(dev);
767 struct resource *ports;
768
769 cmos_do_shutdown();
770
771 sysfs_remove_bin_file(&dev->kobj, &nvram);
772
773 if (is_valid_irq(cmos->irq)) {
774 free_irq(cmos->irq, cmos->rtc);
775 hpet_unregister_irq_handler(cmos_interrupt);
776 }
777
778 rtc_device_unregister(cmos->rtc);
779 cmos->rtc = NULL;
780
781 ports = cmos->iomem;
782 release_region(ports->start, resource_size(ports));
783 cmos->iomem = NULL;
784
785 cmos->dev = NULL;
786 dev_set_drvdata(dev, NULL);
787}
788
789#ifdef CONFIG_PM
790
791static int cmos_suspend(struct device *dev)
792{
793 struct cmos_rtc *cmos = dev_get_drvdata(dev);
794 unsigned char tmp;
795
796 /* only the alarm might be a wakeup event source */
797 spin_lock_irq(&rtc_lock);
798 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
799 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
800 unsigned char mask;
801
802 if (device_may_wakeup(dev))
803 mask = RTC_IRQMASK & ~RTC_AIE;
804 else
805 mask = RTC_IRQMASK;
806 tmp &= ~mask;
807 CMOS_WRITE(tmp, RTC_CONTROL);
808
809 /* shut down hpet emulation - we don't need it for alarm */
810 hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
811 cmos_checkintr(cmos, tmp);
812 }
813 spin_unlock_irq(&rtc_lock);
814
815 if (tmp & RTC_AIE) {
816 cmos->enabled_wake = 1;
817 if (cmos->wake_on)
818 cmos->wake_on(dev);
819 else
820 enable_irq_wake(cmos->irq);
821 }
822
823 pr_debug("%s: suspend%s, ctrl %02x\n",
824 dev_name(&cmos_rtc.rtc->dev),
825 (tmp & RTC_AIE) ? ", alarm may wake" : "",
826 tmp);
827
828 return 0;
829}
830
831/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
832 * after a detour through G3 "mechanical off", although the ACPI spec
833 * says wakeup should only work from G1/S4 "hibernate". To most users,
834 * distinctions between S4 and S5 are pointless. So when the hardware
835 * allows, don't draw that distinction.
836 */
837static inline int cmos_poweroff(struct device *dev)
838{
839 return cmos_suspend(dev);
840}
841
842static int cmos_resume(struct device *dev)
843{
844 struct cmos_rtc *cmos = dev_get_drvdata(dev);
845 unsigned char tmp = cmos->suspend_ctrl;
846
847 /* re-enable any irqs previously active */
848 if (tmp & RTC_IRQMASK) {
849 unsigned char mask;
850
851 if (cmos->enabled_wake) {
852 if (cmos->wake_off)
853 cmos->wake_off(dev);
854 else
855 disable_irq_wake(cmos->irq);
856 cmos->enabled_wake = 0;
857 }
858
859 spin_lock_irq(&rtc_lock);
860 do {
861 CMOS_WRITE(tmp, RTC_CONTROL);
862 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
863
864 mask = CMOS_READ(RTC_INTR_FLAGS);
865 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
866 if (!is_hpet_enabled() || !is_intr(mask))
867 break;
868
869 /* force one-shot behavior if HPET blocked
870 * the wake alarm's irq
871 */
872 rtc_update_irq(cmos->rtc, 1, mask);
873 tmp &= ~RTC_AIE;
874 hpet_mask_rtc_irq_bit(RTC_AIE);
875 } while (mask & RTC_AIE);
876 spin_unlock_irq(&rtc_lock);
877 }
878
879 pr_debug("%s: resume, ctrl %02x\n",
880 dev_name(&cmos_rtc.rtc->dev),
881 tmp);
882
883 return 0;
884}
885
886static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
887
888#else
889
890static inline int cmos_poweroff(struct device *dev)
891{
892 return -ENOSYS;
893}
894
895#endif
896
897/*----------------------------------------------------------------*/
898
899/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
900 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
901 * probably list them in similar PNPBIOS tables; so PNP is more common.
902 *
903 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
904 * predate even PNPBIOS should set up platform_bus devices.
905 */
906
907#ifdef CONFIG_ACPI
908
909#include <linux/acpi.h>
910
911static u32 rtc_handler(void *context)
912{
913 acpi_clear_event(ACPI_EVENT_RTC);
914 acpi_disable_event(ACPI_EVENT_RTC, 0);
915 return ACPI_INTERRUPT_HANDLED;
916}
917
918static inline void rtc_wake_setup(void)
919{
920 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
921 /*
922 * After the RTC handler is installed, the Fixed_RTC event should
923 * be disabled. Only when the RTC alarm is set will it be enabled.
924 */
925 acpi_clear_event(ACPI_EVENT_RTC);
926 acpi_disable_event(ACPI_EVENT_RTC, 0);
927}
928
929static void rtc_wake_on(struct device *dev)
930{
931 acpi_clear_event(ACPI_EVENT_RTC);
932 acpi_enable_event(ACPI_EVENT_RTC, 0);
933}
934
935static void rtc_wake_off(struct device *dev)
936{
937 acpi_disable_event(ACPI_EVENT_RTC, 0);
938}
939
940/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
941 * its device node and pass extra config data. This helps its driver use
942 * capabilities that the now-obsolete mc146818 didn't have, and informs it
943 * that this board's RTC is wakeup-capable (per ACPI spec).
944 */
945static struct cmos_rtc_board_info acpi_rtc_info;
946
947static void __devinit
948cmos_wake_setup(struct device *dev)
949{
950 if (acpi_disabled)
951 return;
952
953 rtc_wake_setup();
954 acpi_rtc_info.wake_on = rtc_wake_on;
955 acpi_rtc_info.wake_off = rtc_wake_off;
956
957 /* workaround bug in some ACPI tables */
958 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
959 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
960 acpi_gbl_FADT.month_alarm);
961 acpi_gbl_FADT.month_alarm = 0;
962 }
963
964 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
965 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
966 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
967
968 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
969 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
970 dev_info(dev, "RTC can wake from S4\n");
971
972 dev->platform_data = &acpi_rtc_info;
973
974 /* RTC always wakes from S1/S2/S3, and often S4/STD */
975 device_init_wakeup(dev, 1);
976}
977
978#else
979
980static void __devinit
981cmos_wake_setup(struct device *dev)
982{
983}
984
985#endif
986
987#ifdef CONFIG_PNP
988
989#include <linux/pnp.h>
990
991static int __devinit
992cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
993{
994 cmos_wake_setup(&pnp->dev);
995
996 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
997 /* Some machines contain a PNP entry for the RTC, but
998 * don't define the IRQ. It should always be safe to
999 * hardcode it in these cases
1000 */
1001 return cmos_do_probe(&pnp->dev,
1002 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1003 else
1004 return cmos_do_probe(&pnp->dev,
1005 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1006 pnp_irq(pnp, 0));
1007}
1008
1009static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1010{
1011 cmos_do_remove(&pnp->dev);
1012}
1013
1014#ifdef CONFIG_PM
1015
1016static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1017{
1018 return cmos_suspend(&pnp->dev);
1019}
1020
1021static int cmos_pnp_resume(struct pnp_dev *pnp)
1022{
1023 return cmos_resume(&pnp->dev);
1024}
1025
1026#else
1027#define cmos_pnp_suspend NULL
1028#define cmos_pnp_resume NULL
1029#endif
1030
1031static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1032{
1033 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1034 return;
1035
1036 cmos_do_shutdown();
1037}
1038
1039static const struct pnp_device_id rtc_ids[] = {
1040 { .id = "PNP0b00", },
1041 { .id = "PNP0b01", },
1042 { .id = "PNP0b02", },
1043 { },
1044};
1045MODULE_DEVICE_TABLE(pnp, rtc_ids);
1046
1047static struct pnp_driver cmos_pnp_driver = {
1048 .name = (char *) driver_name,
1049 .id_table = rtc_ids,
1050 .probe = cmos_pnp_probe,
1051 .remove = __exit_p(cmos_pnp_remove),
1052 .shutdown = cmos_pnp_shutdown,
1053
1054 /* flag ensures resume() gets called, and stops syslog spam */
1055 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1056 .suspend = cmos_pnp_suspend,
1057 .resume = cmos_pnp_resume,
1058};
1059
1060#endif /* CONFIG_PNP */
1061
1062#ifdef CONFIG_OF
1063static const struct of_device_id of_cmos_match[] = {
1064 {
1065 .compatible = "motorola,mc146818",
1066 },
1067 { },
1068};
1069MODULE_DEVICE_TABLE(of, of_cmos_match);
1070
1071static __init void cmos_of_init(struct platform_device *pdev)
1072{
1073 struct device_node *node = pdev->dev.of_node;
1074 struct rtc_time time;
1075 int ret;
1076 const __be32 *val;
1077
1078 if (!node)
1079 return;
1080
1081 val = of_get_property(node, "ctrl-reg", NULL);
1082 if (val)
1083 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1084
1085 val = of_get_property(node, "freq-reg", NULL);
1086 if (val)
1087 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1088
1089 get_rtc_time(&time);
1090 ret = rtc_valid_tm(&time);
1091 if (ret) {
1092 struct rtc_time def_time = {
1093 .tm_year = 1,
1094 .tm_mday = 1,
1095 };
1096 set_rtc_time(&def_time);
1097 }
1098}
1099#else
1100static inline void cmos_of_init(struct platform_device *pdev) {}
1101#define of_cmos_match NULL
1102#endif
1103/*----------------------------------------------------------------*/
1104
1105/* Platform setup should have set up an RTC device, when PNP is
1106 * unavailable ... this could happen even on (older) PCs.
1107 */
1108
1109static int __init cmos_platform_probe(struct platform_device *pdev)
1110{
1111 cmos_of_init(pdev);
1112 cmos_wake_setup(&pdev->dev);
1113 return cmos_do_probe(&pdev->dev,
1114 platform_get_resource(pdev, IORESOURCE_IO, 0),
1115 platform_get_irq(pdev, 0));
1116}
1117
1118static int __exit cmos_platform_remove(struct platform_device *pdev)
1119{
1120 cmos_do_remove(&pdev->dev);
1121 return 0;
1122}
1123
1124static void cmos_platform_shutdown(struct platform_device *pdev)
1125{
1126 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1127 return;
1128
1129 cmos_do_shutdown();
1130}
1131
1132/* work with hotplug and coldplug */
1133MODULE_ALIAS("platform:rtc_cmos");
1134
1135static struct platform_driver cmos_platform_driver = {
1136 .remove = __exit_p(cmos_platform_remove),
1137 .shutdown = cmos_platform_shutdown,
1138 .driver = {
1139 .name = (char *) driver_name,
1140#ifdef CONFIG_PM
1141 .pm = &cmos_pm_ops,
1142#endif
1143 .of_match_table = of_cmos_match,
1144 }
1145};
1146
1147#ifdef CONFIG_PNP
1148static bool pnp_driver_registered;
1149#endif
1150static bool platform_driver_registered;
1151
1152static int __init cmos_init(void)
1153{
1154 int retval = 0;
1155
1156#ifdef CONFIG_PNP
1157 retval = pnp_register_driver(&cmos_pnp_driver);
1158 if (retval == 0)
1159 pnp_driver_registered = true;
1160#endif
1161
1162 if (!cmos_rtc.dev) {
1163 retval = platform_driver_probe(&cmos_platform_driver,
1164 cmos_platform_probe);
1165 if (retval == 0)
1166 platform_driver_registered = true;
1167 }
1168
1169 if (retval == 0)
1170 return 0;
1171
1172#ifdef CONFIG_PNP
1173 if (pnp_driver_registered)
1174 pnp_unregister_driver(&cmos_pnp_driver);
1175#endif
1176 return retval;
1177}
1178module_init(cmos_init);
1179
1180static void __exit cmos_exit(void)
1181{
1182#ifdef CONFIG_PNP
1183 if (pnp_driver_registered)
1184 pnp_unregister_driver(&cmos_pnp_driver);
1185#endif
1186 if (platform_driver_registered)
1187 platform_driver_unregister(&cmos_platform_driver);
1188}
1189module_exit(cmos_exit);
1190
1191
1192MODULE_AUTHOR("David Brownell");
1193MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1194MODULE_LICENSE("GPL");
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <linux/spinlock.h>
39#include <linux/platform_device.h>
40#include <linux/log2.h>
41#include <linux/pm.h>
42#include <linux/of.h>
43#include <linux/of_platform.h>
44
45/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
46#include <linux/mc146818rtc.h>
47
48struct cmos_rtc {
49 struct rtc_device *rtc;
50 struct device *dev;
51 int irq;
52 struct resource *iomem;
53 time64_t alarm_expires;
54
55 void (*wake_on)(struct device *);
56 void (*wake_off)(struct device *);
57
58 u8 enabled_wake;
59 u8 suspend_ctrl;
60
61 /* newer hardware extends the original register set */
62 u8 day_alrm;
63 u8 mon_alrm;
64 u8 century;
65
66 struct rtc_wkalrm saved_wkalrm;
67};
68
69/* both platform and pnp busses use negative numbers for invalid irqs */
70#define is_valid_irq(n) ((n) > 0)
71
72static const char driver_name[] = "rtc_cmos";
73
74/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
75 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
76 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
77 */
78#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
79
80static inline int is_intr(u8 rtc_intr)
81{
82 if (!(rtc_intr & RTC_IRQF))
83 return 0;
84 return rtc_intr & RTC_IRQMASK;
85}
86
87/*----------------------------------------------------------------*/
88
89/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
90 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
91 * used in a broken "legacy replacement" mode. The breakage includes
92 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
93 * other (better) use.
94 *
95 * When that broken mode is in use, platform glue provides a partial
96 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
97 * want to use HPET for anything except those IRQs though...
98 */
99#ifdef CONFIG_HPET_EMULATE_RTC
100#include <asm/hpet.h>
101#else
102
103static inline int is_hpet_enabled(void)
104{
105 return 0;
106}
107
108static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
109{
110 return 0;
111}
112
113static inline int hpet_set_rtc_irq_bit(unsigned long mask)
114{
115 return 0;
116}
117
118static inline int
119hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
120{
121 return 0;
122}
123
124static inline int hpet_set_periodic_freq(unsigned long freq)
125{
126 return 0;
127}
128
129static inline int hpet_rtc_dropped_irq(void)
130{
131 return 0;
132}
133
134static inline int hpet_rtc_timer_init(void)
135{
136 return 0;
137}
138
139extern irq_handler_t hpet_rtc_interrupt;
140
141static inline int hpet_register_irq_handler(irq_handler_t handler)
142{
143 return 0;
144}
145
146static inline int hpet_unregister_irq_handler(irq_handler_t handler)
147{
148 return 0;
149}
150
151#endif
152
153/*----------------------------------------------------------------*/
154
155#ifdef RTC_PORT
156
157/* Most newer x86 systems have two register banks, the first used
158 * for RTC and NVRAM and the second only for NVRAM. Caller must
159 * own rtc_lock ... and we won't worry about access during NMI.
160 */
161#define can_bank2 true
162
163static inline unsigned char cmos_read_bank2(unsigned char addr)
164{
165 outb(addr, RTC_PORT(2));
166 return inb(RTC_PORT(3));
167}
168
169static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
170{
171 outb(addr, RTC_PORT(2));
172 outb(val, RTC_PORT(3));
173}
174
175#else
176
177#define can_bank2 false
178
179static inline unsigned char cmos_read_bank2(unsigned char addr)
180{
181 return 0;
182}
183
184static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
185{
186}
187
188#endif
189
190/*----------------------------------------------------------------*/
191
192static int cmos_read_time(struct device *dev, struct rtc_time *t)
193{
194 /*
195 * If pm_trace abused the RTC for storage, set the timespec to 0,
196 * which tells the caller that this RTC value is unusable.
197 */
198 if (!pm_trace_rtc_valid())
199 return -EIO;
200
201 /* REVISIT: if the clock has a "century" register, use
202 * that instead of the heuristic in mc146818_get_time().
203 * That'll make Y3K compatility (year > 2070) easy!
204 */
205 mc146818_get_time(t);
206 return 0;
207}
208
209static int cmos_set_time(struct device *dev, struct rtc_time *t)
210{
211 /* REVISIT: set the "century" register if available
212 *
213 * NOTE: this ignores the issue whereby updating the seconds
214 * takes effect exactly 500ms after we write the register.
215 * (Also queueing and other delays before we get this far.)
216 */
217 return mc146818_set_time(t);
218}
219
220static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
221{
222 struct cmos_rtc *cmos = dev_get_drvdata(dev);
223 unsigned char rtc_control;
224
225 if (!is_valid_irq(cmos->irq))
226 return -EIO;
227
228 /* Basic alarms only support hour, minute, and seconds fields.
229 * Some also support day and month, for alarms up to a year in
230 * the future.
231 */
232
233 spin_lock_irq(&rtc_lock);
234 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
235 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
236 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
237
238 if (cmos->day_alrm) {
239 /* ignore upper bits on readback per ACPI spec */
240 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
241 if (!t->time.tm_mday)
242 t->time.tm_mday = -1;
243
244 if (cmos->mon_alrm) {
245 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
246 if (!t->time.tm_mon)
247 t->time.tm_mon = -1;
248 }
249 }
250
251 rtc_control = CMOS_READ(RTC_CONTROL);
252 spin_unlock_irq(&rtc_lock);
253
254 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
255 if (((unsigned)t->time.tm_sec) < 0x60)
256 t->time.tm_sec = bcd2bin(t->time.tm_sec);
257 else
258 t->time.tm_sec = -1;
259 if (((unsigned)t->time.tm_min) < 0x60)
260 t->time.tm_min = bcd2bin(t->time.tm_min);
261 else
262 t->time.tm_min = -1;
263 if (((unsigned)t->time.tm_hour) < 0x24)
264 t->time.tm_hour = bcd2bin(t->time.tm_hour);
265 else
266 t->time.tm_hour = -1;
267
268 if (cmos->day_alrm) {
269 if (((unsigned)t->time.tm_mday) <= 0x31)
270 t->time.tm_mday = bcd2bin(t->time.tm_mday);
271 else
272 t->time.tm_mday = -1;
273
274 if (cmos->mon_alrm) {
275 if (((unsigned)t->time.tm_mon) <= 0x12)
276 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
277 else
278 t->time.tm_mon = -1;
279 }
280 }
281 }
282
283 t->enabled = !!(rtc_control & RTC_AIE);
284 t->pending = 0;
285
286 return 0;
287}
288
289static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
290{
291 unsigned char rtc_intr;
292
293 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
294 * allegedly some older rtcs need that to handle irqs properly
295 */
296 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
297
298 if (is_hpet_enabled())
299 return;
300
301 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
302 if (is_intr(rtc_intr))
303 rtc_update_irq(cmos->rtc, 1, rtc_intr);
304}
305
306static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
307{
308 unsigned char rtc_control;
309
310 /* flush any pending IRQ status, notably for update irqs,
311 * before we enable new IRQs
312 */
313 rtc_control = CMOS_READ(RTC_CONTROL);
314 cmos_checkintr(cmos, rtc_control);
315
316 rtc_control |= mask;
317 CMOS_WRITE(rtc_control, RTC_CONTROL);
318 hpet_set_rtc_irq_bit(mask);
319
320 cmos_checkintr(cmos, rtc_control);
321}
322
323static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
324{
325 unsigned char rtc_control;
326
327 rtc_control = CMOS_READ(RTC_CONTROL);
328 rtc_control &= ~mask;
329 CMOS_WRITE(rtc_control, RTC_CONTROL);
330 hpet_mask_rtc_irq_bit(mask);
331
332 cmos_checkintr(cmos, rtc_control);
333}
334
335static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
336{
337 struct cmos_rtc *cmos = dev_get_drvdata(dev);
338 struct rtc_time now;
339
340 cmos_read_time(dev, &now);
341
342 if (!cmos->day_alrm) {
343 time64_t t_max_date;
344 time64_t t_alrm;
345
346 t_max_date = rtc_tm_to_time64(&now);
347 t_max_date += 24 * 60 * 60 - 1;
348 t_alrm = rtc_tm_to_time64(&t->time);
349 if (t_alrm > t_max_date) {
350 dev_err(dev,
351 "Alarms can be up to one day in the future\n");
352 return -EINVAL;
353 }
354 } else if (!cmos->mon_alrm) {
355 struct rtc_time max_date = now;
356 time64_t t_max_date;
357 time64_t t_alrm;
358 int max_mday;
359
360 if (max_date.tm_mon == 11) {
361 max_date.tm_mon = 0;
362 max_date.tm_year += 1;
363 } else {
364 max_date.tm_mon += 1;
365 }
366 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
367 if (max_date.tm_mday > max_mday)
368 max_date.tm_mday = max_mday;
369
370 t_max_date = rtc_tm_to_time64(&max_date);
371 t_max_date -= 1;
372 t_alrm = rtc_tm_to_time64(&t->time);
373 if (t_alrm > t_max_date) {
374 dev_err(dev,
375 "Alarms can be up to one month in the future\n");
376 return -EINVAL;
377 }
378 } else {
379 struct rtc_time max_date = now;
380 time64_t t_max_date;
381 time64_t t_alrm;
382 int max_mday;
383
384 max_date.tm_year += 1;
385 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
386 if (max_date.tm_mday > max_mday)
387 max_date.tm_mday = max_mday;
388
389 t_max_date = rtc_tm_to_time64(&max_date);
390 t_max_date -= 1;
391 t_alrm = rtc_tm_to_time64(&t->time);
392 if (t_alrm > t_max_date) {
393 dev_err(dev,
394 "Alarms can be up to one year in the future\n");
395 return -EINVAL;
396 }
397 }
398
399 return 0;
400}
401
402static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
403{
404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
405 unsigned char mon, mday, hrs, min, sec, rtc_control;
406 int ret;
407
408 if (!is_valid_irq(cmos->irq))
409 return -EIO;
410
411 ret = cmos_validate_alarm(dev, t);
412 if (ret < 0)
413 return ret;
414
415 mon = t->time.tm_mon + 1;
416 mday = t->time.tm_mday;
417 hrs = t->time.tm_hour;
418 min = t->time.tm_min;
419 sec = t->time.tm_sec;
420
421 rtc_control = CMOS_READ(RTC_CONTROL);
422 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
423 /* Writing 0xff means "don't care" or "match all". */
424 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
425 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
426 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
427 min = (min < 60) ? bin2bcd(min) : 0xff;
428 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
429 }
430
431 spin_lock_irq(&rtc_lock);
432
433 /* next rtc irq must not be from previous alarm setting */
434 cmos_irq_disable(cmos, RTC_AIE);
435
436 /* update alarm */
437 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
438 CMOS_WRITE(min, RTC_MINUTES_ALARM);
439 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
440
441 /* the system may support an "enhanced" alarm */
442 if (cmos->day_alrm) {
443 CMOS_WRITE(mday, cmos->day_alrm);
444 if (cmos->mon_alrm)
445 CMOS_WRITE(mon, cmos->mon_alrm);
446 }
447
448 /* FIXME the HPET alarm glue currently ignores day_alrm
449 * and mon_alrm ...
450 */
451 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
452
453 if (t->enabled)
454 cmos_irq_enable(cmos, RTC_AIE);
455
456 spin_unlock_irq(&rtc_lock);
457
458 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
459
460 return 0;
461}
462
463static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
464{
465 struct cmos_rtc *cmos = dev_get_drvdata(dev);
466 unsigned long flags;
467
468 if (!is_valid_irq(cmos->irq))
469 return -EINVAL;
470
471 spin_lock_irqsave(&rtc_lock, flags);
472
473 if (enabled)
474 cmos_irq_enable(cmos, RTC_AIE);
475 else
476 cmos_irq_disable(cmos, RTC_AIE);
477
478 spin_unlock_irqrestore(&rtc_lock, flags);
479 return 0;
480}
481
482#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
483
484static int cmos_procfs(struct device *dev, struct seq_file *seq)
485{
486 struct cmos_rtc *cmos = dev_get_drvdata(dev);
487 unsigned char rtc_control, valid;
488
489 spin_lock_irq(&rtc_lock);
490 rtc_control = CMOS_READ(RTC_CONTROL);
491 valid = CMOS_READ(RTC_VALID);
492 spin_unlock_irq(&rtc_lock);
493
494 /* NOTE: at least ICH6 reports battery status using a different
495 * (non-RTC) bit; and SQWE is ignored on many current systems.
496 */
497 seq_printf(seq,
498 "periodic_IRQ\t: %s\n"
499 "update_IRQ\t: %s\n"
500 "HPET_emulated\t: %s\n"
501 // "square_wave\t: %s\n"
502 "BCD\t\t: %s\n"
503 "DST_enable\t: %s\n"
504 "periodic_freq\t: %d\n"
505 "batt_status\t: %s\n",
506 (rtc_control & RTC_PIE) ? "yes" : "no",
507 (rtc_control & RTC_UIE) ? "yes" : "no",
508 is_hpet_enabled() ? "yes" : "no",
509 // (rtc_control & RTC_SQWE) ? "yes" : "no",
510 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
511 (rtc_control & RTC_DST_EN) ? "yes" : "no",
512 cmos->rtc->irq_freq,
513 (valid & RTC_VRT) ? "okay" : "dead");
514
515 return 0;
516}
517
518#else
519#define cmos_procfs NULL
520#endif
521
522static const struct rtc_class_ops cmos_rtc_ops = {
523 .read_time = cmos_read_time,
524 .set_time = cmos_set_time,
525 .read_alarm = cmos_read_alarm,
526 .set_alarm = cmos_set_alarm,
527 .proc = cmos_procfs,
528 .alarm_irq_enable = cmos_alarm_irq_enable,
529};
530
531/*----------------------------------------------------------------*/
532
533/*
534 * All these chips have at least 64 bytes of address space, shared by
535 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
536 * by boot firmware. Modern chips have 128 or 256 bytes.
537 */
538
539#define NVRAM_OFFSET (RTC_REG_D + 1)
540
541static ssize_t
542cmos_nvram_read(struct file *filp, struct kobject *kobj,
543 struct bin_attribute *attr,
544 char *buf, loff_t off, size_t count)
545{
546 int retval;
547
548 off += NVRAM_OFFSET;
549 spin_lock_irq(&rtc_lock);
550 for (retval = 0; count; count--, off++, retval++) {
551 if (off < 128)
552 *buf++ = CMOS_READ(off);
553 else if (can_bank2)
554 *buf++ = cmos_read_bank2(off);
555 else
556 break;
557 }
558 spin_unlock_irq(&rtc_lock);
559
560 return retval;
561}
562
563static ssize_t
564cmos_nvram_write(struct file *filp, struct kobject *kobj,
565 struct bin_attribute *attr,
566 char *buf, loff_t off, size_t count)
567{
568 struct cmos_rtc *cmos;
569 int retval;
570
571 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
572
573 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
574 * checksum on part of the NVRAM data. That's currently ignored
575 * here. If userspace is smart enough to know what fields of
576 * NVRAM to update, updating checksums is also part of its job.
577 */
578 off += NVRAM_OFFSET;
579 spin_lock_irq(&rtc_lock);
580 for (retval = 0; count; count--, off++, retval++) {
581 /* don't trash RTC registers */
582 if (off == cmos->day_alrm
583 || off == cmos->mon_alrm
584 || off == cmos->century)
585 buf++;
586 else if (off < 128)
587 CMOS_WRITE(*buf++, off);
588 else if (can_bank2)
589 cmos_write_bank2(*buf++, off);
590 else
591 break;
592 }
593 spin_unlock_irq(&rtc_lock);
594
595 return retval;
596}
597
598static struct bin_attribute nvram = {
599 .attr = {
600 .name = "nvram",
601 .mode = S_IRUGO | S_IWUSR,
602 },
603
604 .read = cmos_nvram_read,
605 .write = cmos_nvram_write,
606 /* size gets set up later */
607};
608
609/*----------------------------------------------------------------*/
610
611static struct cmos_rtc cmos_rtc;
612
613static irqreturn_t cmos_interrupt(int irq, void *p)
614{
615 u8 irqstat;
616 u8 rtc_control;
617
618 spin_lock(&rtc_lock);
619
620 /* When the HPET interrupt handler calls us, the interrupt
621 * status is passed as arg1 instead of the irq number. But
622 * always clear irq status, even when HPET is in the way.
623 *
624 * Note that HPET and RTC are almost certainly out of phase,
625 * giving different IRQ status ...
626 */
627 irqstat = CMOS_READ(RTC_INTR_FLAGS);
628 rtc_control = CMOS_READ(RTC_CONTROL);
629 if (is_hpet_enabled())
630 irqstat = (unsigned long)irq & 0xF0;
631
632 /* If we were suspended, RTC_CONTROL may not be accurate since the
633 * bios may have cleared it.
634 */
635 if (!cmos_rtc.suspend_ctrl)
636 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
637 else
638 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
639
640 /* All Linux RTC alarms should be treated as if they were oneshot.
641 * Similar code may be needed in system wakeup paths, in case the
642 * alarm woke the system.
643 */
644 if (irqstat & RTC_AIE) {
645 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
646 rtc_control &= ~RTC_AIE;
647 CMOS_WRITE(rtc_control, RTC_CONTROL);
648 hpet_mask_rtc_irq_bit(RTC_AIE);
649 CMOS_READ(RTC_INTR_FLAGS);
650 }
651 spin_unlock(&rtc_lock);
652
653 if (is_intr(irqstat)) {
654 rtc_update_irq(p, 1, irqstat);
655 return IRQ_HANDLED;
656 } else
657 return IRQ_NONE;
658}
659
660#ifdef CONFIG_PNP
661#define INITSECTION
662
663#else
664#define INITSECTION __init
665#endif
666
667static int INITSECTION
668cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
669{
670 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
671 int retval = 0;
672 unsigned char rtc_control;
673 unsigned address_space;
674 u32 flags = 0;
675
676 /* there can be only one ... */
677 if (cmos_rtc.dev)
678 return -EBUSY;
679
680 if (!ports)
681 return -ENODEV;
682
683 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
684 *
685 * REVISIT non-x86 systems may instead use memory space resources
686 * (needing ioremap etc), not i/o space resources like this ...
687 */
688 if (RTC_IOMAPPED)
689 ports = request_region(ports->start, resource_size(ports),
690 driver_name);
691 else
692 ports = request_mem_region(ports->start, resource_size(ports),
693 driver_name);
694 if (!ports) {
695 dev_dbg(dev, "i/o registers already in use\n");
696 return -EBUSY;
697 }
698
699 cmos_rtc.irq = rtc_irq;
700 cmos_rtc.iomem = ports;
701
702 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
703 * driver did, but don't reject unknown configs. Old hardware
704 * won't address 128 bytes. Newer chips have multiple banks,
705 * though they may not be listed in one I/O resource.
706 */
707#if defined(CONFIG_ATARI)
708 address_space = 64;
709#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
710 || defined(__sparc__) || defined(__mips__) \
711 || defined(__powerpc__) || defined(CONFIG_MN10300)
712 address_space = 128;
713#else
714#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
715 address_space = 128;
716#endif
717 if (can_bank2 && ports->end > (ports->start + 1))
718 address_space = 256;
719
720 /* For ACPI systems extension info comes from the FADT. On others,
721 * board specific setup provides it as appropriate. Systems where
722 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
723 * some almost-clones) can provide hooks to make that behave.
724 *
725 * Note that ACPI doesn't preclude putting these registers into
726 * "extended" areas of the chip, including some that we won't yet
727 * expect CMOS_READ and friends to handle.
728 */
729 if (info) {
730 if (info->flags)
731 flags = info->flags;
732 if (info->address_space)
733 address_space = info->address_space;
734
735 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
736 cmos_rtc.day_alrm = info->rtc_day_alarm;
737 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
738 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
739 if (info->rtc_century && info->rtc_century < 128)
740 cmos_rtc.century = info->rtc_century;
741
742 if (info->wake_on && info->wake_off) {
743 cmos_rtc.wake_on = info->wake_on;
744 cmos_rtc.wake_off = info->wake_off;
745 }
746 }
747
748 cmos_rtc.dev = dev;
749 dev_set_drvdata(dev, &cmos_rtc);
750
751 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
752 &cmos_rtc_ops, THIS_MODULE);
753 if (IS_ERR(cmos_rtc.rtc)) {
754 retval = PTR_ERR(cmos_rtc.rtc);
755 goto cleanup0;
756 }
757
758 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
759
760 spin_lock_irq(&rtc_lock);
761
762 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
763 /* force periodic irq to CMOS reset default of 1024Hz;
764 *
765 * REVISIT it's been reported that at least one x86_64 ALI
766 * mobo doesn't use 32KHz here ... for portability we might
767 * need to do something about other clock frequencies.
768 */
769 cmos_rtc.rtc->irq_freq = 1024;
770 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
771 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
772 }
773
774 /* disable irqs */
775 if (is_valid_irq(rtc_irq))
776 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
777
778 rtc_control = CMOS_READ(RTC_CONTROL);
779
780 spin_unlock_irq(&rtc_lock);
781
782 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
783 dev_warn(dev, "only 24-hr supported\n");
784 retval = -ENXIO;
785 goto cleanup1;
786 }
787
788 hpet_rtc_timer_init();
789
790 if (is_valid_irq(rtc_irq)) {
791 irq_handler_t rtc_cmos_int_handler;
792
793 if (is_hpet_enabled()) {
794 rtc_cmos_int_handler = hpet_rtc_interrupt;
795 retval = hpet_register_irq_handler(cmos_interrupt);
796 if (retval) {
797 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
798 dev_warn(dev, "hpet_register_irq_handler "
799 " failed in rtc_init().");
800 goto cleanup1;
801 }
802 } else
803 rtc_cmos_int_handler = cmos_interrupt;
804
805 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
806 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
807 cmos_rtc.rtc);
808 if (retval < 0) {
809 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
810 goto cleanup1;
811 }
812 }
813
814 /* export at least the first block of NVRAM */
815 nvram.size = address_space - NVRAM_OFFSET;
816 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
817 if (retval < 0) {
818 dev_dbg(dev, "can't create nvram file? %d\n", retval);
819 goto cleanup2;
820 }
821
822 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
823 !is_valid_irq(rtc_irq) ? "no alarms" :
824 cmos_rtc.mon_alrm ? "alarms up to one year" :
825 cmos_rtc.day_alrm ? "alarms up to one month" :
826 "alarms up to one day",
827 cmos_rtc.century ? ", y3k" : "",
828 nvram.size,
829 is_hpet_enabled() ? ", hpet irqs" : "");
830
831 return 0;
832
833cleanup2:
834 if (is_valid_irq(rtc_irq))
835 free_irq(rtc_irq, cmos_rtc.rtc);
836cleanup1:
837 cmos_rtc.dev = NULL;
838 rtc_device_unregister(cmos_rtc.rtc);
839cleanup0:
840 if (RTC_IOMAPPED)
841 release_region(ports->start, resource_size(ports));
842 else
843 release_mem_region(ports->start, resource_size(ports));
844 return retval;
845}
846
847static void cmos_do_shutdown(int rtc_irq)
848{
849 spin_lock_irq(&rtc_lock);
850 if (is_valid_irq(rtc_irq))
851 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
852 spin_unlock_irq(&rtc_lock);
853}
854
855static void cmos_do_remove(struct device *dev)
856{
857 struct cmos_rtc *cmos = dev_get_drvdata(dev);
858 struct resource *ports;
859
860 cmos_do_shutdown(cmos->irq);
861
862 sysfs_remove_bin_file(&dev->kobj, &nvram);
863
864 if (is_valid_irq(cmos->irq)) {
865 free_irq(cmos->irq, cmos->rtc);
866 hpet_unregister_irq_handler(cmos_interrupt);
867 }
868
869 rtc_device_unregister(cmos->rtc);
870 cmos->rtc = NULL;
871
872 ports = cmos->iomem;
873 if (RTC_IOMAPPED)
874 release_region(ports->start, resource_size(ports));
875 else
876 release_mem_region(ports->start, resource_size(ports));
877 cmos->iomem = NULL;
878
879 cmos->dev = NULL;
880}
881
882static int cmos_aie_poweroff(struct device *dev)
883{
884 struct cmos_rtc *cmos = dev_get_drvdata(dev);
885 struct rtc_time now;
886 time64_t t_now;
887 int retval = 0;
888 unsigned char rtc_control;
889
890 if (!cmos->alarm_expires)
891 return -EINVAL;
892
893 spin_lock_irq(&rtc_lock);
894 rtc_control = CMOS_READ(RTC_CONTROL);
895 spin_unlock_irq(&rtc_lock);
896
897 /* We only care about the situation where AIE is disabled. */
898 if (rtc_control & RTC_AIE)
899 return -EBUSY;
900
901 cmos_read_time(dev, &now);
902 t_now = rtc_tm_to_time64(&now);
903
904 /*
905 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
906 * automatically right after shutdown on some buggy boxes.
907 * This automatic rebooting issue won't happen when the alarm
908 * time is larger than now+1 seconds.
909 *
910 * If the alarm time is equal to now+1 seconds, the issue can be
911 * prevented by cancelling the alarm.
912 */
913 if (cmos->alarm_expires == t_now + 1) {
914 struct rtc_wkalrm alarm;
915
916 /* Cancel the AIE timer by configuring the past time. */
917 rtc_time64_to_tm(t_now - 1, &alarm.time);
918 alarm.enabled = 0;
919 retval = cmos_set_alarm(dev, &alarm);
920 } else if (cmos->alarm_expires > t_now + 1) {
921 retval = -EBUSY;
922 }
923
924 return retval;
925}
926
927static int cmos_suspend(struct device *dev)
928{
929 struct cmos_rtc *cmos = dev_get_drvdata(dev);
930 unsigned char tmp;
931
932 /* only the alarm might be a wakeup event source */
933 spin_lock_irq(&rtc_lock);
934 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
935 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
936 unsigned char mask;
937
938 if (device_may_wakeup(dev))
939 mask = RTC_IRQMASK & ~RTC_AIE;
940 else
941 mask = RTC_IRQMASK;
942 tmp &= ~mask;
943 CMOS_WRITE(tmp, RTC_CONTROL);
944 hpet_mask_rtc_irq_bit(mask);
945
946 cmos_checkintr(cmos, tmp);
947 }
948 spin_unlock_irq(&rtc_lock);
949
950 if (tmp & RTC_AIE) {
951 cmos->enabled_wake = 1;
952 if (cmos->wake_on)
953 cmos->wake_on(dev);
954 else
955 enable_irq_wake(cmos->irq);
956 }
957
958 cmos_read_alarm(dev, &cmos->saved_wkalrm);
959
960 dev_dbg(dev, "suspend%s, ctrl %02x\n",
961 (tmp & RTC_AIE) ? ", alarm may wake" : "",
962 tmp);
963
964 return 0;
965}
966
967/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
968 * after a detour through G3 "mechanical off", although the ACPI spec
969 * says wakeup should only work from G1/S4 "hibernate". To most users,
970 * distinctions between S4 and S5 are pointless. So when the hardware
971 * allows, don't draw that distinction.
972 */
973static inline int cmos_poweroff(struct device *dev)
974{
975 if (!IS_ENABLED(CONFIG_PM))
976 return -ENOSYS;
977
978 return cmos_suspend(dev);
979}
980
981static void cmos_check_wkalrm(struct device *dev)
982{
983 struct cmos_rtc *cmos = dev_get_drvdata(dev);
984 struct rtc_wkalrm current_alarm;
985 time64_t t_current_expires;
986 time64_t t_saved_expires;
987
988 cmos_read_alarm(dev, ¤t_alarm);
989 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
990 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
991 if (t_current_expires != t_saved_expires ||
992 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
993 cmos_set_alarm(dev, &cmos->saved_wkalrm);
994 }
995}
996
997static void cmos_check_acpi_rtc_status(struct device *dev,
998 unsigned char *rtc_control);
999
1000static int __maybe_unused cmos_resume(struct device *dev)
1001{
1002 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1003 unsigned char tmp;
1004
1005 if (cmos->enabled_wake) {
1006 if (cmos->wake_off)
1007 cmos->wake_off(dev);
1008 else
1009 disable_irq_wake(cmos->irq);
1010 cmos->enabled_wake = 0;
1011 }
1012
1013 /* The BIOS might have changed the alarm, restore it */
1014 cmos_check_wkalrm(dev);
1015
1016 spin_lock_irq(&rtc_lock);
1017 tmp = cmos->suspend_ctrl;
1018 cmos->suspend_ctrl = 0;
1019 /* re-enable any irqs previously active */
1020 if (tmp & RTC_IRQMASK) {
1021 unsigned char mask;
1022
1023 if (device_may_wakeup(dev))
1024 hpet_rtc_timer_init();
1025
1026 do {
1027 CMOS_WRITE(tmp, RTC_CONTROL);
1028 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1029
1030 mask = CMOS_READ(RTC_INTR_FLAGS);
1031 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1032 if (!is_hpet_enabled() || !is_intr(mask))
1033 break;
1034
1035 /* force one-shot behavior if HPET blocked
1036 * the wake alarm's irq
1037 */
1038 rtc_update_irq(cmos->rtc, 1, mask);
1039 tmp &= ~RTC_AIE;
1040 hpet_mask_rtc_irq_bit(RTC_AIE);
1041 } while (mask & RTC_AIE);
1042
1043 if (tmp & RTC_AIE)
1044 cmos_check_acpi_rtc_status(dev, &tmp);
1045 }
1046 spin_unlock_irq(&rtc_lock);
1047
1048 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1049
1050 return 0;
1051}
1052
1053static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1054
1055/*----------------------------------------------------------------*/
1056
1057/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1058 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1059 * probably list them in similar PNPBIOS tables; so PNP is more common.
1060 *
1061 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1062 * predate even PNPBIOS should set up platform_bus devices.
1063 */
1064
1065#ifdef CONFIG_ACPI
1066
1067#include <linux/acpi.h>
1068
1069static u32 rtc_handler(void *context)
1070{
1071 struct device *dev = context;
1072 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1073 unsigned char rtc_control = 0;
1074 unsigned char rtc_intr;
1075 unsigned long flags;
1076
1077 spin_lock_irqsave(&rtc_lock, flags);
1078 if (cmos_rtc.suspend_ctrl)
1079 rtc_control = CMOS_READ(RTC_CONTROL);
1080 if (rtc_control & RTC_AIE) {
1081 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1082 CMOS_WRITE(rtc_control, RTC_CONTROL);
1083 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1084 rtc_update_irq(cmos->rtc, 1, rtc_intr);
1085 }
1086 spin_unlock_irqrestore(&rtc_lock, flags);
1087
1088 pm_wakeup_event(dev, 0);
1089 acpi_clear_event(ACPI_EVENT_RTC);
1090 acpi_disable_event(ACPI_EVENT_RTC, 0);
1091 return ACPI_INTERRUPT_HANDLED;
1092}
1093
1094static inline void rtc_wake_setup(struct device *dev)
1095{
1096 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1097 /*
1098 * After the RTC handler is installed, the Fixed_RTC event should
1099 * be disabled. Only when the RTC alarm is set will it be enabled.
1100 */
1101 acpi_clear_event(ACPI_EVENT_RTC);
1102 acpi_disable_event(ACPI_EVENT_RTC, 0);
1103}
1104
1105static void rtc_wake_on(struct device *dev)
1106{
1107 acpi_clear_event(ACPI_EVENT_RTC);
1108 acpi_enable_event(ACPI_EVENT_RTC, 0);
1109}
1110
1111static void rtc_wake_off(struct device *dev)
1112{
1113 acpi_disable_event(ACPI_EVENT_RTC, 0);
1114}
1115
1116/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1117 * its device node and pass extra config data. This helps its driver use
1118 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1119 * that this board's RTC is wakeup-capable (per ACPI spec).
1120 */
1121static struct cmos_rtc_board_info acpi_rtc_info;
1122
1123static void cmos_wake_setup(struct device *dev)
1124{
1125 if (acpi_disabled)
1126 return;
1127
1128 rtc_wake_setup(dev);
1129 acpi_rtc_info.wake_on = rtc_wake_on;
1130 acpi_rtc_info.wake_off = rtc_wake_off;
1131
1132 /* workaround bug in some ACPI tables */
1133 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1134 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1135 acpi_gbl_FADT.month_alarm);
1136 acpi_gbl_FADT.month_alarm = 0;
1137 }
1138
1139 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1140 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1141 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1142
1143 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1144 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1145 dev_info(dev, "RTC can wake from S4\n");
1146
1147 dev->platform_data = &acpi_rtc_info;
1148
1149 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1150 device_init_wakeup(dev, 1);
1151}
1152
1153static void cmos_check_acpi_rtc_status(struct device *dev,
1154 unsigned char *rtc_control)
1155{
1156 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1157 acpi_event_status rtc_status;
1158 acpi_status status;
1159
1160 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1161 return;
1162
1163 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1164 if (ACPI_FAILURE(status)) {
1165 dev_err(dev, "Could not get RTC status\n");
1166 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1167 unsigned char mask;
1168 *rtc_control &= ~RTC_AIE;
1169 CMOS_WRITE(*rtc_control, RTC_CONTROL);
1170 mask = CMOS_READ(RTC_INTR_FLAGS);
1171 rtc_update_irq(cmos->rtc, 1, mask);
1172 }
1173}
1174
1175#else
1176
1177static void cmos_wake_setup(struct device *dev)
1178{
1179}
1180
1181static void cmos_check_acpi_rtc_status(struct device *dev,
1182 unsigned char *rtc_control)
1183{
1184}
1185
1186#endif
1187
1188#ifdef CONFIG_PNP
1189
1190#include <linux/pnp.h>
1191
1192static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1193{
1194 cmos_wake_setup(&pnp->dev);
1195
1196 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1197 /* Some machines contain a PNP entry for the RTC, but
1198 * don't define the IRQ. It should always be safe to
1199 * hardcode it in these cases
1200 */
1201 return cmos_do_probe(&pnp->dev,
1202 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1203 else
1204 return cmos_do_probe(&pnp->dev,
1205 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1206 pnp_irq(pnp, 0));
1207}
1208
1209static void cmos_pnp_remove(struct pnp_dev *pnp)
1210{
1211 cmos_do_remove(&pnp->dev);
1212}
1213
1214static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1215{
1216 struct device *dev = &pnp->dev;
1217 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1218
1219 if (system_state == SYSTEM_POWER_OFF) {
1220 int retval = cmos_poweroff(dev);
1221
1222 if (cmos_aie_poweroff(dev) < 0 && !retval)
1223 return;
1224 }
1225
1226 cmos_do_shutdown(cmos->irq);
1227}
1228
1229static const struct pnp_device_id rtc_ids[] = {
1230 { .id = "PNP0b00", },
1231 { .id = "PNP0b01", },
1232 { .id = "PNP0b02", },
1233 { },
1234};
1235MODULE_DEVICE_TABLE(pnp, rtc_ids);
1236
1237static struct pnp_driver cmos_pnp_driver = {
1238 .name = (char *) driver_name,
1239 .id_table = rtc_ids,
1240 .probe = cmos_pnp_probe,
1241 .remove = cmos_pnp_remove,
1242 .shutdown = cmos_pnp_shutdown,
1243
1244 /* flag ensures resume() gets called, and stops syslog spam */
1245 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1246 .driver = {
1247 .pm = &cmos_pm_ops,
1248 },
1249};
1250
1251#endif /* CONFIG_PNP */
1252
1253#ifdef CONFIG_OF
1254static const struct of_device_id of_cmos_match[] = {
1255 {
1256 .compatible = "motorola,mc146818",
1257 },
1258 { },
1259};
1260MODULE_DEVICE_TABLE(of, of_cmos_match);
1261
1262static __init void cmos_of_init(struct platform_device *pdev)
1263{
1264 struct device_node *node = pdev->dev.of_node;
1265 struct rtc_time time;
1266 int ret;
1267 const __be32 *val;
1268
1269 if (!node)
1270 return;
1271
1272 val = of_get_property(node, "ctrl-reg", NULL);
1273 if (val)
1274 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1275
1276 val = of_get_property(node, "freq-reg", NULL);
1277 if (val)
1278 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1279
1280 cmos_read_time(&pdev->dev, &time);
1281 ret = rtc_valid_tm(&time);
1282 if (ret) {
1283 struct rtc_time def_time = {
1284 .tm_year = 1,
1285 .tm_mday = 1,
1286 };
1287 cmos_set_time(&pdev->dev, &def_time);
1288 }
1289}
1290#else
1291static inline void cmos_of_init(struct platform_device *pdev) {}
1292#endif
1293/*----------------------------------------------------------------*/
1294
1295/* Platform setup should have set up an RTC device, when PNP is
1296 * unavailable ... this could happen even on (older) PCs.
1297 */
1298
1299static int __init cmos_platform_probe(struct platform_device *pdev)
1300{
1301 struct resource *resource;
1302 int irq;
1303
1304 cmos_of_init(pdev);
1305 cmos_wake_setup(&pdev->dev);
1306
1307 if (RTC_IOMAPPED)
1308 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1309 else
1310 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1311 irq = platform_get_irq(pdev, 0);
1312 if (irq < 0)
1313 irq = -1;
1314
1315 return cmos_do_probe(&pdev->dev, resource, irq);
1316}
1317
1318static int cmos_platform_remove(struct platform_device *pdev)
1319{
1320 cmos_do_remove(&pdev->dev);
1321 return 0;
1322}
1323
1324static void cmos_platform_shutdown(struct platform_device *pdev)
1325{
1326 struct device *dev = &pdev->dev;
1327 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1328
1329 if (system_state == SYSTEM_POWER_OFF) {
1330 int retval = cmos_poweroff(dev);
1331
1332 if (cmos_aie_poweroff(dev) < 0 && !retval)
1333 return;
1334 }
1335
1336 cmos_do_shutdown(cmos->irq);
1337}
1338
1339/* work with hotplug and coldplug */
1340MODULE_ALIAS("platform:rtc_cmos");
1341
1342static struct platform_driver cmos_platform_driver = {
1343 .remove = cmos_platform_remove,
1344 .shutdown = cmos_platform_shutdown,
1345 .driver = {
1346 .name = driver_name,
1347 .pm = &cmos_pm_ops,
1348 .of_match_table = of_match_ptr(of_cmos_match),
1349 }
1350};
1351
1352#ifdef CONFIG_PNP
1353static bool pnp_driver_registered;
1354#endif
1355static bool platform_driver_registered;
1356
1357static int __init cmos_init(void)
1358{
1359 int retval = 0;
1360
1361#ifdef CONFIG_PNP
1362 retval = pnp_register_driver(&cmos_pnp_driver);
1363 if (retval == 0)
1364 pnp_driver_registered = true;
1365#endif
1366
1367 if (!cmos_rtc.dev) {
1368 retval = platform_driver_probe(&cmos_platform_driver,
1369 cmos_platform_probe);
1370 if (retval == 0)
1371 platform_driver_registered = true;
1372 }
1373
1374 if (retval == 0)
1375 return 0;
1376
1377#ifdef CONFIG_PNP
1378 if (pnp_driver_registered)
1379 pnp_unregister_driver(&cmos_pnp_driver);
1380#endif
1381 return retval;
1382}
1383module_init(cmos_init);
1384
1385static void __exit cmos_exit(void)
1386{
1387#ifdef CONFIG_PNP
1388 if (pnp_driver_registered)
1389 pnp_unregister_driver(&cmos_pnp_driver);
1390#endif
1391 if (platform_driver_registered)
1392 platform_driver_unregister(&cmos_platform_driver);
1393}
1394module_exit(cmos_exit);
1395
1396
1397MODULE_AUTHOR("David Brownell");
1398MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1399MODULE_LICENSE("GPL");