1/*
 2 *  Atheros AR71XX/AR724X/AR913X common definitions
 3 *
 4 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 5 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 6 *
 7 *  Parts of this file are based on Atheros' 2.6.15 BSP
 8 *
 9 *  This program is free software; you can redistribute it and/or modify it
10 *  under the terms of the GNU General Public License version 2 as published
11 *  by the Free Software Foundation.
12 */
13
14#ifndef __ASM_MACH_ATH79_H
15#define __ASM_MACH_ATH79_H
16
17#include <linux/types.h>
18#include <linux/io.h>
19
20enum ath79_soc_type {
21	ATH79_SOC_UNKNOWN,
22	ATH79_SOC_AR7130,
23	ATH79_SOC_AR7141,
24	ATH79_SOC_AR7161,
25	ATH79_SOC_AR7240,
26	ATH79_SOC_AR7241,
27	ATH79_SOC_AR7242,
28	ATH79_SOC_AR9130,
29	ATH79_SOC_AR9132
 
 
 
 
 
30};
31
32extern enum ath79_soc_type ath79_soc;
 
33
34static inline int soc_is_ar71xx(void)
35{
36	return (ath79_soc == ATH79_SOC_AR7130 ||
37		ath79_soc == ATH79_SOC_AR7141 ||
38		ath79_soc == ATH79_SOC_AR7161);
39}
40
41static inline int soc_is_ar724x(void)
42{
43	return (ath79_soc == ATH79_SOC_AR7240 ||
44		ath79_soc == ATH79_SOC_AR7241 ||
45		ath79_soc == ATH79_SOC_AR7242);
46}
47
48static inline int soc_is_ar7240(void)
49{
50	return (ath79_soc == ATH79_SOC_AR7240);
51}
52
53static inline int soc_is_ar7241(void)
54{
55	return (ath79_soc == ATH79_SOC_AR7241);
56}
57
58static inline int soc_is_ar7242(void)
59{
60	return (ath79_soc == ATH79_SOC_AR7242);
61}
62
63static inline int soc_is_ar913x(void)
64{
65	return (ath79_soc == ATH79_SOC_AR9130 ||
66		ath79_soc == ATH79_SOC_AR9132);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
67}
68
69extern void __iomem *ath79_ddr_base;
70extern void __iomem *ath79_pll_base;
71extern void __iomem *ath79_reset_base;
72
73static inline void ath79_pll_wr(unsigned reg, u32 val)
74{
75	__raw_writel(val, ath79_pll_base + reg);
76}
77
78static inline u32 ath79_pll_rr(unsigned reg)
79{
80	return __raw_readl(ath79_pll_base + reg);
81}
82
83static inline void ath79_reset_wr(unsigned reg, u32 val)
84{
85	__raw_writel(val, ath79_reset_base + reg);
86}
87
88static inline u32 ath79_reset_rr(unsigned reg)
89{
90	return __raw_readl(ath79_reset_base + reg);
91}
92
93void ath79_device_reset_set(u32 mask);
94void ath79_device_reset_clear(u32 mask);
95
96#endif /* __ASM_MACH_ATH79_H */

  1/*
  2 *  Atheros AR71XX/AR724X/AR913X common definitions
  3 *
  4 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6 *
  7 *  Parts of this file are based on Atheros' 2.6.15 BSP
  8 *
  9 *  This program is free software; you can redistribute it and/or modify it
 10 *  under the terms of the GNU General Public License version 2 as published
 11 *  by the Free Software Foundation.
 12 */
 13
 14#ifndef __ASM_MACH_ATH79_H
 15#define __ASM_MACH_ATH79_H
 16
 17#include <linux/types.h>
 18#include <linux/io.h>
 19
 20enum ath79_soc_type {
 21	ATH79_SOC_UNKNOWN,
 22	ATH79_SOC_AR7130,
 23	ATH79_SOC_AR7141,
 24	ATH79_SOC_AR7161,
 25	ATH79_SOC_AR7240,
 26	ATH79_SOC_AR7241,
 27	ATH79_SOC_AR7242,
 28	ATH79_SOC_AR9130,
 29	ATH79_SOC_AR9132,
 30	ATH79_SOC_AR9330,
 31	ATH79_SOC_AR9331,
 32	ATH79_SOC_AR9341,
 33	ATH79_SOC_AR9342,
 34	ATH79_SOC_AR9344,
 35};
 36
 37extern enum ath79_soc_type ath79_soc;
 38extern unsigned int ath79_soc_rev;
 39
 40static inline int soc_is_ar71xx(void)
 41{
 42	return (ath79_soc == ATH79_SOC_AR7130 ||
 43		ath79_soc == ATH79_SOC_AR7141 ||
 44		ath79_soc == ATH79_SOC_AR7161);
 45}
 46
 47static inline int soc_is_ar724x(void)
 48{
 49	return (ath79_soc == ATH79_SOC_AR7240 ||
 50		ath79_soc == ATH79_SOC_AR7241 ||
 51		ath79_soc == ATH79_SOC_AR7242);
 52}
 53
 54static inline int soc_is_ar7240(void)
 55{
 56	return (ath79_soc == ATH79_SOC_AR7240);
 57}
 58
 59static inline int soc_is_ar7241(void)
 60{
 61	return (ath79_soc == ATH79_SOC_AR7241);
 62}
 63
 64static inline int soc_is_ar7242(void)
 65{
 66	return (ath79_soc == ATH79_SOC_AR7242);
 67}
 68
 69static inline int soc_is_ar913x(void)
 70{
 71	return (ath79_soc == ATH79_SOC_AR9130 ||
 72		ath79_soc == ATH79_SOC_AR9132);
 73}
 74
 75static inline int soc_is_ar933x(void)
 76{
 77	return (ath79_soc == ATH79_SOC_AR9330 ||
 78		ath79_soc == ATH79_SOC_AR9331);
 79}
 80
 81static inline int soc_is_ar9341(void)
 82{
 83	return (ath79_soc == ATH79_SOC_AR9341);
 84}
 85
 86static inline int soc_is_ar9342(void)
 87{
 88	return (ath79_soc == ATH79_SOC_AR9342);
 89}
 90
 91static inline int soc_is_ar9344(void)
 92{
 93	return (ath79_soc == ATH79_SOC_AR9344);
 94}
 95
 96static inline int soc_is_ar934x(void)
 97{
 98	return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
 99}
100
101extern void __iomem *ath79_ddr_base;
102extern void __iomem *ath79_pll_base;
103extern void __iomem *ath79_reset_base;
104
105static inline void ath79_pll_wr(unsigned reg, u32 val)
106{
107	__raw_writel(val, ath79_pll_base + reg);
108}
109
110static inline u32 ath79_pll_rr(unsigned reg)
111{
112	return __raw_readl(ath79_pll_base + reg);
113}
114
115static inline void ath79_reset_wr(unsigned reg, u32 val)
116{
117	__raw_writel(val, ath79_reset_base + reg);
118}
119
120static inline u32 ath79_reset_rr(unsigned reg)
121{
122	return __raw_readl(ath79_reset_base + reg);
123}
124
125void ath79_device_reset_set(u32 mask);
126void ath79_device_reset_clear(u32 mask);
127
128#endif /* __ASM_MACH_ATH79_H */