1/*
 2 *  Atheros AR71XX/AR724X/AR913X common definitions
 3 *
 4 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 5 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 6 *
 7 *  Parts of this file are based on Atheros' 2.6.15 BSP
 8 *
 9 *  This program is free software; you can redistribute it and/or modify it
10 *  under the terms of the GNU General Public License version 2 as published
11 *  by the Free Software Foundation.
12 */
13
14#ifndef __ASM_MACH_ATH79_H
15#define __ASM_MACH_ATH79_H
16
17#include <linux/types.h>
18#include <linux/io.h>
19
20enum ath79_soc_type {
21	ATH79_SOC_UNKNOWN,
22	ATH79_SOC_AR7130,
23	ATH79_SOC_AR7141,
24	ATH79_SOC_AR7161,
25	ATH79_SOC_AR7240,
26	ATH79_SOC_AR7241,
27	ATH79_SOC_AR7242,
28	ATH79_SOC_AR9130,
29	ATH79_SOC_AR9132
30};
31
32extern enum ath79_soc_type ath79_soc;
33
34static inline int soc_is_ar71xx(void)
35{
36	return (ath79_soc == ATH79_SOC_AR7130 ||
37		ath79_soc == ATH79_SOC_AR7141 ||
38		ath79_soc == ATH79_SOC_AR7161);
39}
40
41static inline int soc_is_ar724x(void)
42{
43	return (ath79_soc == ATH79_SOC_AR7240 ||
44		ath79_soc == ATH79_SOC_AR7241 ||
45		ath79_soc == ATH79_SOC_AR7242);
46}
47
48static inline int soc_is_ar7240(void)
49{
50	return (ath79_soc == ATH79_SOC_AR7240);
51}
52
53static inline int soc_is_ar7241(void)
54{
55	return (ath79_soc == ATH79_SOC_AR7241);
56}
57
58static inline int soc_is_ar7242(void)
59{
60	return (ath79_soc == ATH79_SOC_AR7242);
61}
62
63static inline int soc_is_ar913x(void)
64{
65	return (ath79_soc == ATH79_SOC_AR9130 ||
66		ath79_soc == ATH79_SOC_AR9132);
67}
68
69extern void __iomem *ath79_ddr_base;
70extern void __iomem *ath79_pll_base;
71extern void __iomem *ath79_reset_base;
72
73static inline void ath79_pll_wr(unsigned reg, u32 val)
74{
75	__raw_writel(val, ath79_pll_base + reg);
76}
77
78static inline u32 ath79_pll_rr(unsigned reg)
79{
80	return __raw_readl(ath79_pll_base + reg);
81}
82
83static inline void ath79_reset_wr(unsigned reg, u32 val)
84{
85	__raw_writel(val, ath79_reset_base + reg);
86}
87
88static inline u32 ath79_reset_rr(unsigned reg)
89{
90	return __raw_readl(ath79_reset_base + reg);
91}
92
93void ath79_device_reset_set(u32 mask);
94void ath79_device_reset_clear(u32 mask);
95
96#endif /* __ASM_MACH_ATH79_H */

 1/*
 2 *  Atheros AR71XX/AR724X/AR913X common definitions
 3 *
 4 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 5 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 6 *
 7 *  Parts of this file are based on Atheros' 2.6.15 BSP
 8 *
 9 *  This program is free software; you can redistribute it and/or modify it
10 *  under the terms of the GNU General Public License version 2 as published
11 *  by the Free Software Foundation.
12 */
13
14#ifndef __ASM_MACH_ATH79_H
15#define __ASM_MACH_ATH79_H
16
17#include <linux/types.h>
18#include <linux/io.h>
19
20enum ath79_soc_type {
21	ATH79_SOC_UNKNOWN,
22	ATH79_SOC_AR7130,
23	ATH79_SOC_AR7141,
24	ATH79_SOC_AR7161,
25	ATH79_SOC_AR7240,
26	ATH79_SOC_AR7241,
27	ATH79_SOC_AR7242,
28	ATH79_SOC_AR9130,
29	ATH79_SOC_AR9132
30};
31
32extern enum ath79_soc_type ath79_soc;
33
34static inline int soc_is_ar71xx(void)
35{
36	return (ath79_soc == ATH79_SOC_AR7130 ||
37		ath79_soc == ATH79_SOC_AR7141 ||
38		ath79_soc == ATH79_SOC_AR7161);
39}
40
41static inline int soc_is_ar724x(void)
42{
43	return (ath79_soc == ATH79_SOC_AR7240 ||
44		ath79_soc == ATH79_SOC_AR7241 ||
45		ath79_soc == ATH79_SOC_AR7242);
46}
47
48static inline int soc_is_ar7240(void)
49{
50	return (ath79_soc == ATH79_SOC_AR7240);
51}
52
53static inline int soc_is_ar7241(void)
54{
55	return (ath79_soc == ATH79_SOC_AR7241);
56}
57
58static inline int soc_is_ar7242(void)
59{
60	return (ath79_soc == ATH79_SOC_AR7242);
61}
62
63static inline int soc_is_ar913x(void)
64{
65	return (ath79_soc == ATH79_SOC_AR9130 ||
66		ath79_soc == ATH79_SOC_AR9132);
67}
68
69extern void __iomem *ath79_ddr_base;
70extern void __iomem *ath79_pll_base;
71extern void __iomem *ath79_reset_base;
72
73static inline void ath79_pll_wr(unsigned reg, u32 val)
74{
75	__raw_writel(val, ath79_pll_base + reg);
76}
77
78static inline u32 ath79_pll_rr(unsigned reg)
79{
80	return __raw_readl(ath79_pll_base + reg);
81}
82
83static inline void ath79_reset_wr(unsigned reg, u32 val)
84{
85	__raw_writel(val, ath79_reset_base + reg);
86}
87
88static inline u32 ath79_reset_rr(unsigned reg)
89{
90	return __raw_readl(ath79_reset_base + reg);
91}
92
93void ath79_device_reset_set(u32 mask);
94void ath79_device_reset_clear(u32 mask);
95
96#endif /* __ASM_MACH_ATH79_H */