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1/*
2 * driver for NXP USB Host devices
3 *
4 * Currently supported OHCI host devices:
5 * - NXP LPC32xx
6 *
7 * Authors: Dmitry Chigirev <source@mvista.com>
8 * Vitaly Wool <vitalywool@gmail.com>
9 *
10 * register initialization is based on code examples provided by Philips
11 * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
12 *
13 * NOTE: This driver does not have suspend/resume functionality
14 * This driver is intended for engineering development purposes only
15 *
16 * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
17 * the terms of the GNU General Public License version 2. This program
18 * is licensed "as is" without any warranty of any kind, whether express
19 * or implied.
20 */
21#include <linux/clk.h>
22#include <linux/dma-mapping.h>
23#include <linux/io.h>
24#include <linux/i2c.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/of.h>
28#include <linux/platform_device.h>
29#include <linux/usb/isp1301.h>
30#include <linux/usb.h>
31#include <linux/usb/hcd.h>
32
33#include "ohci.h"
34
35
36#include <mach/hardware.h>
37#include <asm/mach-types.h>
38#include <asm/io.h>
39
40#include <mach/platform.h>
41#include <mach/irqs.h>
42
43#define USB_CONFIG_BASE 0x31020000
44#define PWRMAN_BASE 0x40004000
45
46#define USB_CTRL IO_ADDRESS(PWRMAN_BASE + 0x64)
47
48/* USB_CTRL bit defines */
49#define USB_SLAVE_HCLK_EN (1 << 24)
50#define USB_DEV_NEED_CLK_EN (1 << 22)
51#define USB_HOST_NEED_CLK_EN (1 << 21)
52#define PAD_CONTROL_LAST_DRIVEN (1 << 19)
53
54#define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110)
55
56/* USB_OTG_STAT_CONTROL bit defines */
57#define TRANSPARENT_I2C_EN (1 << 7)
58#define HOST_EN (1 << 0)
59
60/* On LPC32xx, those are undefined */
61#ifndef start_int_set_falling_edge
62#define start_int_set_falling_edge(irq)
63#define start_int_set_rising_edge(irq)
64#define start_int_ack(irq)
65#define start_int_mask(irq)
66#define start_int_umask(irq)
67#endif
68
69#define DRIVER_DESC "OHCI NXP driver"
70
71static const char hcd_name[] = "ohci-nxp";
72static struct hc_driver __read_mostly ohci_nxp_hc_driver;
73
74static struct i2c_client *isp1301_i2c_client;
75
76extern int usb_disabled(void);
77
78static struct clk *usb_pll_clk;
79static struct clk *usb_dev_clk;
80static struct clk *usb_otg_clk;
81
82static void isp1301_configure_lpc32xx(void)
83{
84 /* LPC32XX only supports DAT_SE0 USB mode */
85 /* This sequence is important */
86
87 /* Disable transparent UART mode first */
88 i2c_smbus_write_byte_data(isp1301_i2c_client,
89 (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
90 MC1_UART_EN);
91 i2c_smbus_write_byte_data(isp1301_i2c_client,
92 (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
93 ~MC1_SPEED_REG);
94 i2c_smbus_write_byte_data(isp1301_i2c_client,
95 ISP1301_I2C_MODE_CONTROL_1, MC1_SPEED_REG);
96 i2c_smbus_write_byte_data(isp1301_i2c_client,
97 (ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR),
98 ~0);
99 i2c_smbus_write_byte_data(isp1301_i2c_client,
100 ISP1301_I2C_MODE_CONTROL_2,
101 (MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL));
102 i2c_smbus_write_byte_data(isp1301_i2c_client,
103 (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), ~0);
104 i2c_smbus_write_byte_data(isp1301_i2c_client,
105 ISP1301_I2C_MODE_CONTROL_1, MC1_DAT_SE0);
106 i2c_smbus_write_byte_data(isp1301_i2c_client,
107 ISP1301_I2C_OTG_CONTROL_1,
108 (OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
109 i2c_smbus_write_byte_data(isp1301_i2c_client,
110 (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
111 (OTG1_DM_PULLUP | OTG1_DP_PULLUP));
112 i2c_smbus_write_byte_data(isp1301_i2c_client,
113 ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
114 i2c_smbus_write_byte_data(isp1301_i2c_client,
115 ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR,
116 ~0);
117 i2c_smbus_write_byte_data(isp1301_i2c_client,
118 ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
119
120 /* Enable usb_need_clk clock after transceiver is initialized */
121 __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
122
123 printk(KERN_INFO "ISP1301 Vendor ID : 0x%04x\n",
124 i2c_smbus_read_word_data(isp1301_i2c_client, 0x00));
125 printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n",
126 i2c_smbus_read_word_data(isp1301_i2c_client, 0x02));
127 printk(KERN_INFO "ISP1301 Version ID : 0x%04x\n",
128 i2c_smbus_read_word_data(isp1301_i2c_client, 0x14));
129}
130
131static void isp1301_configure(void)
132{
133 isp1301_configure_lpc32xx();
134}
135
136static inline void isp1301_vbus_on(void)
137{
138 i2c_smbus_write_byte_data(isp1301_i2c_client, ISP1301_I2C_OTG_CONTROL_1,
139 OTG1_VBUS_DRV);
140}
141
142static inline void isp1301_vbus_off(void)
143{
144 i2c_smbus_write_byte_data(isp1301_i2c_client,
145 ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR,
146 OTG1_VBUS_DRV);
147}
148
149static void ohci_nxp_start_hc(void)
150{
151 unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
152 __raw_writel(tmp, USB_OTG_STAT_CONTROL);
153 isp1301_vbus_on();
154}
155
156static void ohci_nxp_stop_hc(void)
157{
158 unsigned long tmp;
159 isp1301_vbus_off();
160 tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
161 __raw_writel(tmp, USB_OTG_STAT_CONTROL);
162}
163
164static int ohci_hcd_nxp_probe(struct platform_device *pdev)
165{
166 struct usb_hcd *hcd = 0;
167 const struct hc_driver *driver = &ohci_nxp_hc_driver;
168 struct resource *res;
169 int ret = 0, irq;
170 struct device_node *isp1301_node;
171
172 if (pdev->dev.of_node) {
173 isp1301_node = of_parse_phandle(pdev->dev.of_node,
174 "transceiver", 0);
175 } else {
176 isp1301_node = NULL;
177 }
178
179 isp1301_i2c_client = isp1301_get_client(isp1301_node);
180 if (!isp1301_i2c_client) {
181 return -EPROBE_DEFER;
182 }
183
184 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
185 if (ret)
186 goto fail_disable;
187
188 dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (nxp)\n", hcd_name);
189 if (usb_disabled()) {
190 dev_err(&pdev->dev, "USB is disabled\n");
191 ret = -ENODEV;
192 goto fail_disable;
193 }
194
195 /* Enable AHB slave USB clock, needed for further USB clock control */
196 __raw_writel(USB_SLAVE_HCLK_EN | PAD_CONTROL_LAST_DRIVEN, USB_CTRL);
197
198 /* Enable USB PLL */
199 usb_pll_clk = devm_clk_get(&pdev->dev, "ck_pll5");
200 if (IS_ERR(usb_pll_clk)) {
201 dev_err(&pdev->dev, "failed to acquire USB PLL\n");
202 ret = PTR_ERR(usb_pll_clk);
203 goto fail_disable;
204 }
205
206 ret = clk_enable(usb_pll_clk);
207 if (ret < 0) {
208 dev_err(&pdev->dev, "failed to start USB PLL\n");
209 goto fail_disable;
210 }
211
212 ret = clk_set_rate(usb_pll_clk, 48000);
213 if (ret < 0) {
214 dev_err(&pdev->dev, "failed to set USB clock rate\n");
215 goto fail_rate;
216 }
217
218 /* Enable USB device clock */
219 usb_dev_clk = devm_clk_get(&pdev->dev, "ck_usbd");
220 if (IS_ERR(usb_dev_clk)) {
221 dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
222 ret = PTR_ERR(usb_dev_clk);
223 goto fail_rate;
224 }
225
226 ret = clk_enable(usb_dev_clk);
227 if (ret < 0) {
228 dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
229 goto fail_rate;
230 }
231
232 /* Enable USB otg clocks */
233 usb_otg_clk = devm_clk_get(&pdev->dev, "ck_usb_otg");
234 if (IS_ERR(usb_otg_clk)) {
235 dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
236 ret = PTR_ERR(usb_otg_clk);
237 goto fail_otg;
238 }
239
240 __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
241
242 ret = clk_enable(usb_otg_clk);
243 if (ret < 0) {
244 dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
245 goto fail_otg;
246 }
247
248 isp1301_configure();
249
250 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
251 if (!hcd) {
252 dev_err(&pdev->dev, "Failed to allocate HC buffer\n");
253 ret = -ENOMEM;
254 goto fail_hcd;
255 }
256
257 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
258 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
259 if (IS_ERR(hcd->regs)) {
260 ret = PTR_ERR(hcd->regs);
261 goto fail_resource;
262 }
263 hcd->rsrc_start = res->start;
264 hcd->rsrc_len = resource_size(res);
265
266 irq = platform_get_irq(pdev, 0);
267 if (irq < 0) {
268 ret = -ENXIO;
269 goto fail_resource;
270 }
271
272 ohci_nxp_start_hc();
273 platform_set_drvdata(pdev, hcd);
274
275 dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
276 ret = usb_add_hcd(hcd, irq, 0);
277 if (ret == 0) {
278 device_wakeup_enable(hcd->self.controller);
279 return ret;
280 }
281
282 ohci_nxp_stop_hc();
283fail_resource:
284 usb_put_hcd(hcd);
285fail_hcd:
286 clk_disable(usb_otg_clk);
287fail_otg:
288 clk_disable(usb_dev_clk);
289fail_rate:
290 clk_disable(usb_pll_clk);
291fail_disable:
292 isp1301_i2c_client = NULL;
293 return ret;
294}
295
296static int ohci_hcd_nxp_remove(struct platform_device *pdev)
297{
298 struct usb_hcd *hcd = platform_get_drvdata(pdev);
299
300 usb_remove_hcd(hcd);
301 ohci_nxp_stop_hc();
302 usb_put_hcd(hcd);
303 clk_disable(usb_pll_clk);
304 clk_disable(usb_dev_clk);
305 i2c_unregister_device(isp1301_i2c_client);
306 isp1301_i2c_client = NULL;
307
308 return 0;
309}
310
311/* work with hotplug and coldplug */
312MODULE_ALIAS("platform:usb-ohci");
313
314#ifdef CONFIG_OF
315static const struct of_device_id ohci_hcd_nxp_match[] = {
316 { .compatible = "nxp,ohci-nxp" },
317 {},
318};
319MODULE_DEVICE_TABLE(of, ohci_hcd_nxp_match);
320#endif
321
322static struct platform_driver ohci_hcd_nxp_driver = {
323 .driver = {
324 .name = "usb-ohci",
325 .owner = THIS_MODULE,
326 .of_match_table = of_match_ptr(ohci_hcd_nxp_match),
327 },
328 .probe = ohci_hcd_nxp_probe,
329 .remove = ohci_hcd_nxp_remove,
330};
331
332static int __init ohci_nxp_init(void)
333{
334 if (usb_disabled())
335 return -ENODEV;
336
337 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
338
339 ohci_init_driver(&ohci_nxp_hc_driver, NULL);
340 return platform_driver_register(&ohci_hcd_nxp_driver);
341}
342module_init(ohci_nxp_init);
343
344static void __exit ohci_nxp_cleanup(void)
345{
346 platform_driver_unregister(&ohci_hcd_nxp_driver);
347}
348module_exit(ohci_nxp_cleanup);
349
350MODULE_DESCRIPTION(DRIVER_DESC);
351MODULE_LICENSE("GPL v2");