Loading...
1/*
2 * PowerMac G5 SMU driver
3 *
4 * Copyright 2004 J. Mayer <l_indien@magic.fr>
5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
6 *
7 * Released under the term of the GNU GPL v2.
8 */
9
10/*
11 * TODO:
12 * - maybe add timeout to commands ?
13 * - blocking version of time functions
14 * - polling version of i2c commands (including timer that works with
15 * interrupts off)
16 * - maybe avoid some data copies with i2c by directly using the smu cmd
17 * buffer and a lower level internal interface
18 * - understand SMU -> CPU events and implement reception of them via
19 * the userland interface
20 */
21
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/device.h>
25#include <linux/dmapool.h>
26#include <linux/bootmem.h>
27#include <linux/vmalloc.h>
28#include <linux/highmem.h>
29#include <linux/jiffies.h>
30#include <linux/interrupt.h>
31#include <linux/rtc.h>
32#include <linux/completion.h>
33#include <linux/miscdevice.h>
34#include <linux/delay.h>
35#include <linux/sysdev.h>
36#include <linux/poll.h>
37#include <linux/mutex.h>
38#include <linux/of_device.h>
39#include <linux/of_platform.h>
40#include <linux/slab.h>
41
42#include <asm/byteorder.h>
43#include <asm/io.h>
44#include <asm/prom.h>
45#include <asm/machdep.h>
46#include <asm/pmac_feature.h>
47#include <asm/smu.h>
48#include <asm/sections.h>
49#include <asm/abs_addr.h>
50#include <asm/uaccess.h>
51
52#define VERSION "0.7"
53#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
54
55#undef DEBUG_SMU
56
57#ifdef DEBUG_SMU
58#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
59#else
60#define DPRINTK(fmt, args...) do { } while (0)
61#endif
62
63/*
64 * This is the command buffer passed to the SMU hardware
65 */
66#define SMU_MAX_DATA 254
67
68struct smu_cmd_buf {
69 u8 cmd;
70 u8 length;
71 u8 data[SMU_MAX_DATA];
72};
73
74struct smu_device {
75 spinlock_t lock;
76 struct device_node *of_node;
77 struct platform_device *of_dev;
78 int doorbell; /* doorbell gpio */
79 u32 __iomem *db_buf; /* doorbell buffer */
80 struct device_node *db_node;
81 unsigned int db_irq;
82 int msg;
83 struct device_node *msg_node;
84 unsigned int msg_irq;
85 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
86 u32 cmd_buf_abs; /* command buffer absolute */
87 struct list_head cmd_list;
88 struct smu_cmd *cmd_cur; /* pending command */
89 int broken_nap;
90 struct list_head cmd_i2c_list;
91 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
92 struct timer_list i2c_timer;
93};
94
95/*
96 * I don't think there will ever be more than one SMU, so
97 * for now, just hard code that
98 */
99static DEFINE_MUTEX(smu_mutex);
100static struct smu_device *smu;
101static DEFINE_MUTEX(smu_part_access);
102static int smu_irq_inited;
103
104static void smu_i2c_retry(unsigned long data);
105
106/*
107 * SMU driver low level stuff
108 */
109
110static void smu_start_cmd(void)
111{
112 unsigned long faddr, fend;
113 struct smu_cmd *cmd;
114
115 if (list_empty(&smu->cmd_list))
116 return;
117
118 /* Fetch first command in queue */
119 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
120 smu->cmd_cur = cmd;
121 list_del(&cmd->link);
122
123 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
124 cmd->data_len);
125 DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
126 ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
127 ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
128 ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
129 ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
130
131 /* Fill the SMU command buffer */
132 smu->cmd_buf->cmd = cmd->cmd;
133 smu->cmd_buf->length = cmd->data_len;
134 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
135
136 /* Flush command and data to RAM */
137 faddr = (unsigned long)smu->cmd_buf;
138 fend = faddr + smu->cmd_buf->length + 2;
139 flush_inval_dcache_range(faddr, fend);
140
141
142 /* We also disable NAP mode for the duration of the command
143 * on U3 based machines.
144 * This is slightly racy as it can be written back to 1 by a sysctl
145 * but that never happens in practice. There seem to be an issue with
146 * U3 based machines such as the iMac G5 where napping for the
147 * whole duration of the command prevents the SMU from fetching it
148 * from memory. This might be related to the strange i2c based
149 * mechanism the SMU uses to access memory.
150 */
151 if (smu->broken_nap)
152 powersave_nap = 0;
153
154 /* This isn't exactly a DMA mapping here, I suspect
155 * the SMU is actually communicating with us via i2c to the
156 * northbridge or the CPU to access RAM.
157 */
158 writel(smu->cmd_buf_abs, smu->db_buf);
159
160 /* Ring the SMU doorbell */
161 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
162}
163
164
165static irqreturn_t smu_db_intr(int irq, void *arg)
166{
167 unsigned long flags;
168 struct smu_cmd *cmd;
169 void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
170 void *misc = NULL;
171 u8 gpio;
172 int rc = 0;
173
174 /* SMU completed the command, well, we hope, let's make sure
175 * of it
176 */
177 spin_lock_irqsave(&smu->lock, flags);
178
179 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
180 if ((gpio & 7) != 7) {
181 spin_unlock_irqrestore(&smu->lock, flags);
182 return IRQ_HANDLED;
183 }
184
185 cmd = smu->cmd_cur;
186 smu->cmd_cur = NULL;
187 if (cmd == NULL)
188 goto bail;
189
190 if (rc == 0) {
191 unsigned long faddr;
192 int reply_len;
193 u8 ack;
194
195 /* CPU might have brought back the cache line, so we need
196 * to flush again before peeking at the SMU response. We
197 * flush the entire buffer for now as we haven't read the
198 * reply length (it's only 2 cache lines anyway)
199 */
200 faddr = (unsigned long)smu->cmd_buf;
201 flush_inval_dcache_range(faddr, faddr + 256);
202
203 /* Now check ack */
204 ack = (~cmd->cmd) & 0xff;
205 if (ack != smu->cmd_buf->cmd) {
206 DPRINTK("SMU: incorrect ack, want %x got %x\n",
207 ack, smu->cmd_buf->cmd);
208 rc = -EIO;
209 }
210 reply_len = rc == 0 ? smu->cmd_buf->length : 0;
211 DPRINTK("SMU: reply len: %d\n", reply_len);
212 if (reply_len > cmd->reply_len) {
213 printk(KERN_WARNING "SMU: reply buffer too small,"
214 "got %d bytes for a %d bytes buffer\n",
215 reply_len, cmd->reply_len);
216 reply_len = cmd->reply_len;
217 }
218 cmd->reply_len = reply_len;
219 if (cmd->reply_buf && reply_len)
220 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
221 }
222
223 /* Now complete the command. Write status last in order as we lost
224 * ownership of the command structure as soon as it's no longer -1
225 */
226 done = cmd->done;
227 misc = cmd->misc;
228 mb();
229 cmd->status = rc;
230
231 /* Re-enable NAP mode */
232 if (smu->broken_nap)
233 powersave_nap = 1;
234 bail:
235 /* Start next command if any */
236 smu_start_cmd();
237 spin_unlock_irqrestore(&smu->lock, flags);
238
239 /* Call command completion handler if any */
240 if (done)
241 done(cmd, misc);
242
243 /* It's an edge interrupt, nothing to do */
244 return IRQ_HANDLED;
245}
246
247
248static irqreturn_t smu_msg_intr(int irq, void *arg)
249{
250 /* I don't quite know what to do with this one, we seem to never
251 * receive it, so I suspect we have to arm it someway in the SMU
252 * to start getting events that way.
253 */
254
255 printk(KERN_INFO "SMU: message interrupt !\n");
256
257 /* It's an edge interrupt, nothing to do */
258 return IRQ_HANDLED;
259}
260
261
262/*
263 * Queued command management.
264 *
265 */
266
267int smu_queue_cmd(struct smu_cmd *cmd)
268{
269 unsigned long flags;
270
271 if (smu == NULL)
272 return -ENODEV;
273 if (cmd->data_len > SMU_MAX_DATA ||
274 cmd->reply_len > SMU_MAX_DATA)
275 return -EINVAL;
276
277 cmd->status = 1;
278 spin_lock_irqsave(&smu->lock, flags);
279 list_add_tail(&cmd->link, &smu->cmd_list);
280 if (smu->cmd_cur == NULL)
281 smu_start_cmd();
282 spin_unlock_irqrestore(&smu->lock, flags);
283
284 /* Workaround for early calls when irq isn't available */
285 if (!smu_irq_inited || smu->db_irq == NO_IRQ)
286 smu_spinwait_cmd(cmd);
287
288 return 0;
289}
290EXPORT_SYMBOL(smu_queue_cmd);
291
292
293int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
294 unsigned int data_len,
295 void (*done)(struct smu_cmd *cmd, void *misc),
296 void *misc, ...)
297{
298 struct smu_cmd *cmd = &scmd->cmd;
299 va_list list;
300 int i;
301
302 if (data_len > sizeof(scmd->buffer))
303 return -EINVAL;
304
305 memset(scmd, 0, sizeof(*scmd));
306 cmd->cmd = command;
307 cmd->data_len = data_len;
308 cmd->data_buf = scmd->buffer;
309 cmd->reply_len = sizeof(scmd->buffer);
310 cmd->reply_buf = scmd->buffer;
311 cmd->done = done;
312 cmd->misc = misc;
313
314 va_start(list, misc);
315 for (i = 0; i < data_len; ++i)
316 scmd->buffer[i] = (u8)va_arg(list, int);
317 va_end(list);
318
319 return smu_queue_cmd(cmd);
320}
321EXPORT_SYMBOL(smu_queue_simple);
322
323
324void smu_poll(void)
325{
326 u8 gpio;
327
328 if (smu == NULL)
329 return;
330
331 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
332 if ((gpio & 7) == 7)
333 smu_db_intr(smu->db_irq, smu);
334}
335EXPORT_SYMBOL(smu_poll);
336
337
338void smu_done_complete(struct smu_cmd *cmd, void *misc)
339{
340 struct completion *comp = misc;
341
342 complete(comp);
343}
344EXPORT_SYMBOL(smu_done_complete);
345
346
347void smu_spinwait_cmd(struct smu_cmd *cmd)
348{
349 while(cmd->status == 1)
350 smu_poll();
351}
352EXPORT_SYMBOL(smu_spinwait_cmd);
353
354
355/* RTC low level commands */
356static inline int bcd2hex (int n)
357{
358 return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
359}
360
361
362static inline int hex2bcd (int n)
363{
364 return ((n / 10) << 4) + (n % 10);
365}
366
367
368static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
369 struct rtc_time *time)
370{
371 cmd_buf->cmd = 0x8e;
372 cmd_buf->length = 8;
373 cmd_buf->data[0] = 0x80;
374 cmd_buf->data[1] = hex2bcd(time->tm_sec);
375 cmd_buf->data[2] = hex2bcd(time->tm_min);
376 cmd_buf->data[3] = hex2bcd(time->tm_hour);
377 cmd_buf->data[4] = time->tm_wday;
378 cmd_buf->data[5] = hex2bcd(time->tm_mday);
379 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
380 cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
381}
382
383
384int smu_get_rtc_time(struct rtc_time *time, int spinwait)
385{
386 struct smu_simple_cmd cmd;
387 int rc;
388
389 if (smu == NULL)
390 return -ENODEV;
391
392 memset(time, 0, sizeof(struct rtc_time));
393 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
394 SMU_CMD_RTC_GET_DATETIME);
395 if (rc)
396 return rc;
397 smu_spinwait_simple(&cmd);
398
399 time->tm_sec = bcd2hex(cmd.buffer[0]);
400 time->tm_min = bcd2hex(cmd.buffer[1]);
401 time->tm_hour = bcd2hex(cmd.buffer[2]);
402 time->tm_wday = bcd2hex(cmd.buffer[3]);
403 time->tm_mday = bcd2hex(cmd.buffer[4]);
404 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
405 time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
406
407 return 0;
408}
409
410
411int smu_set_rtc_time(struct rtc_time *time, int spinwait)
412{
413 struct smu_simple_cmd cmd;
414 int rc;
415
416 if (smu == NULL)
417 return -ENODEV;
418
419 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
420 SMU_CMD_RTC_SET_DATETIME,
421 hex2bcd(time->tm_sec),
422 hex2bcd(time->tm_min),
423 hex2bcd(time->tm_hour),
424 time->tm_wday,
425 hex2bcd(time->tm_mday),
426 hex2bcd(time->tm_mon) + 1,
427 hex2bcd(time->tm_year - 100));
428 if (rc)
429 return rc;
430 smu_spinwait_simple(&cmd);
431
432 return 0;
433}
434
435
436void smu_shutdown(void)
437{
438 struct smu_simple_cmd cmd;
439
440 if (smu == NULL)
441 return;
442
443 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
444 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
445 return;
446 smu_spinwait_simple(&cmd);
447 for (;;)
448 ;
449}
450
451
452void smu_restart(void)
453{
454 struct smu_simple_cmd cmd;
455
456 if (smu == NULL)
457 return;
458
459 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
460 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
461 return;
462 smu_spinwait_simple(&cmd);
463 for (;;)
464 ;
465}
466
467
468int smu_present(void)
469{
470 return smu != NULL;
471}
472EXPORT_SYMBOL(smu_present);
473
474
475int __init smu_init (void)
476{
477 struct device_node *np;
478 const u32 *data;
479 int ret = 0;
480
481 np = of_find_node_by_type(NULL, "smu");
482 if (np == NULL)
483 return -ENODEV;
484
485 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
486
487 if (smu_cmdbuf_abs == 0) {
488 printk(KERN_ERR "SMU: Command buffer not allocated !\n");
489 ret = -EINVAL;
490 goto fail_np;
491 }
492
493 smu = alloc_bootmem(sizeof(struct smu_device));
494
495 spin_lock_init(&smu->lock);
496 INIT_LIST_HEAD(&smu->cmd_list);
497 INIT_LIST_HEAD(&smu->cmd_i2c_list);
498 smu->of_node = np;
499 smu->db_irq = NO_IRQ;
500 smu->msg_irq = NO_IRQ;
501
502 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
503 * 32 bits value safely
504 */
505 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
506 smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
507
508 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
509 if (smu->db_node == NULL) {
510 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
511 ret = -ENXIO;
512 goto fail_bootmem;
513 }
514 data = of_get_property(smu->db_node, "reg", NULL);
515 if (data == NULL) {
516 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
517 ret = -ENXIO;
518 goto fail_db_node;
519 }
520
521 /* Current setup has one doorbell GPIO that does both doorbell
522 * and ack. GPIOs are at 0x50, best would be to find that out
523 * in the device-tree though.
524 */
525 smu->doorbell = *data;
526 if (smu->doorbell < 0x50)
527 smu->doorbell += 0x50;
528
529 /* Now look for the smu-interrupt GPIO */
530 do {
531 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
532 if (smu->msg_node == NULL)
533 break;
534 data = of_get_property(smu->msg_node, "reg", NULL);
535 if (data == NULL) {
536 of_node_put(smu->msg_node);
537 smu->msg_node = NULL;
538 break;
539 }
540 smu->msg = *data;
541 if (smu->msg < 0x50)
542 smu->msg += 0x50;
543 } while(0);
544
545 /* Doorbell buffer is currently hard-coded, I didn't find a proper
546 * device-tree entry giving the address. Best would probably to use
547 * an offset for K2 base though, but let's do it that way for now.
548 */
549 smu->db_buf = ioremap(0x8000860c, 0x1000);
550 if (smu->db_buf == NULL) {
551 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
552 ret = -ENXIO;
553 goto fail_msg_node;
554 }
555
556 /* U3 has an issue with NAP mode when issuing SMU commands */
557 smu->broken_nap = pmac_get_uninorth_variant() < 4;
558 if (smu->broken_nap)
559 printk(KERN_INFO "SMU: using NAP mode workaround\n");
560
561 sys_ctrler = SYS_CTRLER_SMU;
562 return 0;
563
564fail_msg_node:
565 if (smu->msg_node)
566 of_node_put(smu->msg_node);
567fail_db_node:
568 of_node_put(smu->db_node);
569fail_bootmem:
570 free_bootmem((unsigned long)smu, sizeof(struct smu_device));
571 smu = NULL;
572fail_np:
573 of_node_put(np);
574 return ret;
575}
576
577
578static int smu_late_init(void)
579{
580 if (!smu)
581 return 0;
582
583 init_timer(&smu->i2c_timer);
584 smu->i2c_timer.function = smu_i2c_retry;
585 smu->i2c_timer.data = (unsigned long)smu;
586
587 if (smu->db_node) {
588 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
589 if (smu->db_irq == NO_IRQ)
590 printk(KERN_ERR "smu: failed to map irq for node %s\n",
591 smu->db_node->full_name);
592 }
593 if (smu->msg_node) {
594 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
595 if (smu->msg_irq == NO_IRQ)
596 printk(KERN_ERR "smu: failed to map irq for node %s\n",
597 smu->msg_node->full_name);
598 }
599
600 /*
601 * Try to request the interrupts
602 */
603
604 if (smu->db_irq != NO_IRQ) {
605 if (request_irq(smu->db_irq, smu_db_intr,
606 IRQF_SHARED, "SMU doorbell", smu) < 0) {
607 printk(KERN_WARNING "SMU: can't "
608 "request interrupt %d\n",
609 smu->db_irq);
610 smu->db_irq = NO_IRQ;
611 }
612 }
613
614 if (smu->msg_irq != NO_IRQ) {
615 if (request_irq(smu->msg_irq, smu_msg_intr,
616 IRQF_SHARED, "SMU message", smu) < 0) {
617 printk(KERN_WARNING "SMU: can't "
618 "request interrupt %d\n",
619 smu->msg_irq);
620 smu->msg_irq = NO_IRQ;
621 }
622 }
623
624 smu_irq_inited = 1;
625 return 0;
626}
627/* This has to be before arch_initcall as the low i2c stuff relies on the
628 * above having been done before we reach arch_initcalls
629 */
630core_initcall(smu_late_init);
631
632/*
633 * sysfs visibility
634 */
635
636static void smu_expose_childs(struct work_struct *unused)
637{
638 struct device_node *np;
639
640 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
641 if (of_device_is_compatible(np, "smu-sensors"))
642 of_platform_device_create(np, "smu-sensors",
643 &smu->of_dev->dev);
644}
645
646static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
647
648static int smu_platform_probe(struct platform_device* dev)
649{
650 if (!smu)
651 return -ENODEV;
652 smu->of_dev = dev;
653
654 /*
655 * Ok, we are matched, now expose all i2c busses. We have to defer
656 * that unfortunately or it would deadlock inside the device model
657 */
658 schedule_work(&smu_expose_childs_work);
659
660 return 0;
661}
662
663static const struct of_device_id smu_platform_match[] =
664{
665 {
666 .type = "smu",
667 },
668 {},
669};
670
671static struct platform_driver smu_of_platform_driver =
672{
673 .driver = {
674 .name = "smu",
675 .owner = THIS_MODULE,
676 .of_match_table = smu_platform_match,
677 },
678 .probe = smu_platform_probe,
679};
680
681static int __init smu_init_sysfs(void)
682{
683 /*
684 * Due to sysfs bogosity, a sysdev is not a real device, so
685 * we should in fact create both if we want sysdev semantics
686 * for power management.
687 * For now, we don't power manage machines with an SMU chip,
688 * I'm a bit too far from figuring out how that works with those
689 * new chipsets, but that will come back and bite us
690 */
691 platform_driver_register(&smu_of_platform_driver);
692 return 0;
693}
694
695device_initcall(smu_init_sysfs);
696
697struct platform_device *smu_get_ofdev(void)
698{
699 if (!smu)
700 return NULL;
701 return smu->of_dev;
702}
703
704EXPORT_SYMBOL_GPL(smu_get_ofdev);
705
706/*
707 * i2c interface
708 */
709
710static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
711{
712 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
713 void *misc = cmd->misc;
714 unsigned long flags;
715
716 /* Check for read case */
717 if (!fail && cmd->read) {
718 if (cmd->pdata[0] < 1)
719 fail = 1;
720 else
721 memcpy(cmd->info.data, &cmd->pdata[1],
722 cmd->info.datalen);
723 }
724
725 DPRINTK("SMU: completing, success: %d\n", !fail);
726
727 /* Update status and mark no pending i2c command with lock
728 * held so nobody comes in while we dequeue an eventual
729 * pending next i2c command
730 */
731 spin_lock_irqsave(&smu->lock, flags);
732 smu->cmd_i2c_cur = NULL;
733 wmb();
734 cmd->status = fail ? -EIO : 0;
735
736 /* Is there another i2c command waiting ? */
737 if (!list_empty(&smu->cmd_i2c_list)) {
738 struct smu_i2c_cmd *newcmd;
739
740 /* Fetch it, new current, remove from list */
741 newcmd = list_entry(smu->cmd_i2c_list.next,
742 struct smu_i2c_cmd, link);
743 smu->cmd_i2c_cur = newcmd;
744 list_del(&cmd->link);
745
746 /* Queue with low level smu */
747 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
748 if (smu->cmd_cur == NULL)
749 smu_start_cmd();
750 }
751 spin_unlock_irqrestore(&smu->lock, flags);
752
753 /* Call command completion handler if any */
754 if (done)
755 done(cmd, misc);
756
757}
758
759
760static void smu_i2c_retry(unsigned long data)
761{
762 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
763
764 DPRINTK("SMU: i2c failure, requeuing...\n");
765
766 /* requeue command simply by resetting reply_len */
767 cmd->pdata[0] = 0xff;
768 cmd->scmd.reply_len = sizeof(cmd->pdata);
769 smu_queue_cmd(&cmd->scmd);
770}
771
772
773static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
774{
775 struct smu_i2c_cmd *cmd = misc;
776 int fail = 0;
777
778 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
779 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
780
781 /* Check for possible status */
782 if (scmd->status < 0)
783 fail = 1;
784 else if (cmd->read) {
785 if (cmd->stage == 0)
786 fail = cmd->pdata[0] != 0;
787 else
788 fail = cmd->pdata[0] >= 0x80;
789 } else {
790 fail = cmd->pdata[0] != 0;
791 }
792
793 /* Handle failures by requeuing command, after 5ms interval
794 */
795 if (fail && --cmd->retries > 0) {
796 DPRINTK("SMU: i2c failure, starting timer...\n");
797 BUG_ON(cmd != smu->cmd_i2c_cur);
798 if (!smu_irq_inited) {
799 mdelay(5);
800 smu_i2c_retry(0);
801 return;
802 }
803 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
804 return;
805 }
806
807 /* If failure or stage 1, command is complete */
808 if (fail || cmd->stage != 0) {
809 smu_i2c_complete_command(cmd, fail);
810 return;
811 }
812
813 DPRINTK("SMU: going to stage 1\n");
814
815 /* Ok, initial command complete, now poll status */
816 scmd->reply_buf = cmd->pdata;
817 scmd->reply_len = sizeof(cmd->pdata);
818 scmd->data_buf = cmd->pdata;
819 scmd->data_len = 1;
820 cmd->pdata[0] = 0;
821 cmd->stage = 1;
822 cmd->retries = 20;
823 smu_queue_cmd(scmd);
824}
825
826
827int smu_queue_i2c(struct smu_i2c_cmd *cmd)
828{
829 unsigned long flags;
830
831 if (smu == NULL)
832 return -ENODEV;
833
834 /* Fill most fields of scmd */
835 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
836 cmd->scmd.done = smu_i2c_low_completion;
837 cmd->scmd.misc = cmd;
838 cmd->scmd.reply_buf = cmd->pdata;
839 cmd->scmd.reply_len = sizeof(cmd->pdata);
840 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
841 cmd->scmd.status = 1;
842 cmd->stage = 0;
843 cmd->pdata[0] = 0xff;
844 cmd->retries = 20;
845 cmd->status = 1;
846
847 /* Check transfer type, sanitize some "info" fields
848 * based on transfer type and do more checking
849 */
850 cmd->info.caddr = cmd->info.devaddr;
851 cmd->read = cmd->info.devaddr & 0x01;
852 switch(cmd->info.type) {
853 case SMU_I2C_TRANSFER_SIMPLE:
854 memset(&cmd->info.sublen, 0, 4);
855 break;
856 case SMU_I2C_TRANSFER_COMBINED:
857 cmd->info.devaddr &= 0xfe;
858 case SMU_I2C_TRANSFER_STDSUB:
859 if (cmd->info.sublen > 3)
860 return -EINVAL;
861 break;
862 default:
863 return -EINVAL;
864 }
865
866 /* Finish setting up command based on transfer direction
867 */
868 if (cmd->read) {
869 if (cmd->info.datalen > SMU_I2C_READ_MAX)
870 return -EINVAL;
871 memset(cmd->info.data, 0xff, cmd->info.datalen);
872 cmd->scmd.data_len = 9;
873 } else {
874 if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
875 return -EINVAL;
876 cmd->scmd.data_len = 9 + cmd->info.datalen;
877 }
878
879 DPRINTK("SMU: i2c enqueuing command\n");
880 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
881 cmd->read ? "read" : "write", cmd->info.datalen,
882 cmd->info.bus, cmd->info.caddr,
883 cmd->info.subaddr[0], cmd->info.type);
884
885
886 /* Enqueue command in i2c list, and if empty, enqueue also in
887 * main command list
888 */
889 spin_lock_irqsave(&smu->lock, flags);
890 if (smu->cmd_i2c_cur == NULL) {
891 smu->cmd_i2c_cur = cmd;
892 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
893 if (smu->cmd_cur == NULL)
894 smu_start_cmd();
895 } else
896 list_add_tail(&cmd->link, &smu->cmd_i2c_list);
897 spin_unlock_irqrestore(&smu->lock, flags);
898
899 return 0;
900}
901
902/*
903 * Handling of "partitions"
904 */
905
906static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
907{
908 DECLARE_COMPLETION_ONSTACK(comp);
909 unsigned int chunk;
910 struct smu_cmd cmd;
911 int rc;
912 u8 params[8];
913
914 /* We currently use a chunk size of 0xe. We could check the
915 * SMU firmware version and use bigger sizes though
916 */
917 chunk = 0xe;
918
919 while (len) {
920 unsigned int clen = min(len, chunk);
921
922 cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
923 cmd.data_len = 7;
924 cmd.data_buf = params;
925 cmd.reply_len = chunk;
926 cmd.reply_buf = dest;
927 cmd.done = smu_done_complete;
928 cmd.misc = ∁
929 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
930 params[1] = 0x4;
931 *((u32 *)¶ms[2]) = addr;
932 params[6] = clen;
933
934 rc = smu_queue_cmd(&cmd);
935 if (rc)
936 return rc;
937 wait_for_completion(&comp);
938 if (cmd.status != 0)
939 return rc;
940 if (cmd.reply_len != clen) {
941 printk(KERN_DEBUG "SMU: short read in "
942 "smu_read_datablock, got: %d, want: %d\n",
943 cmd.reply_len, clen);
944 return -EIO;
945 }
946 len -= clen;
947 addr += clen;
948 dest += clen;
949 }
950 return 0;
951}
952
953static struct smu_sdbp_header *smu_create_sdb_partition(int id)
954{
955 DECLARE_COMPLETION_ONSTACK(comp);
956 struct smu_simple_cmd cmd;
957 unsigned int addr, len, tlen;
958 struct smu_sdbp_header *hdr;
959 struct property *prop;
960
961 /* First query the partition info */
962 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
963 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
964 smu_done_complete, &comp,
965 SMU_CMD_PARTITION_LATEST, id);
966 wait_for_completion(&comp);
967 DPRINTK("SMU: done, status: %d, reply_len: %d\n",
968 cmd.cmd.status, cmd.cmd.reply_len);
969
970 /* Partition doesn't exist (or other error) */
971 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
972 return NULL;
973
974 /* Fetch address and length from reply */
975 addr = *((u16 *)cmd.buffer);
976 len = cmd.buffer[3] << 2;
977 /* Calucluate total length to allocate, including the 17 bytes
978 * for "sdb-partition-XX" that we append at the end of the buffer
979 */
980 tlen = sizeof(struct property) + len + 18;
981
982 prop = kzalloc(tlen, GFP_KERNEL);
983 if (prop == NULL)
984 return NULL;
985 hdr = (struct smu_sdbp_header *)(prop + 1);
986 prop->name = ((char *)prop) + tlen - 18;
987 sprintf(prop->name, "sdb-partition-%02x", id);
988 prop->length = len;
989 prop->value = hdr;
990 prop->next = NULL;
991
992 /* Read the datablock */
993 if (smu_read_datablock((u8 *)hdr, addr, len)) {
994 printk(KERN_DEBUG "SMU: datablock read failed while reading "
995 "partition %02x !\n", id);
996 goto failure;
997 }
998
999 /* Got it, check a few things and create the property */
1000 if (hdr->id != id) {
1001 printk(KERN_DEBUG "SMU: Reading partition %02x and got "
1002 "%02x !\n", id, hdr->id);
1003 goto failure;
1004 }
1005 if (prom_add_property(smu->of_node, prop)) {
1006 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
1007 "property !\n", id);
1008 goto failure;
1009 }
1010
1011 return hdr;
1012 failure:
1013 kfree(prop);
1014 return NULL;
1015}
1016
1017/* Note: Only allowed to return error code in pointers (using ERR_PTR)
1018 * when interruptible is 1
1019 */
1020const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1021 unsigned int *size, int interruptible)
1022{
1023 char pname[32];
1024 const struct smu_sdbp_header *part;
1025
1026 if (!smu)
1027 return NULL;
1028
1029 sprintf(pname, "sdb-partition-%02x", id);
1030
1031 DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1032
1033 if (interruptible) {
1034 int rc;
1035 rc = mutex_lock_interruptible(&smu_part_access);
1036 if (rc)
1037 return ERR_PTR(rc);
1038 } else
1039 mutex_lock(&smu_part_access);
1040
1041 part = of_get_property(smu->of_node, pname, size);
1042 if (part == NULL) {
1043 DPRINTK("trying to extract from SMU ...\n");
1044 part = smu_create_sdb_partition(id);
1045 if (part != NULL && size)
1046 *size = part->len << 2;
1047 }
1048 mutex_unlock(&smu_part_access);
1049 return part;
1050}
1051
1052const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
1053{
1054 return __smu_get_sdb_partition(id, size, 0);
1055}
1056EXPORT_SYMBOL(smu_get_sdb_partition);
1057
1058
1059/*
1060 * Userland driver interface
1061 */
1062
1063
1064static LIST_HEAD(smu_clist);
1065static DEFINE_SPINLOCK(smu_clist_lock);
1066
1067enum smu_file_mode {
1068 smu_file_commands,
1069 smu_file_events,
1070 smu_file_closing
1071};
1072
1073struct smu_private
1074{
1075 struct list_head list;
1076 enum smu_file_mode mode;
1077 int busy;
1078 struct smu_cmd cmd;
1079 spinlock_t lock;
1080 wait_queue_head_t wait;
1081 u8 buffer[SMU_MAX_DATA];
1082};
1083
1084
1085static int smu_open(struct inode *inode, struct file *file)
1086{
1087 struct smu_private *pp;
1088 unsigned long flags;
1089
1090 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1091 if (pp == 0)
1092 return -ENOMEM;
1093 spin_lock_init(&pp->lock);
1094 pp->mode = smu_file_commands;
1095 init_waitqueue_head(&pp->wait);
1096
1097 mutex_lock(&smu_mutex);
1098 spin_lock_irqsave(&smu_clist_lock, flags);
1099 list_add(&pp->list, &smu_clist);
1100 spin_unlock_irqrestore(&smu_clist_lock, flags);
1101 file->private_data = pp;
1102 mutex_unlock(&smu_mutex);
1103
1104 return 0;
1105}
1106
1107
1108static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1109{
1110 struct smu_private *pp = misc;
1111
1112 wake_up_all(&pp->wait);
1113}
1114
1115
1116static ssize_t smu_write(struct file *file, const char __user *buf,
1117 size_t count, loff_t *ppos)
1118{
1119 struct smu_private *pp = file->private_data;
1120 unsigned long flags;
1121 struct smu_user_cmd_hdr hdr;
1122 int rc = 0;
1123
1124 if (pp->busy)
1125 return -EBUSY;
1126 else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1127 return -EFAULT;
1128 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1129 pp->mode = smu_file_events;
1130 return 0;
1131 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
1132 const struct smu_sdbp_header *part;
1133 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1134 if (part == NULL)
1135 return -EINVAL;
1136 else if (IS_ERR(part))
1137 return PTR_ERR(part);
1138 return 0;
1139 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1140 return -EINVAL;
1141 else if (pp->mode != smu_file_commands)
1142 return -EBADFD;
1143 else if (hdr.data_len > SMU_MAX_DATA)
1144 return -EINVAL;
1145
1146 spin_lock_irqsave(&pp->lock, flags);
1147 if (pp->busy) {
1148 spin_unlock_irqrestore(&pp->lock, flags);
1149 return -EBUSY;
1150 }
1151 pp->busy = 1;
1152 pp->cmd.status = 1;
1153 spin_unlock_irqrestore(&pp->lock, flags);
1154
1155 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1156 pp->busy = 0;
1157 return -EFAULT;
1158 }
1159
1160 pp->cmd.cmd = hdr.cmd;
1161 pp->cmd.data_len = hdr.data_len;
1162 pp->cmd.reply_len = SMU_MAX_DATA;
1163 pp->cmd.data_buf = pp->buffer;
1164 pp->cmd.reply_buf = pp->buffer;
1165 pp->cmd.done = smu_user_cmd_done;
1166 pp->cmd.misc = pp;
1167 rc = smu_queue_cmd(&pp->cmd);
1168 if (rc < 0)
1169 return rc;
1170 return count;
1171}
1172
1173
1174static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1175 char __user *buf, size_t count)
1176{
1177 DECLARE_WAITQUEUE(wait, current);
1178 struct smu_user_reply_hdr hdr;
1179 unsigned long flags;
1180 int size, rc = 0;
1181
1182 if (!pp->busy)
1183 return 0;
1184 if (count < sizeof(struct smu_user_reply_hdr))
1185 return -EOVERFLOW;
1186 spin_lock_irqsave(&pp->lock, flags);
1187 if (pp->cmd.status == 1) {
1188 if (file->f_flags & O_NONBLOCK) {
1189 spin_unlock_irqrestore(&pp->lock, flags);
1190 return -EAGAIN;
1191 }
1192 add_wait_queue(&pp->wait, &wait);
1193 for (;;) {
1194 set_current_state(TASK_INTERRUPTIBLE);
1195 rc = 0;
1196 if (pp->cmd.status != 1)
1197 break;
1198 rc = -ERESTARTSYS;
1199 if (signal_pending(current))
1200 break;
1201 spin_unlock_irqrestore(&pp->lock, flags);
1202 schedule();
1203 spin_lock_irqsave(&pp->lock, flags);
1204 }
1205 set_current_state(TASK_RUNNING);
1206 remove_wait_queue(&pp->wait, &wait);
1207 }
1208 spin_unlock_irqrestore(&pp->lock, flags);
1209 if (rc)
1210 return rc;
1211 if (pp->cmd.status != 0)
1212 pp->cmd.reply_len = 0;
1213 size = sizeof(hdr) + pp->cmd.reply_len;
1214 if (count < size)
1215 size = count;
1216 rc = size;
1217 hdr.status = pp->cmd.status;
1218 hdr.reply_len = pp->cmd.reply_len;
1219 if (copy_to_user(buf, &hdr, sizeof(hdr)))
1220 return -EFAULT;
1221 size -= sizeof(hdr);
1222 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1223 return -EFAULT;
1224 pp->busy = 0;
1225
1226 return rc;
1227}
1228
1229
1230static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1231 char __user *buf, size_t count)
1232{
1233 /* Not implemented */
1234 msleep_interruptible(1000);
1235 return 0;
1236}
1237
1238
1239static ssize_t smu_read(struct file *file, char __user *buf,
1240 size_t count, loff_t *ppos)
1241{
1242 struct smu_private *pp = file->private_data;
1243
1244 if (pp->mode == smu_file_commands)
1245 return smu_read_command(file, pp, buf, count);
1246 if (pp->mode == smu_file_events)
1247 return smu_read_events(file, pp, buf, count);
1248
1249 return -EBADFD;
1250}
1251
1252static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1253{
1254 struct smu_private *pp = file->private_data;
1255 unsigned int mask = 0;
1256 unsigned long flags;
1257
1258 if (pp == 0)
1259 return 0;
1260
1261 if (pp->mode == smu_file_commands) {
1262 poll_wait(file, &pp->wait, wait);
1263
1264 spin_lock_irqsave(&pp->lock, flags);
1265 if (pp->busy && pp->cmd.status != 1)
1266 mask |= POLLIN;
1267 spin_unlock_irqrestore(&pp->lock, flags);
1268 } if (pp->mode == smu_file_events) {
1269 /* Not yet implemented */
1270 }
1271 return mask;
1272}
1273
1274static int smu_release(struct inode *inode, struct file *file)
1275{
1276 struct smu_private *pp = file->private_data;
1277 unsigned long flags;
1278 unsigned int busy;
1279
1280 if (pp == 0)
1281 return 0;
1282
1283 file->private_data = NULL;
1284
1285 /* Mark file as closing to avoid races with new request */
1286 spin_lock_irqsave(&pp->lock, flags);
1287 pp->mode = smu_file_closing;
1288 busy = pp->busy;
1289
1290 /* Wait for any pending request to complete */
1291 if (busy && pp->cmd.status == 1) {
1292 DECLARE_WAITQUEUE(wait, current);
1293
1294 add_wait_queue(&pp->wait, &wait);
1295 for (;;) {
1296 set_current_state(TASK_UNINTERRUPTIBLE);
1297 if (pp->cmd.status != 1)
1298 break;
1299 spin_unlock_irqrestore(&pp->lock, flags);
1300 schedule();
1301 spin_lock_irqsave(&pp->lock, flags);
1302 }
1303 set_current_state(TASK_RUNNING);
1304 remove_wait_queue(&pp->wait, &wait);
1305 }
1306 spin_unlock_irqrestore(&pp->lock, flags);
1307
1308 spin_lock_irqsave(&smu_clist_lock, flags);
1309 list_del(&pp->list);
1310 spin_unlock_irqrestore(&smu_clist_lock, flags);
1311 kfree(pp);
1312
1313 return 0;
1314}
1315
1316
1317static const struct file_operations smu_device_fops = {
1318 .llseek = no_llseek,
1319 .read = smu_read,
1320 .write = smu_write,
1321 .poll = smu_fpoll,
1322 .open = smu_open,
1323 .release = smu_release,
1324};
1325
1326static struct miscdevice pmu_device = {
1327 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1328};
1329
1330static int smu_device_init(void)
1331{
1332 if (!smu)
1333 return -ENODEV;
1334 if (misc_register(&pmu_device) < 0)
1335 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1336 return 0;
1337}
1338device_initcall(smu_device_init);
1/*
2 * PowerMac G5 SMU driver
3 *
4 * Copyright 2004 J. Mayer <l_indien@magic.fr>
5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
6 *
7 * Released under the term of the GNU GPL v2.
8 */
9
10/*
11 * TODO:
12 * - maybe add timeout to commands ?
13 * - blocking version of time functions
14 * - polling version of i2c commands (including timer that works with
15 * interrupts off)
16 * - maybe avoid some data copies with i2c by directly using the smu cmd
17 * buffer and a lower level internal interface
18 * - understand SMU -> CPU events and implement reception of them via
19 * the userland interface
20 */
21
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/device.h>
25#include <linux/dmapool.h>
26#include <linux/bootmem.h>
27#include <linux/vmalloc.h>
28#include <linux/highmem.h>
29#include <linux/jiffies.h>
30#include <linux/interrupt.h>
31#include <linux/rtc.h>
32#include <linux/completion.h>
33#include <linux/miscdevice.h>
34#include <linux/delay.h>
35#include <linux/poll.h>
36#include <linux/mutex.h>
37#include <linux/of_device.h>
38#include <linux/of_irq.h>
39#include <linux/of_platform.h>
40#include <linux/slab.h>
41
42#include <asm/byteorder.h>
43#include <asm/io.h>
44#include <asm/prom.h>
45#include <asm/machdep.h>
46#include <asm/pmac_feature.h>
47#include <asm/smu.h>
48#include <asm/sections.h>
49#include <asm/uaccess.h>
50
51#define VERSION "0.7"
52#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
53
54#undef DEBUG_SMU
55
56#ifdef DEBUG_SMU
57#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
58#else
59#define DPRINTK(fmt, args...) do { } while (0)
60#endif
61
62/*
63 * This is the command buffer passed to the SMU hardware
64 */
65#define SMU_MAX_DATA 254
66
67struct smu_cmd_buf {
68 u8 cmd;
69 u8 length;
70 u8 data[SMU_MAX_DATA];
71};
72
73struct smu_device {
74 spinlock_t lock;
75 struct device_node *of_node;
76 struct platform_device *of_dev;
77 int doorbell; /* doorbell gpio */
78 u32 __iomem *db_buf; /* doorbell buffer */
79 struct device_node *db_node;
80 unsigned int db_irq;
81 int msg;
82 struct device_node *msg_node;
83 unsigned int msg_irq;
84 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
85 u32 cmd_buf_abs; /* command buffer absolute */
86 struct list_head cmd_list;
87 struct smu_cmd *cmd_cur; /* pending command */
88 int broken_nap;
89 struct list_head cmd_i2c_list;
90 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
91 struct timer_list i2c_timer;
92};
93
94/*
95 * I don't think there will ever be more than one SMU, so
96 * for now, just hard code that
97 */
98static DEFINE_MUTEX(smu_mutex);
99static struct smu_device *smu;
100static DEFINE_MUTEX(smu_part_access);
101static int smu_irq_inited;
102
103static void smu_i2c_retry(unsigned long data);
104
105/*
106 * SMU driver low level stuff
107 */
108
109static void smu_start_cmd(void)
110{
111 unsigned long faddr, fend;
112 struct smu_cmd *cmd;
113
114 if (list_empty(&smu->cmd_list))
115 return;
116
117 /* Fetch first command in queue */
118 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
119 smu->cmd_cur = cmd;
120 list_del(&cmd->link);
121
122 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
123 cmd->data_len);
124 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
125
126 /* Fill the SMU command buffer */
127 smu->cmd_buf->cmd = cmd->cmd;
128 smu->cmd_buf->length = cmd->data_len;
129 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
130
131 /* Flush command and data to RAM */
132 faddr = (unsigned long)smu->cmd_buf;
133 fend = faddr + smu->cmd_buf->length + 2;
134 flush_inval_dcache_range(faddr, fend);
135
136
137 /* We also disable NAP mode for the duration of the command
138 * on U3 based machines.
139 * This is slightly racy as it can be written back to 1 by a sysctl
140 * but that never happens in practice. There seem to be an issue with
141 * U3 based machines such as the iMac G5 where napping for the
142 * whole duration of the command prevents the SMU from fetching it
143 * from memory. This might be related to the strange i2c based
144 * mechanism the SMU uses to access memory.
145 */
146 if (smu->broken_nap)
147 powersave_nap = 0;
148
149 /* This isn't exactly a DMA mapping here, I suspect
150 * the SMU is actually communicating with us via i2c to the
151 * northbridge or the CPU to access RAM.
152 */
153 writel(smu->cmd_buf_abs, smu->db_buf);
154
155 /* Ring the SMU doorbell */
156 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
157}
158
159
160static irqreturn_t smu_db_intr(int irq, void *arg)
161{
162 unsigned long flags;
163 struct smu_cmd *cmd;
164 void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
165 void *misc = NULL;
166 u8 gpio;
167 int rc = 0;
168
169 /* SMU completed the command, well, we hope, let's make sure
170 * of it
171 */
172 spin_lock_irqsave(&smu->lock, flags);
173
174 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
175 if ((gpio & 7) != 7) {
176 spin_unlock_irqrestore(&smu->lock, flags);
177 return IRQ_HANDLED;
178 }
179
180 cmd = smu->cmd_cur;
181 smu->cmd_cur = NULL;
182 if (cmd == NULL)
183 goto bail;
184
185 if (rc == 0) {
186 unsigned long faddr;
187 int reply_len;
188 u8 ack;
189
190 /* CPU might have brought back the cache line, so we need
191 * to flush again before peeking at the SMU response. We
192 * flush the entire buffer for now as we haven't read the
193 * reply length (it's only 2 cache lines anyway)
194 */
195 faddr = (unsigned long)smu->cmd_buf;
196 flush_inval_dcache_range(faddr, faddr + 256);
197
198 /* Now check ack */
199 ack = (~cmd->cmd) & 0xff;
200 if (ack != smu->cmd_buf->cmd) {
201 DPRINTK("SMU: incorrect ack, want %x got %x\n",
202 ack, smu->cmd_buf->cmd);
203 rc = -EIO;
204 }
205 reply_len = rc == 0 ? smu->cmd_buf->length : 0;
206 DPRINTK("SMU: reply len: %d\n", reply_len);
207 if (reply_len > cmd->reply_len) {
208 printk(KERN_WARNING "SMU: reply buffer too small,"
209 "got %d bytes for a %d bytes buffer\n",
210 reply_len, cmd->reply_len);
211 reply_len = cmd->reply_len;
212 }
213 cmd->reply_len = reply_len;
214 if (cmd->reply_buf && reply_len)
215 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
216 }
217
218 /* Now complete the command. Write status last in order as we lost
219 * ownership of the command structure as soon as it's no longer -1
220 */
221 done = cmd->done;
222 misc = cmd->misc;
223 mb();
224 cmd->status = rc;
225
226 /* Re-enable NAP mode */
227 if (smu->broken_nap)
228 powersave_nap = 1;
229 bail:
230 /* Start next command if any */
231 smu_start_cmd();
232 spin_unlock_irqrestore(&smu->lock, flags);
233
234 /* Call command completion handler if any */
235 if (done)
236 done(cmd, misc);
237
238 /* It's an edge interrupt, nothing to do */
239 return IRQ_HANDLED;
240}
241
242
243static irqreturn_t smu_msg_intr(int irq, void *arg)
244{
245 /* I don't quite know what to do with this one, we seem to never
246 * receive it, so I suspect we have to arm it someway in the SMU
247 * to start getting events that way.
248 */
249
250 printk(KERN_INFO "SMU: message interrupt !\n");
251
252 /* It's an edge interrupt, nothing to do */
253 return IRQ_HANDLED;
254}
255
256
257/*
258 * Queued command management.
259 *
260 */
261
262int smu_queue_cmd(struct smu_cmd *cmd)
263{
264 unsigned long flags;
265
266 if (smu == NULL)
267 return -ENODEV;
268 if (cmd->data_len > SMU_MAX_DATA ||
269 cmd->reply_len > SMU_MAX_DATA)
270 return -EINVAL;
271
272 cmd->status = 1;
273 spin_lock_irqsave(&smu->lock, flags);
274 list_add_tail(&cmd->link, &smu->cmd_list);
275 if (smu->cmd_cur == NULL)
276 smu_start_cmd();
277 spin_unlock_irqrestore(&smu->lock, flags);
278
279 /* Workaround for early calls when irq isn't available */
280 if (!smu_irq_inited || smu->db_irq == NO_IRQ)
281 smu_spinwait_cmd(cmd);
282
283 return 0;
284}
285EXPORT_SYMBOL(smu_queue_cmd);
286
287
288int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
289 unsigned int data_len,
290 void (*done)(struct smu_cmd *cmd, void *misc),
291 void *misc, ...)
292{
293 struct smu_cmd *cmd = &scmd->cmd;
294 va_list list;
295 int i;
296
297 if (data_len > sizeof(scmd->buffer))
298 return -EINVAL;
299
300 memset(scmd, 0, sizeof(*scmd));
301 cmd->cmd = command;
302 cmd->data_len = data_len;
303 cmd->data_buf = scmd->buffer;
304 cmd->reply_len = sizeof(scmd->buffer);
305 cmd->reply_buf = scmd->buffer;
306 cmd->done = done;
307 cmd->misc = misc;
308
309 va_start(list, misc);
310 for (i = 0; i < data_len; ++i)
311 scmd->buffer[i] = (u8)va_arg(list, int);
312 va_end(list);
313
314 return smu_queue_cmd(cmd);
315}
316EXPORT_SYMBOL(smu_queue_simple);
317
318
319void smu_poll(void)
320{
321 u8 gpio;
322
323 if (smu == NULL)
324 return;
325
326 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
327 if ((gpio & 7) == 7)
328 smu_db_intr(smu->db_irq, smu);
329}
330EXPORT_SYMBOL(smu_poll);
331
332
333void smu_done_complete(struct smu_cmd *cmd, void *misc)
334{
335 struct completion *comp = misc;
336
337 complete(comp);
338}
339EXPORT_SYMBOL(smu_done_complete);
340
341
342void smu_spinwait_cmd(struct smu_cmd *cmd)
343{
344 while(cmd->status == 1)
345 smu_poll();
346}
347EXPORT_SYMBOL(smu_spinwait_cmd);
348
349
350/* RTC low level commands */
351static inline int bcd2hex (int n)
352{
353 return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
354}
355
356
357static inline int hex2bcd (int n)
358{
359 return ((n / 10) << 4) + (n % 10);
360}
361
362
363static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
364 struct rtc_time *time)
365{
366 cmd_buf->cmd = 0x8e;
367 cmd_buf->length = 8;
368 cmd_buf->data[0] = 0x80;
369 cmd_buf->data[1] = hex2bcd(time->tm_sec);
370 cmd_buf->data[2] = hex2bcd(time->tm_min);
371 cmd_buf->data[3] = hex2bcd(time->tm_hour);
372 cmd_buf->data[4] = time->tm_wday;
373 cmd_buf->data[5] = hex2bcd(time->tm_mday);
374 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
375 cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
376}
377
378
379int smu_get_rtc_time(struct rtc_time *time, int spinwait)
380{
381 struct smu_simple_cmd cmd;
382 int rc;
383
384 if (smu == NULL)
385 return -ENODEV;
386
387 memset(time, 0, sizeof(struct rtc_time));
388 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
389 SMU_CMD_RTC_GET_DATETIME);
390 if (rc)
391 return rc;
392 smu_spinwait_simple(&cmd);
393
394 time->tm_sec = bcd2hex(cmd.buffer[0]);
395 time->tm_min = bcd2hex(cmd.buffer[1]);
396 time->tm_hour = bcd2hex(cmd.buffer[2]);
397 time->tm_wday = bcd2hex(cmd.buffer[3]);
398 time->tm_mday = bcd2hex(cmd.buffer[4]);
399 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
400 time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
401
402 return 0;
403}
404
405
406int smu_set_rtc_time(struct rtc_time *time, int spinwait)
407{
408 struct smu_simple_cmd cmd;
409 int rc;
410
411 if (smu == NULL)
412 return -ENODEV;
413
414 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
415 SMU_CMD_RTC_SET_DATETIME,
416 hex2bcd(time->tm_sec),
417 hex2bcd(time->tm_min),
418 hex2bcd(time->tm_hour),
419 time->tm_wday,
420 hex2bcd(time->tm_mday),
421 hex2bcd(time->tm_mon) + 1,
422 hex2bcd(time->tm_year - 100));
423 if (rc)
424 return rc;
425 smu_spinwait_simple(&cmd);
426
427 return 0;
428}
429
430
431void smu_shutdown(void)
432{
433 struct smu_simple_cmd cmd;
434
435 if (smu == NULL)
436 return;
437
438 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
439 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
440 return;
441 smu_spinwait_simple(&cmd);
442 for (;;)
443 ;
444}
445
446
447void smu_restart(void)
448{
449 struct smu_simple_cmd cmd;
450
451 if (smu == NULL)
452 return;
453
454 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
455 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
456 return;
457 smu_spinwait_simple(&cmd);
458 for (;;)
459 ;
460}
461
462
463int smu_present(void)
464{
465 return smu != NULL;
466}
467EXPORT_SYMBOL(smu_present);
468
469
470int __init smu_init (void)
471{
472 struct device_node *np;
473 const u32 *data;
474 int ret = 0;
475
476 np = of_find_node_by_type(NULL, "smu");
477 if (np == NULL)
478 return -ENODEV;
479
480 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
481
482 if (smu_cmdbuf_abs == 0) {
483 printk(KERN_ERR "SMU: Command buffer not allocated !\n");
484 ret = -EINVAL;
485 goto fail_np;
486 }
487
488 smu = alloc_bootmem(sizeof(struct smu_device));
489
490 spin_lock_init(&smu->lock);
491 INIT_LIST_HEAD(&smu->cmd_list);
492 INIT_LIST_HEAD(&smu->cmd_i2c_list);
493 smu->of_node = np;
494 smu->db_irq = NO_IRQ;
495 smu->msg_irq = NO_IRQ;
496
497 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
498 * 32 bits value safely
499 */
500 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
501 smu->cmd_buf = __va(smu_cmdbuf_abs);
502
503 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
504 if (smu->db_node == NULL) {
505 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
506 ret = -ENXIO;
507 goto fail_bootmem;
508 }
509 data = of_get_property(smu->db_node, "reg", NULL);
510 if (data == NULL) {
511 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
512 ret = -ENXIO;
513 goto fail_db_node;
514 }
515
516 /* Current setup has one doorbell GPIO that does both doorbell
517 * and ack. GPIOs are at 0x50, best would be to find that out
518 * in the device-tree though.
519 */
520 smu->doorbell = *data;
521 if (smu->doorbell < 0x50)
522 smu->doorbell += 0x50;
523
524 /* Now look for the smu-interrupt GPIO */
525 do {
526 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
527 if (smu->msg_node == NULL)
528 break;
529 data = of_get_property(smu->msg_node, "reg", NULL);
530 if (data == NULL) {
531 of_node_put(smu->msg_node);
532 smu->msg_node = NULL;
533 break;
534 }
535 smu->msg = *data;
536 if (smu->msg < 0x50)
537 smu->msg += 0x50;
538 } while(0);
539
540 /* Doorbell buffer is currently hard-coded, I didn't find a proper
541 * device-tree entry giving the address. Best would probably to use
542 * an offset for K2 base though, but let's do it that way for now.
543 */
544 smu->db_buf = ioremap(0x8000860c, 0x1000);
545 if (smu->db_buf == NULL) {
546 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
547 ret = -ENXIO;
548 goto fail_msg_node;
549 }
550
551 /* U3 has an issue with NAP mode when issuing SMU commands */
552 smu->broken_nap = pmac_get_uninorth_variant() < 4;
553 if (smu->broken_nap)
554 printk(KERN_INFO "SMU: using NAP mode workaround\n");
555
556 sys_ctrler = SYS_CTRLER_SMU;
557 return 0;
558
559fail_msg_node:
560 if (smu->msg_node)
561 of_node_put(smu->msg_node);
562fail_db_node:
563 of_node_put(smu->db_node);
564fail_bootmem:
565 free_bootmem(__pa(smu), sizeof(struct smu_device));
566 smu = NULL;
567fail_np:
568 of_node_put(np);
569 return ret;
570}
571
572
573static int smu_late_init(void)
574{
575 if (!smu)
576 return 0;
577
578 init_timer(&smu->i2c_timer);
579 smu->i2c_timer.function = smu_i2c_retry;
580 smu->i2c_timer.data = (unsigned long)smu;
581
582 if (smu->db_node) {
583 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
584 if (smu->db_irq == NO_IRQ)
585 printk(KERN_ERR "smu: failed to map irq for node %s\n",
586 smu->db_node->full_name);
587 }
588 if (smu->msg_node) {
589 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
590 if (smu->msg_irq == NO_IRQ)
591 printk(KERN_ERR "smu: failed to map irq for node %s\n",
592 smu->msg_node->full_name);
593 }
594
595 /*
596 * Try to request the interrupts
597 */
598
599 if (smu->db_irq != NO_IRQ) {
600 if (request_irq(smu->db_irq, smu_db_intr,
601 IRQF_SHARED, "SMU doorbell", smu) < 0) {
602 printk(KERN_WARNING "SMU: can't "
603 "request interrupt %d\n",
604 smu->db_irq);
605 smu->db_irq = NO_IRQ;
606 }
607 }
608
609 if (smu->msg_irq != NO_IRQ) {
610 if (request_irq(smu->msg_irq, smu_msg_intr,
611 IRQF_SHARED, "SMU message", smu) < 0) {
612 printk(KERN_WARNING "SMU: can't "
613 "request interrupt %d\n",
614 smu->msg_irq);
615 smu->msg_irq = NO_IRQ;
616 }
617 }
618
619 smu_irq_inited = 1;
620 return 0;
621}
622/* This has to be before arch_initcall as the low i2c stuff relies on the
623 * above having been done before we reach arch_initcalls
624 */
625core_initcall(smu_late_init);
626
627/*
628 * sysfs visibility
629 */
630
631static void smu_expose_childs(struct work_struct *unused)
632{
633 struct device_node *np;
634
635 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
636 if (of_device_is_compatible(np, "smu-sensors"))
637 of_platform_device_create(np, "smu-sensors",
638 &smu->of_dev->dev);
639}
640
641static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
642
643static int smu_platform_probe(struct platform_device* dev)
644{
645 if (!smu)
646 return -ENODEV;
647 smu->of_dev = dev;
648
649 /*
650 * Ok, we are matched, now expose all i2c busses. We have to defer
651 * that unfortunately or it would deadlock inside the device model
652 */
653 schedule_work(&smu_expose_childs_work);
654
655 return 0;
656}
657
658static const struct of_device_id smu_platform_match[] =
659{
660 {
661 .type = "smu",
662 },
663 {},
664};
665
666static struct platform_driver smu_of_platform_driver =
667{
668 .driver = {
669 .name = "smu",
670 .owner = THIS_MODULE,
671 .of_match_table = smu_platform_match,
672 },
673 .probe = smu_platform_probe,
674};
675
676static int __init smu_init_sysfs(void)
677{
678 /*
679 * For now, we don't power manage machines with an SMU chip,
680 * I'm a bit too far from figuring out how that works with those
681 * new chipsets, but that will come back and bite us
682 */
683 platform_driver_register(&smu_of_platform_driver);
684 return 0;
685}
686
687device_initcall(smu_init_sysfs);
688
689struct platform_device *smu_get_ofdev(void)
690{
691 if (!smu)
692 return NULL;
693 return smu->of_dev;
694}
695
696EXPORT_SYMBOL_GPL(smu_get_ofdev);
697
698/*
699 * i2c interface
700 */
701
702static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
703{
704 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
705 void *misc = cmd->misc;
706 unsigned long flags;
707
708 /* Check for read case */
709 if (!fail && cmd->read) {
710 if (cmd->pdata[0] < 1)
711 fail = 1;
712 else
713 memcpy(cmd->info.data, &cmd->pdata[1],
714 cmd->info.datalen);
715 }
716
717 DPRINTK("SMU: completing, success: %d\n", !fail);
718
719 /* Update status and mark no pending i2c command with lock
720 * held so nobody comes in while we dequeue an eventual
721 * pending next i2c command
722 */
723 spin_lock_irqsave(&smu->lock, flags);
724 smu->cmd_i2c_cur = NULL;
725 wmb();
726 cmd->status = fail ? -EIO : 0;
727
728 /* Is there another i2c command waiting ? */
729 if (!list_empty(&smu->cmd_i2c_list)) {
730 struct smu_i2c_cmd *newcmd;
731
732 /* Fetch it, new current, remove from list */
733 newcmd = list_entry(smu->cmd_i2c_list.next,
734 struct smu_i2c_cmd, link);
735 smu->cmd_i2c_cur = newcmd;
736 list_del(&cmd->link);
737
738 /* Queue with low level smu */
739 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
740 if (smu->cmd_cur == NULL)
741 smu_start_cmd();
742 }
743 spin_unlock_irqrestore(&smu->lock, flags);
744
745 /* Call command completion handler if any */
746 if (done)
747 done(cmd, misc);
748
749}
750
751
752static void smu_i2c_retry(unsigned long data)
753{
754 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
755
756 DPRINTK("SMU: i2c failure, requeuing...\n");
757
758 /* requeue command simply by resetting reply_len */
759 cmd->pdata[0] = 0xff;
760 cmd->scmd.reply_len = sizeof(cmd->pdata);
761 smu_queue_cmd(&cmd->scmd);
762}
763
764
765static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
766{
767 struct smu_i2c_cmd *cmd = misc;
768 int fail = 0;
769
770 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
771 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
772
773 /* Check for possible status */
774 if (scmd->status < 0)
775 fail = 1;
776 else if (cmd->read) {
777 if (cmd->stage == 0)
778 fail = cmd->pdata[0] != 0;
779 else
780 fail = cmd->pdata[0] >= 0x80;
781 } else {
782 fail = cmd->pdata[0] != 0;
783 }
784
785 /* Handle failures by requeuing command, after 5ms interval
786 */
787 if (fail && --cmd->retries > 0) {
788 DPRINTK("SMU: i2c failure, starting timer...\n");
789 BUG_ON(cmd != smu->cmd_i2c_cur);
790 if (!smu_irq_inited) {
791 mdelay(5);
792 smu_i2c_retry(0);
793 return;
794 }
795 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
796 return;
797 }
798
799 /* If failure or stage 1, command is complete */
800 if (fail || cmd->stage != 0) {
801 smu_i2c_complete_command(cmd, fail);
802 return;
803 }
804
805 DPRINTK("SMU: going to stage 1\n");
806
807 /* Ok, initial command complete, now poll status */
808 scmd->reply_buf = cmd->pdata;
809 scmd->reply_len = sizeof(cmd->pdata);
810 scmd->data_buf = cmd->pdata;
811 scmd->data_len = 1;
812 cmd->pdata[0] = 0;
813 cmd->stage = 1;
814 cmd->retries = 20;
815 smu_queue_cmd(scmd);
816}
817
818
819int smu_queue_i2c(struct smu_i2c_cmd *cmd)
820{
821 unsigned long flags;
822
823 if (smu == NULL)
824 return -ENODEV;
825
826 /* Fill most fields of scmd */
827 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
828 cmd->scmd.done = smu_i2c_low_completion;
829 cmd->scmd.misc = cmd;
830 cmd->scmd.reply_buf = cmd->pdata;
831 cmd->scmd.reply_len = sizeof(cmd->pdata);
832 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
833 cmd->scmd.status = 1;
834 cmd->stage = 0;
835 cmd->pdata[0] = 0xff;
836 cmd->retries = 20;
837 cmd->status = 1;
838
839 /* Check transfer type, sanitize some "info" fields
840 * based on transfer type and do more checking
841 */
842 cmd->info.caddr = cmd->info.devaddr;
843 cmd->read = cmd->info.devaddr & 0x01;
844 switch(cmd->info.type) {
845 case SMU_I2C_TRANSFER_SIMPLE:
846 memset(&cmd->info.sublen, 0, 4);
847 break;
848 case SMU_I2C_TRANSFER_COMBINED:
849 cmd->info.devaddr &= 0xfe;
850 case SMU_I2C_TRANSFER_STDSUB:
851 if (cmd->info.sublen > 3)
852 return -EINVAL;
853 break;
854 default:
855 return -EINVAL;
856 }
857
858 /* Finish setting up command based on transfer direction
859 */
860 if (cmd->read) {
861 if (cmd->info.datalen > SMU_I2C_READ_MAX)
862 return -EINVAL;
863 memset(cmd->info.data, 0xff, cmd->info.datalen);
864 cmd->scmd.data_len = 9;
865 } else {
866 if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
867 return -EINVAL;
868 cmd->scmd.data_len = 9 + cmd->info.datalen;
869 }
870
871 DPRINTK("SMU: i2c enqueuing command\n");
872 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
873 cmd->read ? "read" : "write", cmd->info.datalen,
874 cmd->info.bus, cmd->info.caddr,
875 cmd->info.subaddr[0], cmd->info.type);
876
877
878 /* Enqueue command in i2c list, and if empty, enqueue also in
879 * main command list
880 */
881 spin_lock_irqsave(&smu->lock, flags);
882 if (smu->cmd_i2c_cur == NULL) {
883 smu->cmd_i2c_cur = cmd;
884 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
885 if (smu->cmd_cur == NULL)
886 smu_start_cmd();
887 } else
888 list_add_tail(&cmd->link, &smu->cmd_i2c_list);
889 spin_unlock_irqrestore(&smu->lock, flags);
890
891 return 0;
892}
893
894/*
895 * Handling of "partitions"
896 */
897
898static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
899{
900 DECLARE_COMPLETION_ONSTACK(comp);
901 unsigned int chunk;
902 struct smu_cmd cmd;
903 int rc;
904 u8 params[8];
905
906 /* We currently use a chunk size of 0xe. We could check the
907 * SMU firmware version and use bigger sizes though
908 */
909 chunk = 0xe;
910
911 while (len) {
912 unsigned int clen = min(len, chunk);
913
914 cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
915 cmd.data_len = 7;
916 cmd.data_buf = params;
917 cmd.reply_len = chunk;
918 cmd.reply_buf = dest;
919 cmd.done = smu_done_complete;
920 cmd.misc = ∁
921 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
922 params[1] = 0x4;
923 *((u32 *)¶ms[2]) = addr;
924 params[6] = clen;
925
926 rc = smu_queue_cmd(&cmd);
927 if (rc)
928 return rc;
929 wait_for_completion(&comp);
930 if (cmd.status != 0)
931 return rc;
932 if (cmd.reply_len != clen) {
933 printk(KERN_DEBUG "SMU: short read in "
934 "smu_read_datablock, got: %d, want: %d\n",
935 cmd.reply_len, clen);
936 return -EIO;
937 }
938 len -= clen;
939 addr += clen;
940 dest += clen;
941 }
942 return 0;
943}
944
945static struct smu_sdbp_header *smu_create_sdb_partition(int id)
946{
947 DECLARE_COMPLETION_ONSTACK(comp);
948 struct smu_simple_cmd cmd;
949 unsigned int addr, len, tlen;
950 struct smu_sdbp_header *hdr;
951 struct property *prop;
952
953 /* First query the partition info */
954 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
955 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
956 smu_done_complete, &comp,
957 SMU_CMD_PARTITION_LATEST, id);
958 wait_for_completion(&comp);
959 DPRINTK("SMU: done, status: %d, reply_len: %d\n",
960 cmd.cmd.status, cmd.cmd.reply_len);
961
962 /* Partition doesn't exist (or other error) */
963 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
964 return NULL;
965
966 /* Fetch address and length from reply */
967 addr = *((u16 *)cmd.buffer);
968 len = cmd.buffer[3] << 2;
969 /* Calucluate total length to allocate, including the 17 bytes
970 * for "sdb-partition-XX" that we append at the end of the buffer
971 */
972 tlen = sizeof(struct property) + len + 18;
973
974 prop = kzalloc(tlen, GFP_KERNEL);
975 if (prop == NULL)
976 return NULL;
977 hdr = (struct smu_sdbp_header *)(prop + 1);
978 prop->name = ((char *)prop) + tlen - 18;
979 sprintf(prop->name, "sdb-partition-%02x", id);
980 prop->length = len;
981 prop->value = hdr;
982 prop->next = NULL;
983
984 /* Read the datablock */
985 if (smu_read_datablock((u8 *)hdr, addr, len)) {
986 printk(KERN_DEBUG "SMU: datablock read failed while reading "
987 "partition %02x !\n", id);
988 goto failure;
989 }
990
991 /* Got it, check a few things and create the property */
992 if (hdr->id != id) {
993 printk(KERN_DEBUG "SMU: Reading partition %02x and got "
994 "%02x !\n", id, hdr->id);
995 goto failure;
996 }
997 if (of_add_property(smu->of_node, prop)) {
998 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
999 "property !\n", id);
1000 goto failure;
1001 }
1002
1003 return hdr;
1004 failure:
1005 kfree(prop);
1006 return NULL;
1007}
1008
1009/* Note: Only allowed to return error code in pointers (using ERR_PTR)
1010 * when interruptible is 1
1011 */
1012const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1013 unsigned int *size, int interruptible)
1014{
1015 char pname[32];
1016 const struct smu_sdbp_header *part;
1017
1018 if (!smu)
1019 return NULL;
1020
1021 sprintf(pname, "sdb-partition-%02x", id);
1022
1023 DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1024
1025 if (interruptible) {
1026 int rc;
1027 rc = mutex_lock_interruptible(&smu_part_access);
1028 if (rc)
1029 return ERR_PTR(rc);
1030 } else
1031 mutex_lock(&smu_part_access);
1032
1033 part = of_get_property(smu->of_node, pname, size);
1034 if (part == NULL) {
1035 DPRINTK("trying to extract from SMU ...\n");
1036 part = smu_create_sdb_partition(id);
1037 if (part != NULL && size)
1038 *size = part->len << 2;
1039 }
1040 mutex_unlock(&smu_part_access);
1041 return part;
1042}
1043
1044const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
1045{
1046 return __smu_get_sdb_partition(id, size, 0);
1047}
1048EXPORT_SYMBOL(smu_get_sdb_partition);
1049
1050
1051/*
1052 * Userland driver interface
1053 */
1054
1055
1056static LIST_HEAD(smu_clist);
1057static DEFINE_SPINLOCK(smu_clist_lock);
1058
1059enum smu_file_mode {
1060 smu_file_commands,
1061 smu_file_events,
1062 smu_file_closing
1063};
1064
1065struct smu_private
1066{
1067 struct list_head list;
1068 enum smu_file_mode mode;
1069 int busy;
1070 struct smu_cmd cmd;
1071 spinlock_t lock;
1072 wait_queue_head_t wait;
1073 u8 buffer[SMU_MAX_DATA];
1074};
1075
1076
1077static int smu_open(struct inode *inode, struct file *file)
1078{
1079 struct smu_private *pp;
1080 unsigned long flags;
1081
1082 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1083 if (pp == 0)
1084 return -ENOMEM;
1085 spin_lock_init(&pp->lock);
1086 pp->mode = smu_file_commands;
1087 init_waitqueue_head(&pp->wait);
1088
1089 mutex_lock(&smu_mutex);
1090 spin_lock_irqsave(&smu_clist_lock, flags);
1091 list_add(&pp->list, &smu_clist);
1092 spin_unlock_irqrestore(&smu_clist_lock, flags);
1093 file->private_data = pp;
1094 mutex_unlock(&smu_mutex);
1095
1096 return 0;
1097}
1098
1099
1100static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1101{
1102 struct smu_private *pp = misc;
1103
1104 wake_up_all(&pp->wait);
1105}
1106
1107
1108static ssize_t smu_write(struct file *file, const char __user *buf,
1109 size_t count, loff_t *ppos)
1110{
1111 struct smu_private *pp = file->private_data;
1112 unsigned long flags;
1113 struct smu_user_cmd_hdr hdr;
1114 int rc = 0;
1115
1116 if (pp->busy)
1117 return -EBUSY;
1118 else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1119 return -EFAULT;
1120 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1121 pp->mode = smu_file_events;
1122 return 0;
1123 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
1124 const struct smu_sdbp_header *part;
1125 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1126 if (part == NULL)
1127 return -EINVAL;
1128 else if (IS_ERR(part))
1129 return PTR_ERR(part);
1130 return 0;
1131 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1132 return -EINVAL;
1133 else if (pp->mode != smu_file_commands)
1134 return -EBADFD;
1135 else if (hdr.data_len > SMU_MAX_DATA)
1136 return -EINVAL;
1137
1138 spin_lock_irqsave(&pp->lock, flags);
1139 if (pp->busy) {
1140 spin_unlock_irqrestore(&pp->lock, flags);
1141 return -EBUSY;
1142 }
1143 pp->busy = 1;
1144 pp->cmd.status = 1;
1145 spin_unlock_irqrestore(&pp->lock, flags);
1146
1147 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1148 pp->busy = 0;
1149 return -EFAULT;
1150 }
1151
1152 pp->cmd.cmd = hdr.cmd;
1153 pp->cmd.data_len = hdr.data_len;
1154 pp->cmd.reply_len = SMU_MAX_DATA;
1155 pp->cmd.data_buf = pp->buffer;
1156 pp->cmd.reply_buf = pp->buffer;
1157 pp->cmd.done = smu_user_cmd_done;
1158 pp->cmd.misc = pp;
1159 rc = smu_queue_cmd(&pp->cmd);
1160 if (rc < 0)
1161 return rc;
1162 return count;
1163}
1164
1165
1166static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1167 char __user *buf, size_t count)
1168{
1169 DECLARE_WAITQUEUE(wait, current);
1170 struct smu_user_reply_hdr hdr;
1171 unsigned long flags;
1172 int size, rc = 0;
1173
1174 if (!pp->busy)
1175 return 0;
1176 if (count < sizeof(struct smu_user_reply_hdr))
1177 return -EOVERFLOW;
1178 spin_lock_irqsave(&pp->lock, flags);
1179 if (pp->cmd.status == 1) {
1180 if (file->f_flags & O_NONBLOCK) {
1181 spin_unlock_irqrestore(&pp->lock, flags);
1182 return -EAGAIN;
1183 }
1184 add_wait_queue(&pp->wait, &wait);
1185 for (;;) {
1186 set_current_state(TASK_INTERRUPTIBLE);
1187 rc = 0;
1188 if (pp->cmd.status != 1)
1189 break;
1190 rc = -ERESTARTSYS;
1191 if (signal_pending(current))
1192 break;
1193 spin_unlock_irqrestore(&pp->lock, flags);
1194 schedule();
1195 spin_lock_irqsave(&pp->lock, flags);
1196 }
1197 set_current_state(TASK_RUNNING);
1198 remove_wait_queue(&pp->wait, &wait);
1199 }
1200 spin_unlock_irqrestore(&pp->lock, flags);
1201 if (rc)
1202 return rc;
1203 if (pp->cmd.status != 0)
1204 pp->cmd.reply_len = 0;
1205 size = sizeof(hdr) + pp->cmd.reply_len;
1206 if (count < size)
1207 size = count;
1208 rc = size;
1209 hdr.status = pp->cmd.status;
1210 hdr.reply_len = pp->cmd.reply_len;
1211 if (copy_to_user(buf, &hdr, sizeof(hdr)))
1212 return -EFAULT;
1213 size -= sizeof(hdr);
1214 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1215 return -EFAULT;
1216 pp->busy = 0;
1217
1218 return rc;
1219}
1220
1221
1222static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1223 char __user *buf, size_t count)
1224{
1225 /* Not implemented */
1226 msleep_interruptible(1000);
1227 return 0;
1228}
1229
1230
1231static ssize_t smu_read(struct file *file, char __user *buf,
1232 size_t count, loff_t *ppos)
1233{
1234 struct smu_private *pp = file->private_data;
1235
1236 if (pp->mode == smu_file_commands)
1237 return smu_read_command(file, pp, buf, count);
1238 if (pp->mode == smu_file_events)
1239 return smu_read_events(file, pp, buf, count);
1240
1241 return -EBADFD;
1242}
1243
1244static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1245{
1246 struct smu_private *pp = file->private_data;
1247 unsigned int mask = 0;
1248 unsigned long flags;
1249
1250 if (pp == 0)
1251 return 0;
1252
1253 if (pp->mode == smu_file_commands) {
1254 poll_wait(file, &pp->wait, wait);
1255
1256 spin_lock_irqsave(&pp->lock, flags);
1257 if (pp->busy && pp->cmd.status != 1)
1258 mask |= POLLIN;
1259 spin_unlock_irqrestore(&pp->lock, flags);
1260 } if (pp->mode == smu_file_events) {
1261 /* Not yet implemented */
1262 }
1263 return mask;
1264}
1265
1266static int smu_release(struct inode *inode, struct file *file)
1267{
1268 struct smu_private *pp = file->private_data;
1269 unsigned long flags;
1270 unsigned int busy;
1271
1272 if (pp == 0)
1273 return 0;
1274
1275 file->private_data = NULL;
1276
1277 /* Mark file as closing to avoid races with new request */
1278 spin_lock_irqsave(&pp->lock, flags);
1279 pp->mode = smu_file_closing;
1280 busy = pp->busy;
1281
1282 /* Wait for any pending request to complete */
1283 if (busy && pp->cmd.status == 1) {
1284 DECLARE_WAITQUEUE(wait, current);
1285
1286 add_wait_queue(&pp->wait, &wait);
1287 for (;;) {
1288 set_current_state(TASK_UNINTERRUPTIBLE);
1289 if (pp->cmd.status != 1)
1290 break;
1291 spin_unlock_irqrestore(&pp->lock, flags);
1292 schedule();
1293 spin_lock_irqsave(&pp->lock, flags);
1294 }
1295 set_current_state(TASK_RUNNING);
1296 remove_wait_queue(&pp->wait, &wait);
1297 }
1298 spin_unlock_irqrestore(&pp->lock, flags);
1299
1300 spin_lock_irqsave(&smu_clist_lock, flags);
1301 list_del(&pp->list);
1302 spin_unlock_irqrestore(&smu_clist_lock, flags);
1303 kfree(pp);
1304
1305 return 0;
1306}
1307
1308
1309static const struct file_operations smu_device_fops = {
1310 .llseek = no_llseek,
1311 .read = smu_read,
1312 .write = smu_write,
1313 .poll = smu_fpoll,
1314 .open = smu_open,
1315 .release = smu_release,
1316};
1317
1318static struct miscdevice pmu_device = {
1319 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1320};
1321
1322static int smu_device_init(void)
1323{
1324 if (!smu)
1325 return -ENODEV;
1326 if (misc_register(&pmu_device) < 0)
1327 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1328 return 0;
1329}
1330device_initcall(smu_device_init);