Loading...
1/*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33#include <linux/list.h>
34#include <linux/list_sort.h>
35#include "drmP.h"
36#include "drm.h"
37#include "drm_crtc.h"
38
39/**
40 * drm_mode_debug_printmodeline - debug print a mode
41 * @dev: DRM device
42 * @mode: mode to print
43 *
44 * LOCKING:
45 * None.
46 *
47 * Describe @mode using DRM_DEBUG.
48 */
49void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
50{
51 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
52 "0x%x 0x%x\n",
53 mode->base.id, mode->name, mode->vrefresh, mode->clock,
54 mode->hdisplay, mode->hsync_start,
55 mode->hsync_end, mode->htotal,
56 mode->vdisplay, mode->vsync_start,
57 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
58}
59EXPORT_SYMBOL(drm_mode_debug_printmodeline);
60
61/**
62 * drm_cvt_mode -create a modeline based on CVT algorithm
63 * @dev: DRM device
64 * @hdisplay: hdisplay size
65 * @vdisplay: vdisplay size
66 * @vrefresh : vrefresh rate
67 * @reduced : Whether the GTF calculation is simplified
68 * @interlaced:Whether the interlace is supported
69 *
70 * LOCKING:
71 * none.
72 *
73 * return the modeline based on CVT algorithm
74 *
75 * This function is called to generate the modeline based on CVT algorithm
76 * according to the hdisplay, vdisplay, vrefresh.
77 * It is based from the VESA(TM) Coordinated Video Timing Generator by
78 * Graham Loveridge April 9, 2003 available at
79 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
80 *
81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
82 * What I have done is to translate it by using integer calculation.
83 */
84#define HV_FACTOR 1000
85struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
86 int vdisplay, int vrefresh,
87 bool reduced, bool interlaced, bool margins)
88{
89 /* 1) top/bottom margin size (% of height) - default: 1.8, */
90#define CVT_MARGIN_PERCENTAGE 18
91 /* 2) character cell horizontal granularity (pixels) - default 8 */
92#define CVT_H_GRANULARITY 8
93 /* 3) Minimum vertical porch (lines) - default 3 */
94#define CVT_MIN_V_PORCH 3
95 /* 4) Minimum number of vertical back porch lines - default 6 */
96#define CVT_MIN_V_BPORCH 6
97 /* Pixel Clock step (kHz) */
98#define CVT_CLOCK_STEP 250
99 struct drm_display_mode *drm_mode;
100 unsigned int vfieldrate, hperiod;
101 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
102 int interlace;
103
104 /* allocate the drm_display_mode structure. If failure, we will
105 * return directly
106 */
107 drm_mode = drm_mode_create(dev);
108 if (!drm_mode)
109 return NULL;
110
111 /* the CVT default refresh rate is 60Hz */
112 if (!vrefresh)
113 vrefresh = 60;
114
115 /* the required field fresh rate */
116 if (interlaced)
117 vfieldrate = vrefresh * 2;
118 else
119 vfieldrate = vrefresh;
120
121 /* horizontal pixels */
122 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
123
124 /* determine the left&right borders */
125 hmargin = 0;
126 if (margins) {
127 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
128 hmargin -= hmargin % CVT_H_GRANULARITY;
129 }
130 /* find the total active pixels */
131 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
132
133 /* find the number of lines per field */
134 if (interlaced)
135 vdisplay_rnd = vdisplay / 2;
136 else
137 vdisplay_rnd = vdisplay;
138
139 /* find the top & bottom borders */
140 vmargin = 0;
141 if (margins)
142 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
143
144 drm_mode->vdisplay = vdisplay + 2 * vmargin;
145
146 /* Interlaced */
147 if (interlaced)
148 interlace = 1;
149 else
150 interlace = 0;
151
152 /* Determine VSync Width from aspect ratio */
153 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
154 vsync = 4;
155 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
156 vsync = 5;
157 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
158 vsync = 6;
159 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
160 vsync = 7;
161 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
162 vsync = 7;
163 else /* custom */
164 vsync = 10;
165
166 if (!reduced) {
167 /* simplify the GTF calculation */
168 /* 4) Minimum time of vertical sync + back porch interval (µs)
169 * default 550.0
170 */
171 int tmp1, tmp2;
172#define CVT_MIN_VSYNC_BP 550
173 /* 3) Nominal HSync width (% of line period) - default 8 */
174#define CVT_HSYNC_PERCENTAGE 8
175 unsigned int hblank_percentage;
176 int vsyncandback_porch, vback_porch, hblank;
177
178 /* estimated the horizontal period */
179 tmp1 = HV_FACTOR * 1000000 -
180 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
181 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
182 interlace;
183 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
184
185 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
186 /* 9. Find number of lines in sync + backporch */
187 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
188 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
189 else
190 vsyncandback_porch = tmp1;
191 /* 10. Find number of lines in back porch */
192 vback_porch = vsyncandback_porch - vsync;
193 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
194 vsyncandback_porch + CVT_MIN_V_PORCH;
195 /* 5) Definition of Horizontal blanking time limitation */
196 /* Gradient (%/kHz) - default 600 */
197#define CVT_M_FACTOR 600
198 /* Offset (%) - default 40 */
199#define CVT_C_FACTOR 40
200 /* Blanking time scaling factor - default 128 */
201#define CVT_K_FACTOR 128
202 /* Scaling factor weighting - default 20 */
203#define CVT_J_FACTOR 20
204#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
205#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
206 CVT_J_FACTOR)
207 /* 12. Find ideal blanking duty cycle from formula */
208 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
209 hperiod / 1000;
210 /* 13. Blanking time */
211 if (hblank_percentage < 20 * HV_FACTOR)
212 hblank_percentage = 20 * HV_FACTOR;
213 hblank = drm_mode->hdisplay * hblank_percentage /
214 (100 * HV_FACTOR - hblank_percentage);
215 hblank -= hblank % (2 * CVT_H_GRANULARITY);
216 /* 14. find the total pixes per line */
217 drm_mode->htotal = drm_mode->hdisplay + hblank;
218 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
219 drm_mode->hsync_start = drm_mode->hsync_end -
220 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
221 drm_mode->hsync_start += CVT_H_GRANULARITY -
222 drm_mode->hsync_start % CVT_H_GRANULARITY;
223 /* fill the Vsync values */
224 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
225 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
226 } else {
227 /* Reduced blanking */
228 /* Minimum vertical blanking interval time (µs)- default 460 */
229#define CVT_RB_MIN_VBLANK 460
230 /* Fixed number of clocks for horizontal sync */
231#define CVT_RB_H_SYNC 32
232 /* Fixed number of clocks for horizontal blanking */
233#define CVT_RB_H_BLANK 160
234 /* Fixed number of lines for vertical front porch - default 3*/
235#define CVT_RB_VFPORCH 3
236 int vbilines;
237 int tmp1, tmp2;
238 /* 8. Estimate Horizontal period. */
239 tmp1 = HV_FACTOR * 1000000 -
240 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
241 tmp2 = vdisplay_rnd + 2 * vmargin;
242 hperiod = tmp1 / (tmp2 * vfieldrate);
243 /* 9. Find number of lines in vertical blanking */
244 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
245 /* 10. Check if vertical blanking is sufficient */
246 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
247 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
248 /* 11. Find total number of lines in vertical field */
249 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
250 /* 12. Find total number of pixels in a line */
251 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
252 /* Fill in HSync values */
253 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
254 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
255 /* Fill in VSync values */
256 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
257 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
258 }
259 /* 15/13. Find pixel clock frequency (kHz for xf86) */
260 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
261 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
262 /* 18/16. Find actual vertical frame frequency */
263 /* ignore - just set the mode flag for interlaced */
264 if (interlaced) {
265 drm_mode->vtotal *= 2;
266 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
267 }
268 /* Fill the mode line name */
269 drm_mode_set_name(drm_mode);
270 if (reduced)
271 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
272 DRM_MODE_FLAG_NVSYNC);
273 else
274 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
275 DRM_MODE_FLAG_NHSYNC);
276
277 return drm_mode;
278}
279EXPORT_SYMBOL(drm_cvt_mode);
280
281/**
282 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
283 *
284 * @dev :drm device
285 * @hdisplay :hdisplay size
286 * @vdisplay :vdisplay size
287 * @vrefresh :vrefresh rate.
288 * @interlaced :whether the interlace is supported
289 * @margins :desired margin size
290 * @GTF_[MCKJ] :extended GTF formula parameters
291 *
292 * LOCKING.
293 * none.
294 *
295 * return the modeline based on full GTF algorithm.
296 *
297 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
298 * in here multiplied by two. For a C of 40, pass in 80.
299 */
300struct drm_display_mode *
301drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
302 int vrefresh, bool interlaced, int margins,
303 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
304{ /* 1) top/bottom margin size (% of height) - default: 1.8, */
305#define GTF_MARGIN_PERCENTAGE 18
306 /* 2) character cell horizontal granularity (pixels) - default 8 */
307#define GTF_CELL_GRAN 8
308 /* 3) Minimum vertical porch (lines) - default 3 */
309#define GTF_MIN_V_PORCH 1
310 /* width of vsync in lines */
311#define V_SYNC_RQD 3
312 /* width of hsync as % of total line */
313#define H_SYNC_PERCENT 8
314 /* min time of vsync + back porch (microsec) */
315#define MIN_VSYNC_PLUS_BP 550
316 /* C' and M' are part of the Blanking Duty Cycle computation */
317#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
318#define GTF_M_PRIME (GTF_K * GTF_M / 256)
319 struct drm_display_mode *drm_mode;
320 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
321 int top_margin, bottom_margin;
322 int interlace;
323 unsigned int hfreq_est;
324 int vsync_plus_bp, vback_porch;
325 unsigned int vtotal_lines, vfieldrate_est, hperiod;
326 unsigned int vfield_rate, vframe_rate;
327 int left_margin, right_margin;
328 unsigned int total_active_pixels, ideal_duty_cycle;
329 unsigned int hblank, total_pixels, pixel_freq;
330 int hsync, hfront_porch, vodd_front_porch_lines;
331 unsigned int tmp1, tmp2;
332
333 drm_mode = drm_mode_create(dev);
334 if (!drm_mode)
335 return NULL;
336
337 /* 1. In order to give correct results, the number of horizontal
338 * pixels requested is first processed to ensure that it is divisible
339 * by the character size, by rounding it to the nearest character
340 * cell boundary:
341 */
342 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
343 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
344
345 /* 2. If interlace is requested, the number of vertical lines assumed
346 * by the calculation must be halved, as the computation calculates
347 * the number of vertical lines per field.
348 */
349 if (interlaced)
350 vdisplay_rnd = vdisplay / 2;
351 else
352 vdisplay_rnd = vdisplay;
353
354 /* 3. Find the frame rate required: */
355 if (interlaced)
356 vfieldrate_rqd = vrefresh * 2;
357 else
358 vfieldrate_rqd = vrefresh;
359
360 /* 4. Find number of lines in Top margin: */
361 top_margin = 0;
362 if (margins)
363 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
364 1000;
365 /* 5. Find number of lines in bottom margin: */
366 bottom_margin = top_margin;
367
368 /* 6. If interlace is required, then set variable interlace: */
369 if (interlaced)
370 interlace = 1;
371 else
372 interlace = 0;
373
374 /* 7. Estimate the Horizontal frequency */
375 {
376 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
377 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
378 2 + interlace;
379 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
380 }
381
382 /* 8. Find the number of lines in V sync + back porch */
383 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
384 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
385 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
386 /* 9. Find the number of lines in V back porch alone: */
387 vback_porch = vsync_plus_bp - V_SYNC_RQD;
388 /* 10. Find the total number of lines in Vertical field period: */
389 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
390 vsync_plus_bp + GTF_MIN_V_PORCH;
391 /* 11. Estimate the Vertical field frequency: */
392 vfieldrate_est = hfreq_est / vtotal_lines;
393 /* 12. Find the actual horizontal period: */
394 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
395
396 /* 13. Find the actual Vertical field frequency: */
397 vfield_rate = hfreq_est / vtotal_lines;
398 /* 14. Find the Vertical frame frequency: */
399 if (interlaced)
400 vframe_rate = vfield_rate / 2;
401 else
402 vframe_rate = vfield_rate;
403 /* 15. Find number of pixels in left margin: */
404 if (margins)
405 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
406 1000;
407 else
408 left_margin = 0;
409
410 /* 16.Find number of pixels in right margin: */
411 right_margin = left_margin;
412 /* 17.Find total number of active pixels in image and left and right */
413 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
414 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
415 ideal_duty_cycle = GTF_C_PRIME * 1000 -
416 (GTF_M_PRIME * 1000000 / hfreq_est);
417 /* 19.Find the number of pixels in the blanking time to the nearest
418 * double character cell: */
419 hblank = total_active_pixels * ideal_duty_cycle /
420 (100000 - ideal_duty_cycle);
421 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
422 hblank = hblank * 2 * GTF_CELL_GRAN;
423 /* 20.Find total number of pixels: */
424 total_pixels = total_active_pixels + hblank;
425 /* 21.Find pixel clock frequency: */
426 pixel_freq = total_pixels * hfreq_est / 1000;
427 /* Stage 1 computations are now complete; I should really pass
428 * the results to another function and do the Stage 2 computations,
429 * but I only need a few more values so I'll just append the
430 * computations here for now */
431 /* 17. Find the number of pixels in the horizontal sync period: */
432 hsync = H_SYNC_PERCENT * total_pixels / 100;
433 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
434 hsync = hsync * GTF_CELL_GRAN;
435 /* 18. Find the number of pixels in horizontal front porch period */
436 hfront_porch = hblank / 2 - hsync;
437 /* 36. Find the number of lines in the odd front porch period: */
438 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
439
440 /* finally, pack the results in the mode struct */
441 drm_mode->hdisplay = hdisplay_rnd;
442 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
443 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
444 drm_mode->htotal = total_pixels;
445 drm_mode->vdisplay = vdisplay_rnd;
446 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
447 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
448 drm_mode->vtotal = vtotal_lines;
449
450 drm_mode->clock = pixel_freq;
451
452 if (interlaced) {
453 drm_mode->vtotal *= 2;
454 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
455 }
456
457 drm_mode_set_name(drm_mode);
458 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
459 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
460 else
461 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
462
463 return drm_mode;
464}
465EXPORT_SYMBOL(drm_gtf_mode_complex);
466
467/**
468 * drm_gtf_mode - create the modeline based on GTF algorithm
469 *
470 * @dev :drm device
471 * @hdisplay :hdisplay size
472 * @vdisplay :vdisplay size
473 * @vrefresh :vrefresh rate.
474 * @interlaced :whether the interlace is supported
475 * @margins :whether the margin is supported
476 *
477 * LOCKING.
478 * none.
479 *
480 * return the modeline based on GTF algorithm
481 *
482 * This function is to create the modeline based on the GTF algorithm.
483 * Generalized Timing Formula is derived from:
484 * GTF Spreadsheet by Andy Morrish (1/5/97)
485 * available at http://www.vesa.org
486 *
487 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
488 * What I have done is to translate it by using integer calculation.
489 * I also refer to the function of fb_get_mode in the file of
490 * drivers/video/fbmon.c
491 *
492 * Standard GTF parameters:
493 * M = 600
494 * C = 40
495 * K = 128
496 * J = 20
497 */
498struct drm_display_mode *
499drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
500 bool lace, int margins)
501{
502 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
503 margins, 600, 40 * 2, 128, 20 * 2);
504}
505EXPORT_SYMBOL(drm_gtf_mode);
506
507/**
508 * drm_mode_set_name - set the name on a mode
509 * @mode: name will be set in this mode
510 *
511 * LOCKING:
512 * None.
513 *
514 * Set the name of @mode to a standard format.
515 */
516void drm_mode_set_name(struct drm_display_mode *mode)
517{
518 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
519
520 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
521 mode->hdisplay, mode->vdisplay,
522 interlaced ? "i" : "");
523}
524EXPORT_SYMBOL(drm_mode_set_name);
525
526/**
527 * drm_mode_list_concat - move modes from one list to another
528 * @head: source list
529 * @new: dst list
530 *
531 * LOCKING:
532 * Caller must ensure both lists are locked.
533 *
534 * Move all the modes from @head to @new.
535 */
536void drm_mode_list_concat(struct list_head *head, struct list_head *new)
537{
538
539 struct list_head *entry, *tmp;
540
541 list_for_each_safe(entry, tmp, head) {
542 list_move_tail(entry, new);
543 }
544}
545EXPORT_SYMBOL(drm_mode_list_concat);
546
547/**
548 * drm_mode_width - get the width of a mode
549 * @mode: mode
550 *
551 * LOCKING:
552 * None.
553 *
554 * Return @mode's width (hdisplay) value.
555 *
556 * FIXME: is this needed?
557 *
558 * RETURNS:
559 * @mode->hdisplay
560 */
561int drm_mode_width(struct drm_display_mode *mode)
562{
563 return mode->hdisplay;
564
565}
566EXPORT_SYMBOL(drm_mode_width);
567
568/**
569 * drm_mode_height - get the height of a mode
570 * @mode: mode
571 *
572 * LOCKING:
573 * None.
574 *
575 * Return @mode's height (vdisplay) value.
576 *
577 * FIXME: is this needed?
578 *
579 * RETURNS:
580 * @mode->vdisplay
581 */
582int drm_mode_height(struct drm_display_mode *mode)
583{
584 return mode->vdisplay;
585}
586EXPORT_SYMBOL(drm_mode_height);
587
588/** drm_mode_hsync - get the hsync of a mode
589 * @mode: mode
590 *
591 * LOCKING:
592 * None.
593 *
594 * Return @modes's hsync rate in kHz, rounded to the nearest int.
595 */
596int drm_mode_hsync(const struct drm_display_mode *mode)
597{
598 unsigned int calc_val;
599
600 if (mode->hsync)
601 return mode->hsync;
602
603 if (mode->htotal < 0)
604 return 0;
605
606 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
607 calc_val += 500; /* round to 1000Hz */
608 calc_val /= 1000; /* truncate to kHz */
609
610 return calc_val;
611}
612EXPORT_SYMBOL(drm_mode_hsync);
613
614/**
615 * drm_mode_vrefresh - get the vrefresh of a mode
616 * @mode: mode
617 *
618 * LOCKING:
619 * None.
620 *
621 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
622 *
623 * FIXME: why is this needed? shouldn't vrefresh be set already?
624 *
625 * RETURNS:
626 * Vertical refresh rate. It will be the result of actual value plus 0.5.
627 * If it is 70.288, it will return 70Hz.
628 * If it is 59.6, it will return 60Hz.
629 */
630int drm_mode_vrefresh(const struct drm_display_mode *mode)
631{
632 int refresh = 0;
633 unsigned int calc_val;
634
635 if (mode->vrefresh > 0)
636 refresh = mode->vrefresh;
637 else if (mode->htotal > 0 && mode->vtotal > 0) {
638 int vtotal;
639 vtotal = mode->vtotal;
640 /* work out vrefresh the value will be x1000 */
641 calc_val = (mode->clock * 1000);
642 calc_val /= mode->htotal;
643 refresh = (calc_val + vtotal / 2) / vtotal;
644
645 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
646 refresh *= 2;
647 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
648 refresh /= 2;
649 if (mode->vscan > 1)
650 refresh /= mode->vscan;
651 }
652 return refresh;
653}
654EXPORT_SYMBOL(drm_mode_vrefresh);
655
656/**
657 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
658 * @p: mode
659 * @adjust_flags: unused? (FIXME)
660 *
661 * LOCKING:
662 * None.
663 *
664 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
665 */
666void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
667{
668 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
669 return;
670
671 p->crtc_hdisplay = p->hdisplay;
672 p->crtc_hsync_start = p->hsync_start;
673 p->crtc_hsync_end = p->hsync_end;
674 p->crtc_htotal = p->htotal;
675 p->crtc_hskew = p->hskew;
676 p->crtc_vdisplay = p->vdisplay;
677 p->crtc_vsync_start = p->vsync_start;
678 p->crtc_vsync_end = p->vsync_end;
679 p->crtc_vtotal = p->vtotal;
680
681 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
682 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
683 p->crtc_vdisplay /= 2;
684 p->crtc_vsync_start /= 2;
685 p->crtc_vsync_end /= 2;
686 p->crtc_vtotal /= 2;
687 }
688
689 p->crtc_vtotal |= 1;
690 }
691
692 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
693 p->crtc_vdisplay *= 2;
694 p->crtc_vsync_start *= 2;
695 p->crtc_vsync_end *= 2;
696 p->crtc_vtotal *= 2;
697 }
698
699 if (p->vscan > 1) {
700 p->crtc_vdisplay *= p->vscan;
701 p->crtc_vsync_start *= p->vscan;
702 p->crtc_vsync_end *= p->vscan;
703 p->crtc_vtotal *= p->vscan;
704 }
705
706 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
707 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
708 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
709 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
710
711 p->crtc_hadjusted = false;
712 p->crtc_vadjusted = false;
713}
714EXPORT_SYMBOL(drm_mode_set_crtcinfo);
715
716
717/**
718 * drm_mode_duplicate - allocate and duplicate an existing mode
719 * @m: mode to duplicate
720 *
721 * LOCKING:
722 * None.
723 *
724 * Just allocate a new mode, copy the existing mode into it, and return
725 * a pointer to it. Used to create new instances of established modes.
726 */
727struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
728 const struct drm_display_mode *mode)
729{
730 struct drm_display_mode *nmode;
731 int new_id;
732
733 nmode = drm_mode_create(dev);
734 if (!nmode)
735 return NULL;
736
737 new_id = nmode->base.id;
738 *nmode = *mode;
739 nmode->base.id = new_id;
740 INIT_LIST_HEAD(&nmode->head);
741 return nmode;
742}
743EXPORT_SYMBOL(drm_mode_duplicate);
744
745/**
746 * drm_mode_equal - test modes for equality
747 * @mode1: first mode
748 * @mode2: second mode
749 *
750 * LOCKING:
751 * None.
752 *
753 * Check to see if @mode1 and @mode2 are equivalent.
754 *
755 * RETURNS:
756 * True if the modes are equal, false otherwise.
757 */
758bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
759{
760 /* do clock check convert to PICOS so fb modes get matched
761 * the same */
762 if (mode1->clock && mode2->clock) {
763 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
764 return false;
765 } else if (mode1->clock != mode2->clock)
766 return false;
767
768 if (mode1->hdisplay == mode2->hdisplay &&
769 mode1->hsync_start == mode2->hsync_start &&
770 mode1->hsync_end == mode2->hsync_end &&
771 mode1->htotal == mode2->htotal &&
772 mode1->hskew == mode2->hskew &&
773 mode1->vdisplay == mode2->vdisplay &&
774 mode1->vsync_start == mode2->vsync_start &&
775 mode1->vsync_end == mode2->vsync_end &&
776 mode1->vtotal == mode2->vtotal &&
777 mode1->vscan == mode2->vscan &&
778 mode1->flags == mode2->flags)
779 return true;
780
781 return false;
782}
783EXPORT_SYMBOL(drm_mode_equal);
784
785/**
786 * drm_mode_validate_size - make sure modes adhere to size constraints
787 * @dev: DRM device
788 * @mode_list: list of modes to check
789 * @maxX: maximum width
790 * @maxY: maximum height
791 * @maxPitch: max pitch
792 *
793 * LOCKING:
794 * Caller must hold a lock protecting @mode_list.
795 *
796 * The DRM device (@dev) has size and pitch limits. Here we validate the
797 * modes we probed for @dev against those limits and set their status as
798 * necessary.
799 */
800void drm_mode_validate_size(struct drm_device *dev,
801 struct list_head *mode_list,
802 int maxX, int maxY, int maxPitch)
803{
804 struct drm_display_mode *mode;
805
806 list_for_each_entry(mode, mode_list, head) {
807 if (maxPitch > 0 && mode->hdisplay > maxPitch)
808 mode->status = MODE_BAD_WIDTH;
809
810 if (maxX > 0 && mode->hdisplay > maxX)
811 mode->status = MODE_VIRTUAL_X;
812
813 if (maxY > 0 && mode->vdisplay > maxY)
814 mode->status = MODE_VIRTUAL_Y;
815 }
816}
817EXPORT_SYMBOL(drm_mode_validate_size);
818
819/**
820 * drm_mode_validate_clocks - validate modes against clock limits
821 * @dev: DRM device
822 * @mode_list: list of modes to check
823 * @min: minimum clock rate array
824 * @max: maximum clock rate array
825 * @n_ranges: number of clock ranges (size of arrays)
826 *
827 * LOCKING:
828 * Caller must hold a lock protecting @mode_list.
829 *
830 * Some code may need to check a mode list against the clock limits of the
831 * device in question. This function walks the mode list, testing to make
832 * sure each mode falls within a given range (defined by @min and @max
833 * arrays) and sets @mode->status as needed.
834 */
835void drm_mode_validate_clocks(struct drm_device *dev,
836 struct list_head *mode_list,
837 int *min, int *max, int n_ranges)
838{
839 struct drm_display_mode *mode;
840 int i;
841
842 list_for_each_entry(mode, mode_list, head) {
843 bool good = false;
844 for (i = 0; i < n_ranges; i++) {
845 if (mode->clock >= min[i] && mode->clock <= max[i]) {
846 good = true;
847 break;
848 }
849 }
850 if (!good)
851 mode->status = MODE_CLOCK_RANGE;
852 }
853}
854EXPORT_SYMBOL(drm_mode_validate_clocks);
855
856/**
857 * drm_mode_prune_invalid - remove invalid modes from mode list
858 * @dev: DRM device
859 * @mode_list: list of modes to check
860 * @verbose: be verbose about it
861 *
862 * LOCKING:
863 * Caller must hold a lock protecting @mode_list.
864 *
865 * Once mode list generation is complete, a caller can use this routine to
866 * remove invalid modes from a mode list. If any of the modes have a
867 * status other than %MODE_OK, they are removed from @mode_list and freed.
868 */
869void drm_mode_prune_invalid(struct drm_device *dev,
870 struct list_head *mode_list, bool verbose)
871{
872 struct drm_display_mode *mode, *t;
873
874 list_for_each_entry_safe(mode, t, mode_list, head) {
875 if (mode->status != MODE_OK) {
876 list_del(&mode->head);
877 if (verbose) {
878 drm_mode_debug_printmodeline(mode);
879 DRM_DEBUG_KMS("Not using %s mode %d\n",
880 mode->name, mode->status);
881 }
882 drm_mode_destroy(dev, mode);
883 }
884 }
885}
886EXPORT_SYMBOL(drm_mode_prune_invalid);
887
888/**
889 * drm_mode_compare - compare modes for favorability
890 * @priv: unused
891 * @lh_a: list_head for first mode
892 * @lh_b: list_head for second mode
893 *
894 * LOCKING:
895 * None.
896 *
897 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
898 * which is better.
899 *
900 * RETURNS:
901 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
902 * positive if @lh_b is better than @lh_a.
903 */
904static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
905{
906 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
907 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
908 int diff;
909
910 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
911 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
912 if (diff)
913 return diff;
914 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
915 if (diff)
916 return diff;
917 diff = b->clock - a->clock;
918 return diff;
919}
920
921/**
922 * drm_mode_sort - sort mode list
923 * @mode_list: list to sort
924 *
925 * LOCKING:
926 * Caller must hold a lock protecting @mode_list.
927 *
928 * Sort @mode_list by favorability, putting good modes first.
929 */
930void drm_mode_sort(struct list_head *mode_list)
931{
932 list_sort(NULL, mode_list, drm_mode_compare);
933}
934EXPORT_SYMBOL(drm_mode_sort);
935
936/**
937 * drm_mode_connector_list_update - update the mode list for the connector
938 * @connector: the connector to update
939 *
940 * LOCKING:
941 * Caller must hold a lock protecting @mode_list.
942 *
943 * This moves the modes from the @connector probed_modes list
944 * to the actual mode list. It compares the probed mode against the current
945 * list and only adds different modes. All modes unverified after this point
946 * will be removed by the prune invalid modes.
947 */
948void drm_mode_connector_list_update(struct drm_connector *connector)
949{
950 struct drm_display_mode *mode;
951 struct drm_display_mode *pmode, *pt;
952 int found_it;
953
954 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
955 head) {
956 found_it = 0;
957 /* go through current modes checking for the new probed mode */
958 list_for_each_entry(mode, &connector->modes, head) {
959 if (drm_mode_equal(pmode, mode)) {
960 found_it = 1;
961 /* if equal delete the probed mode */
962 mode->status = pmode->status;
963 /* Merge type bits together */
964 mode->type |= pmode->type;
965 list_del(&pmode->head);
966 drm_mode_destroy(connector->dev, pmode);
967 break;
968 }
969 }
970
971 if (!found_it) {
972 list_move_tail(&pmode->head, &connector->modes);
973 }
974 }
975}
976EXPORT_SYMBOL(drm_mode_connector_list_update);
977
978/**
979 * drm_mode_parse_command_line_for_connector - parse command line for connector
980 * @mode_option - per connector mode option
981 * @connector - connector to parse line for
982 *
983 * This parses the connector specific then generic command lines for
984 * modes and options to configure the connector.
985 *
986 * This uses the same parameters as the fb modedb.c, except for extra
987 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
988 *
989 * enable/enable Digital/disable bit at the end
990 */
991bool drm_mode_parse_command_line_for_connector(const char *mode_option,
992 struct drm_connector *connector,
993 struct drm_cmdline_mode *mode)
994{
995 const char *name;
996 unsigned int namelen;
997 bool res_specified = false, bpp_specified = false, refresh_specified = false;
998 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
999 bool yres_specified = false, cvt = false, rb = false;
1000 bool interlace = false, margins = false, was_digit = false;
1001 int i;
1002 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1003
1004#ifdef CONFIG_FB
1005 if (!mode_option)
1006 mode_option = fb_mode_option;
1007#endif
1008
1009 if (!mode_option) {
1010 mode->specified = false;
1011 return false;
1012 }
1013
1014 name = mode_option;
1015 namelen = strlen(name);
1016 for (i = namelen-1; i >= 0; i--) {
1017 switch (name[i]) {
1018 case '@':
1019 if (!refresh_specified && !bpp_specified &&
1020 !yres_specified && !cvt && !rb && was_digit) {
1021 refresh = simple_strtol(&name[i+1], NULL, 10);
1022 refresh_specified = true;
1023 was_digit = false;
1024 } else
1025 goto done;
1026 break;
1027 case '-':
1028 if (!bpp_specified && !yres_specified && !cvt &&
1029 !rb && was_digit) {
1030 bpp = simple_strtol(&name[i+1], NULL, 10);
1031 bpp_specified = true;
1032 was_digit = false;
1033 } else
1034 goto done;
1035 break;
1036 case 'x':
1037 if (!yres_specified && was_digit) {
1038 yres = simple_strtol(&name[i+1], NULL, 10);
1039 yres_specified = true;
1040 was_digit = false;
1041 } else
1042 goto done;
1043 case '0' ... '9':
1044 was_digit = true;
1045 break;
1046 case 'M':
1047 if (yres_specified || cvt || was_digit)
1048 goto done;
1049 cvt = true;
1050 break;
1051 case 'R':
1052 if (yres_specified || cvt || rb || was_digit)
1053 goto done;
1054 rb = true;
1055 break;
1056 case 'm':
1057 if (cvt || yres_specified || was_digit)
1058 goto done;
1059 margins = true;
1060 break;
1061 case 'i':
1062 if (cvt || yres_specified || was_digit)
1063 goto done;
1064 interlace = true;
1065 break;
1066 case 'e':
1067 if (yres_specified || bpp_specified || refresh_specified ||
1068 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1069 goto done;
1070
1071 force = DRM_FORCE_ON;
1072 break;
1073 case 'D':
1074 if (yres_specified || bpp_specified || refresh_specified ||
1075 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1076 goto done;
1077
1078 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1079 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1080 force = DRM_FORCE_ON;
1081 else
1082 force = DRM_FORCE_ON_DIGITAL;
1083 break;
1084 case 'd':
1085 if (yres_specified || bpp_specified || refresh_specified ||
1086 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1087 goto done;
1088
1089 force = DRM_FORCE_OFF;
1090 break;
1091 default:
1092 goto done;
1093 }
1094 }
1095
1096 if (i < 0 && yres_specified) {
1097 char *ch;
1098 xres = simple_strtol(name, &ch, 10);
1099 if ((ch != NULL) && (*ch == 'x'))
1100 res_specified = true;
1101 else
1102 i = ch - name;
1103 } else if (!yres_specified && was_digit) {
1104 /* catch mode that begins with digits but has no 'x' */
1105 i = 0;
1106 }
1107done:
1108 if (i >= 0) {
1109 printk(KERN_WARNING
1110 "parse error at position %i in video mode '%s'\n",
1111 i, name);
1112 mode->specified = false;
1113 return false;
1114 }
1115
1116 if (res_specified) {
1117 mode->specified = true;
1118 mode->xres = xres;
1119 mode->yres = yres;
1120 }
1121
1122 if (refresh_specified) {
1123 mode->refresh_specified = true;
1124 mode->refresh = refresh;
1125 }
1126
1127 if (bpp_specified) {
1128 mode->bpp_specified = true;
1129 mode->bpp = bpp;
1130 }
1131 mode->rb = rb;
1132 mode->cvt = cvt;
1133 mode->interlace = interlace;
1134 mode->margins = margins;
1135 mode->force = force;
1136
1137 return true;
1138}
1139EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1140
1141struct drm_display_mode *
1142drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1143 struct drm_cmdline_mode *cmd)
1144{
1145 struct drm_display_mode *mode;
1146
1147 if (cmd->cvt)
1148 mode = drm_cvt_mode(dev,
1149 cmd->xres, cmd->yres,
1150 cmd->refresh_specified ? cmd->refresh : 60,
1151 cmd->rb, cmd->interlace,
1152 cmd->margins);
1153 else
1154 mode = drm_gtf_mode(dev,
1155 cmd->xres, cmd->yres,
1156 cmd->refresh_specified ? cmd->refresh : 60,
1157 cmd->interlace,
1158 cmd->margins);
1159 if (!mode)
1160 return NULL;
1161
1162 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1163 return mode;
1164}
1165EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1/*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33#include <linux/list.h>
34#include <linux/list_sort.h>
35#include <linux/export.h>
36#include <drm/drmP.h>
37#include <drm/drm_crtc.h>
38#include <video/of_videomode.h>
39#include <video/videomode.h>
40#include <drm/drm_modes.h>
41
42#include "drm_crtc_internal.h"
43
44/**
45 * drm_mode_debug_printmodeline - print a mode to dmesg
46 * @mode: mode to print
47 *
48 * Describe @mode using DRM_DEBUG.
49 */
50void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
51{
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
53 "0x%x 0x%x\n",
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
59}
60EXPORT_SYMBOL(drm_mode_debug_printmodeline);
61
62/**
63 * drm_mode_create - create a new display mode
64 * @dev: DRM device
65 *
66 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it
67 * and return it.
68 *
69 * Returns:
70 * Pointer to new mode on success, NULL on error.
71 */
72struct drm_display_mode *drm_mode_create(struct drm_device *dev)
73{
74 struct drm_display_mode *nmode;
75
76 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
77 if (!nmode)
78 return NULL;
79
80 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
81 kfree(nmode);
82 return NULL;
83 }
84
85 return nmode;
86}
87EXPORT_SYMBOL(drm_mode_create);
88
89/**
90 * drm_mode_destroy - remove a mode
91 * @dev: DRM device
92 * @mode: mode to remove
93 *
94 * Release @mode's unique ID, then free it @mode structure itself using kfree.
95 */
96void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
97{
98 if (!mode)
99 return;
100
101 drm_mode_object_put(dev, &mode->base);
102
103 kfree(mode);
104}
105EXPORT_SYMBOL(drm_mode_destroy);
106
107/**
108 * drm_mode_probed_add - add a mode to a connector's probed_mode list
109 * @connector: connector the new mode
110 * @mode: mode data
111 *
112 * Add @mode to @connector's probed_mode list for later use. This list should
113 * then in a second step get filtered and all the modes actually supported by
114 * the hardware moved to the @connector's modes list.
115 */
116void drm_mode_probed_add(struct drm_connector *connector,
117 struct drm_display_mode *mode)
118{
119 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
120
121 list_add_tail(&mode->head, &connector->probed_modes);
122}
123EXPORT_SYMBOL(drm_mode_probed_add);
124
125/**
126 * drm_cvt_mode -create a modeline based on the CVT algorithm
127 * @dev: drm device
128 * @hdisplay: hdisplay size
129 * @vdisplay: vdisplay size
130 * @vrefresh: vrefresh rate
131 * @reduced: whether to use reduced blanking
132 * @interlaced: whether to compute an interlaced mode
133 * @margins: whether to add margins (borders)
134 *
135 * This function is called to generate the modeline based on CVT algorithm
136 * according to the hdisplay, vdisplay, vrefresh.
137 * It is based from the VESA(TM) Coordinated Video Timing Generator by
138 * Graham Loveridge April 9, 2003 available at
139 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
140 *
141 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
142 * What I have done is to translate it by using integer calculation.
143 *
144 * Returns:
145 * The modeline based on the CVT algorithm stored in a drm_display_mode object.
146 * The display mode object is allocated with drm_mode_create(). Returns NULL
147 * when no mode could be allocated.
148 */
149struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
150 int vdisplay, int vrefresh,
151 bool reduced, bool interlaced, bool margins)
152{
153#define HV_FACTOR 1000
154 /* 1) top/bottom margin size (% of height) - default: 1.8, */
155#define CVT_MARGIN_PERCENTAGE 18
156 /* 2) character cell horizontal granularity (pixels) - default 8 */
157#define CVT_H_GRANULARITY 8
158 /* 3) Minimum vertical porch (lines) - default 3 */
159#define CVT_MIN_V_PORCH 3
160 /* 4) Minimum number of vertical back porch lines - default 6 */
161#define CVT_MIN_V_BPORCH 6
162 /* Pixel Clock step (kHz) */
163#define CVT_CLOCK_STEP 250
164 struct drm_display_mode *drm_mode;
165 unsigned int vfieldrate, hperiod;
166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
167 int interlace;
168
169 /* allocate the drm_display_mode structure. If failure, we will
170 * return directly
171 */
172 drm_mode = drm_mode_create(dev);
173 if (!drm_mode)
174 return NULL;
175
176 /* the CVT default refresh rate is 60Hz */
177 if (!vrefresh)
178 vrefresh = 60;
179
180 /* the required field fresh rate */
181 if (interlaced)
182 vfieldrate = vrefresh * 2;
183 else
184 vfieldrate = vrefresh;
185
186 /* horizontal pixels */
187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
188
189 /* determine the left&right borders */
190 hmargin = 0;
191 if (margins) {
192 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
193 hmargin -= hmargin % CVT_H_GRANULARITY;
194 }
195 /* find the total active pixels */
196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
197
198 /* find the number of lines per field */
199 if (interlaced)
200 vdisplay_rnd = vdisplay / 2;
201 else
202 vdisplay_rnd = vdisplay;
203
204 /* find the top & bottom borders */
205 vmargin = 0;
206 if (margins)
207 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
208
209 drm_mode->vdisplay = vdisplay + 2 * vmargin;
210
211 /* Interlaced */
212 if (interlaced)
213 interlace = 1;
214 else
215 interlace = 0;
216
217 /* Determine VSync Width from aspect ratio */
218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
219 vsync = 4;
220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
221 vsync = 5;
222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
223 vsync = 6;
224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
225 vsync = 7;
226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
227 vsync = 7;
228 else /* custom */
229 vsync = 10;
230
231 if (!reduced) {
232 /* simplify the GTF calculation */
233 /* 4) Minimum time of vertical sync + back porch interval (µs)
234 * default 550.0
235 */
236 int tmp1, tmp2;
237#define CVT_MIN_VSYNC_BP 550
238 /* 3) Nominal HSync width (% of line period) - default 8 */
239#define CVT_HSYNC_PERCENTAGE 8
240 unsigned int hblank_percentage;
241 int vsyncandback_porch, vback_porch, hblank;
242
243 /* estimated the horizontal period */
244 tmp1 = HV_FACTOR * 1000000 -
245 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
246 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
247 interlace;
248 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
249
250 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
251 /* 9. Find number of lines in sync + backporch */
252 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
253 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
254 else
255 vsyncandback_porch = tmp1;
256 /* 10. Find number of lines in back porch */
257 vback_porch = vsyncandback_porch - vsync;
258 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
259 vsyncandback_porch + CVT_MIN_V_PORCH;
260 /* 5) Definition of Horizontal blanking time limitation */
261 /* Gradient (%/kHz) - default 600 */
262#define CVT_M_FACTOR 600
263 /* Offset (%) - default 40 */
264#define CVT_C_FACTOR 40
265 /* Blanking time scaling factor - default 128 */
266#define CVT_K_FACTOR 128
267 /* Scaling factor weighting - default 20 */
268#define CVT_J_FACTOR 20
269#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
270#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
271 CVT_J_FACTOR)
272 /* 12. Find ideal blanking duty cycle from formula */
273 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
274 hperiod / 1000;
275 /* 13. Blanking time */
276 if (hblank_percentage < 20 * HV_FACTOR)
277 hblank_percentage = 20 * HV_FACTOR;
278 hblank = drm_mode->hdisplay * hblank_percentage /
279 (100 * HV_FACTOR - hblank_percentage);
280 hblank -= hblank % (2 * CVT_H_GRANULARITY);
281 /* 14. find the total pixes per line */
282 drm_mode->htotal = drm_mode->hdisplay + hblank;
283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
284 drm_mode->hsync_start = drm_mode->hsync_end -
285 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
286 drm_mode->hsync_start += CVT_H_GRANULARITY -
287 drm_mode->hsync_start % CVT_H_GRANULARITY;
288 /* fill the Vsync values */
289 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
290 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
291 } else {
292 /* Reduced blanking */
293 /* Minimum vertical blanking interval time (µs)- default 460 */
294#define CVT_RB_MIN_VBLANK 460
295 /* Fixed number of clocks for horizontal sync */
296#define CVT_RB_H_SYNC 32
297 /* Fixed number of clocks for horizontal blanking */
298#define CVT_RB_H_BLANK 160
299 /* Fixed number of lines for vertical front porch - default 3*/
300#define CVT_RB_VFPORCH 3
301 int vbilines;
302 int tmp1, tmp2;
303 /* 8. Estimate Horizontal period. */
304 tmp1 = HV_FACTOR * 1000000 -
305 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
306 tmp2 = vdisplay_rnd + 2 * vmargin;
307 hperiod = tmp1 / (tmp2 * vfieldrate);
308 /* 9. Find number of lines in vertical blanking */
309 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
310 /* 10. Check if vertical blanking is sufficient */
311 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
312 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
313 /* 11. Find total number of lines in vertical field */
314 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
315 /* 12. Find total number of pixels in a line */
316 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
317 /* Fill in HSync values */
318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
319 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
320 /* Fill in VSync values */
321 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
322 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
323 }
324 /* 15/13. Find pixel clock frequency (kHz for xf86) */
325 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
326 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
327 /* 18/16. Find actual vertical frame frequency */
328 /* ignore - just set the mode flag for interlaced */
329 if (interlaced) {
330 drm_mode->vtotal *= 2;
331 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
332 }
333 /* Fill the mode line name */
334 drm_mode_set_name(drm_mode);
335 if (reduced)
336 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
337 DRM_MODE_FLAG_NVSYNC);
338 else
339 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
340 DRM_MODE_FLAG_NHSYNC);
341
342 return drm_mode;
343}
344EXPORT_SYMBOL(drm_cvt_mode);
345
346/**
347 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm
348 * @dev: drm device
349 * @hdisplay: hdisplay size
350 * @vdisplay: vdisplay size
351 * @vrefresh: vrefresh rate.
352 * @interlaced: whether to compute an interlaced mode
353 * @margins: desired margin (borders) size
354 * @GTF_M: extended GTF formula parameters
355 * @GTF_2C: extended GTF formula parameters
356 * @GTF_K: extended GTF formula parameters
357 * @GTF_2J: extended GTF formula parameters
358 *
359 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
360 * in here multiplied by two. For a C of 40, pass in 80.
361 *
362 * Returns:
363 * The modeline based on the full GTF algorithm stored in a drm_display_mode object.
364 * The display mode object is allocated with drm_mode_create(). Returns NULL
365 * when no mode could be allocated.
366 */
367struct drm_display_mode *
368drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
369 int vrefresh, bool interlaced, int margins,
370 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
371{ /* 1) top/bottom margin size (% of height) - default: 1.8, */
372#define GTF_MARGIN_PERCENTAGE 18
373 /* 2) character cell horizontal granularity (pixels) - default 8 */
374#define GTF_CELL_GRAN 8
375 /* 3) Minimum vertical porch (lines) - default 3 */
376#define GTF_MIN_V_PORCH 1
377 /* width of vsync in lines */
378#define V_SYNC_RQD 3
379 /* width of hsync as % of total line */
380#define H_SYNC_PERCENT 8
381 /* min time of vsync + back porch (microsec) */
382#define MIN_VSYNC_PLUS_BP 550
383 /* C' and M' are part of the Blanking Duty Cycle computation */
384#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
385#define GTF_M_PRIME (GTF_K * GTF_M / 256)
386 struct drm_display_mode *drm_mode;
387 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
388 int top_margin, bottom_margin;
389 int interlace;
390 unsigned int hfreq_est;
391 int vsync_plus_bp, vback_porch;
392 unsigned int vtotal_lines, vfieldrate_est, hperiod;
393 unsigned int vfield_rate, vframe_rate;
394 int left_margin, right_margin;
395 unsigned int total_active_pixels, ideal_duty_cycle;
396 unsigned int hblank, total_pixels, pixel_freq;
397 int hsync, hfront_porch, vodd_front_porch_lines;
398 unsigned int tmp1, tmp2;
399
400 drm_mode = drm_mode_create(dev);
401 if (!drm_mode)
402 return NULL;
403
404 /* 1. In order to give correct results, the number of horizontal
405 * pixels requested is first processed to ensure that it is divisible
406 * by the character size, by rounding it to the nearest character
407 * cell boundary:
408 */
409 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
410 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
411
412 /* 2. If interlace is requested, the number of vertical lines assumed
413 * by the calculation must be halved, as the computation calculates
414 * the number of vertical lines per field.
415 */
416 if (interlaced)
417 vdisplay_rnd = vdisplay / 2;
418 else
419 vdisplay_rnd = vdisplay;
420
421 /* 3. Find the frame rate required: */
422 if (interlaced)
423 vfieldrate_rqd = vrefresh * 2;
424 else
425 vfieldrate_rqd = vrefresh;
426
427 /* 4. Find number of lines in Top margin: */
428 top_margin = 0;
429 if (margins)
430 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
431 1000;
432 /* 5. Find number of lines in bottom margin: */
433 bottom_margin = top_margin;
434
435 /* 6. If interlace is required, then set variable interlace: */
436 if (interlaced)
437 interlace = 1;
438 else
439 interlace = 0;
440
441 /* 7. Estimate the Horizontal frequency */
442 {
443 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
444 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
445 2 + interlace;
446 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
447 }
448
449 /* 8. Find the number of lines in V sync + back porch */
450 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
451 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
452 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
453 /* 9. Find the number of lines in V back porch alone: */
454 vback_porch = vsync_plus_bp - V_SYNC_RQD;
455 /* 10. Find the total number of lines in Vertical field period: */
456 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
457 vsync_plus_bp + GTF_MIN_V_PORCH;
458 /* 11. Estimate the Vertical field frequency: */
459 vfieldrate_est = hfreq_est / vtotal_lines;
460 /* 12. Find the actual horizontal period: */
461 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
462
463 /* 13. Find the actual Vertical field frequency: */
464 vfield_rate = hfreq_est / vtotal_lines;
465 /* 14. Find the Vertical frame frequency: */
466 if (interlaced)
467 vframe_rate = vfield_rate / 2;
468 else
469 vframe_rate = vfield_rate;
470 /* 15. Find number of pixels in left margin: */
471 if (margins)
472 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
473 1000;
474 else
475 left_margin = 0;
476
477 /* 16.Find number of pixels in right margin: */
478 right_margin = left_margin;
479 /* 17.Find total number of active pixels in image and left and right */
480 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
481 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
482 ideal_duty_cycle = GTF_C_PRIME * 1000 -
483 (GTF_M_PRIME * 1000000 / hfreq_est);
484 /* 19.Find the number of pixels in the blanking time to the nearest
485 * double character cell: */
486 hblank = total_active_pixels * ideal_duty_cycle /
487 (100000 - ideal_duty_cycle);
488 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
489 hblank = hblank * 2 * GTF_CELL_GRAN;
490 /* 20.Find total number of pixels: */
491 total_pixels = total_active_pixels + hblank;
492 /* 21.Find pixel clock frequency: */
493 pixel_freq = total_pixels * hfreq_est / 1000;
494 /* Stage 1 computations are now complete; I should really pass
495 * the results to another function and do the Stage 2 computations,
496 * but I only need a few more values so I'll just append the
497 * computations here for now */
498 /* 17. Find the number of pixels in the horizontal sync period: */
499 hsync = H_SYNC_PERCENT * total_pixels / 100;
500 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
501 hsync = hsync * GTF_CELL_GRAN;
502 /* 18. Find the number of pixels in horizontal front porch period */
503 hfront_porch = hblank / 2 - hsync;
504 /* 36. Find the number of lines in the odd front porch period: */
505 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
506
507 /* finally, pack the results in the mode struct */
508 drm_mode->hdisplay = hdisplay_rnd;
509 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
511 drm_mode->htotal = total_pixels;
512 drm_mode->vdisplay = vdisplay_rnd;
513 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
514 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
515 drm_mode->vtotal = vtotal_lines;
516
517 drm_mode->clock = pixel_freq;
518
519 if (interlaced) {
520 drm_mode->vtotal *= 2;
521 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
522 }
523
524 drm_mode_set_name(drm_mode);
525 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
526 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
527 else
528 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
529
530 return drm_mode;
531}
532EXPORT_SYMBOL(drm_gtf_mode_complex);
533
534/**
535 * drm_gtf_mode - create the modeline based on the GTF algorithm
536 * @dev: drm device
537 * @hdisplay: hdisplay size
538 * @vdisplay: vdisplay size
539 * @vrefresh: vrefresh rate.
540 * @interlaced: whether to compute an interlaced mode
541 * @margins: desired margin (borders) size
542 *
543 * return the modeline based on GTF algorithm
544 *
545 * This function is to create the modeline based on the GTF algorithm.
546 * Generalized Timing Formula is derived from:
547 * GTF Spreadsheet by Andy Morrish (1/5/97)
548 * available at http://www.vesa.org
549 *
550 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
551 * What I have done is to translate it by using integer calculation.
552 * I also refer to the function of fb_get_mode in the file of
553 * drivers/video/fbmon.c
554 *
555 * Standard GTF parameters:
556 * M = 600
557 * C = 40
558 * K = 128
559 * J = 20
560 *
561 * Returns:
562 * The modeline based on the GTF algorithm stored in a drm_display_mode object.
563 * The display mode object is allocated with drm_mode_create(). Returns NULL
564 * when no mode could be allocated.
565 */
566struct drm_display_mode *
567drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
568 bool interlaced, int margins)
569{
570 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
571 interlaced, margins,
572 600, 40 * 2, 128, 20 * 2);
573}
574EXPORT_SYMBOL(drm_gtf_mode);
575
576#ifdef CONFIG_VIDEOMODE_HELPERS
577/**
578 * drm_display_mode_from_videomode - fill in @dmode using @vm,
579 * @vm: videomode structure to use as source
580 * @dmode: drm_display_mode structure to use as destination
581 *
582 * Fills out @dmode using the display mode specified in @vm.
583 */
584void drm_display_mode_from_videomode(const struct videomode *vm,
585 struct drm_display_mode *dmode)
586{
587 dmode->hdisplay = vm->hactive;
588 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
589 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
590 dmode->htotal = dmode->hsync_end + vm->hback_porch;
591
592 dmode->vdisplay = vm->vactive;
593 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
594 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
595 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
596
597 dmode->clock = vm->pixelclock / 1000;
598
599 dmode->flags = 0;
600 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
601 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
602 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
603 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
604 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
605 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
606 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
607 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
608 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
609 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
610 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
611 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
612 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
613 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
614 drm_mode_set_name(dmode);
615}
616EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
617
618#ifdef CONFIG_OF
619/**
620 * of_get_drm_display_mode - get a drm_display_mode from devicetree
621 * @np: device_node with the timing specification
622 * @dmode: will be set to the return value
623 * @index: index into the list of display timings in devicetree
624 *
625 * This function is expensive and should only be used, if only one mode is to be
626 * read from DT. To get multiple modes start with of_get_display_timings and
627 * work with that instead.
628 *
629 * Returns:
630 * 0 on success, a negative errno code when no of videomode node was found.
631 */
632int of_get_drm_display_mode(struct device_node *np,
633 struct drm_display_mode *dmode, int index)
634{
635 struct videomode vm;
636 int ret;
637
638 ret = of_get_videomode(np, &vm, index);
639 if (ret)
640 return ret;
641
642 drm_display_mode_from_videomode(&vm, dmode);
643
644 pr_debug("%s: got %dx%d display mode from %s\n",
645 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
646 drm_mode_debug_printmodeline(dmode);
647
648 return 0;
649}
650EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
651#endif /* CONFIG_OF */
652#endif /* CONFIG_VIDEOMODE_HELPERS */
653
654/**
655 * drm_mode_set_name - set the name on a mode
656 * @mode: name will be set in this mode
657 *
658 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay>
659 * with an optional 'i' suffix for interlaced modes.
660 */
661void drm_mode_set_name(struct drm_display_mode *mode)
662{
663 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
664
665 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
666 mode->hdisplay, mode->vdisplay,
667 interlaced ? "i" : "");
668}
669EXPORT_SYMBOL(drm_mode_set_name);
670
671/** drm_mode_hsync - get the hsync of a mode
672 * @mode: mode
673 *
674 * Returns:
675 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
676 * value first if it is not yet set.
677 */
678int drm_mode_hsync(const struct drm_display_mode *mode)
679{
680 unsigned int calc_val;
681
682 if (mode->hsync)
683 return mode->hsync;
684
685 if (mode->htotal < 0)
686 return 0;
687
688 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
689 calc_val += 500; /* round to 1000Hz */
690 calc_val /= 1000; /* truncate to kHz */
691
692 return calc_val;
693}
694EXPORT_SYMBOL(drm_mode_hsync);
695
696/**
697 * drm_mode_vrefresh - get the vrefresh of a mode
698 * @mode: mode
699 *
700 * Returns:
701 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the
702 * value first if it is not yet set.
703 */
704int drm_mode_vrefresh(const struct drm_display_mode *mode)
705{
706 int refresh = 0;
707 unsigned int calc_val;
708
709 if (mode->vrefresh > 0)
710 refresh = mode->vrefresh;
711 else if (mode->htotal > 0 && mode->vtotal > 0) {
712 int vtotal;
713 vtotal = mode->vtotal;
714 /* work out vrefresh the value will be x1000 */
715 calc_val = (mode->clock * 1000);
716 calc_val /= mode->htotal;
717 refresh = (calc_val + vtotal / 2) / vtotal;
718
719 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
720 refresh *= 2;
721 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
722 refresh /= 2;
723 if (mode->vscan > 1)
724 refresh /= mode->vscan;
725 }
726 return refresh;
727}
728EXPORT_SYMBOL(drm_mode_vrefresh);
729
730/**
731 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
732 * @p: mode
733 * @adjust_flags: a combination of adjustment flags
734 *
735 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
736 *
737 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
738 * interlaced modes.
739 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
740 * buffers containing two eyes (only adjust the timings when needed, eg. for
741 * "frame packing" or "side by side full").
742 */
743void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
744{
745 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
746 return;
747
748 p->crtc_clock = p->clock;
749 p->crtc_hdisplay = p->hdisplay;
750 p->crtc_hsync_start = p->hsync_start;
751 p->crtc_hsync_end = p->hsync_end;
752 p->crtc_htotal = p->htotal;
753 p->crtc_hskew = p->hskew;
754 p->crtc_vdisplay = p->vdisplay;
755 p->crtc_vsync_start = p->vsync_start;
756 p->crtc_vsync_end = p->vsync_end;
757 p->crtc_vtotal = p->vtotal;
758
759 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
760 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
761 p->crtc_vdisplay /= 2;
762 p->crtc_vsync_start /= 2;
763 p->crtc_vsync_end /= 2;
764 p->crtc_vtotal /= 2;
765 }
766 }
767
768 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
769 p->crtc_vdisplay *= 2;
770 p->crtc_vsync_start *= 2;
771 p->crtc_vsync_end *= 2;
772 p->crtc_vtotal *= 2;
773 }
774
775 if (p->vscan > 1) {
776 p->crtc_vdisplay *= p->vscan;
777 p->crtc_vsync_start *= p->vscan;
778 p->crtc_vsync_end *= p->vscan;
779 p->crtc_vtotal *= p->vscan;
780 }
781
782 if (adjust_flags & CRTC_STEREO_DOUBLE) {
783 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
784
785 switch (layout) {
786 case DRM_MODE_FLAG_3D_FRAME_PACKING:
787 p->crtc_clock *= 2;
788 p->crtc_vdisplay += p->crtc_vtotal;
789 p->crtc_vsync_start += p->crtc_vtotal;
790 p->crtc_vsync_end += p->crtc_vtotal;
791 p->crtc_vtotal += p->crtc_vtotal;
792 break;
793 }
794 }
795
796 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
797 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
798 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
799 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
800}
801EXPORT_SYMBOL(drm_mode_set_crtcinfo);
802
803/**
804 * drm_mode_copy - copy the mode
805 * @dst: mode to overwrite
806 * @src: mode to copy
807 *
808 * Copy an existing mode into another mode, preserving the object id and
809 * list head of the destination mode.
810 */
811void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
812{
813 int id = dst->base.id;
814 struct list_head head = dst->head;
815
816 *dst = *src;
817 dst->base.id = id;
818 dst->head = head;
819}
820EXPORT_SYMBOL(drm_mode_copy);
821
822/**
823 * drm_mode_duplicate - allocate and duplicate an existing mode
824 * @dev: drm_device to allocate the duplicated mode for
825 * @mode: mode to duplicate
826 *
827 * Just allocate a new mode, copy the existing mode into it, and return
828 * a pointer to it. Used to create new instances of established modes.
829 *
830 * Returns:
831 * Pointer to duplicated mode on success, NULL on error.
832 */
833struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
834 const struct drm_display_mode *mode)
835{
836 struct drm_display_mode *nmode;
837
838 nmode = drm_mode_create(dev);
839 if (!nmode)
840 return NULL;
841
842 drm_mode_copy(nmode, mode);
843
844 return nmode;
845}
846EXPORT_SYMBOL(drm_mode_duplicate);
847
848/**
849 * drm_mode_equal - test modes for equality
850 * @mode1: first mode
851 * @mode2: second mode
852 *
853 * Check to see if @mode1 and @mode2 are equivalent.
854 *
855 * Returns:
856 * True if the modes are equal, false otherwise.
857 */
858bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
859{
860 /* do clock check convert to PICOS so fb modes get matched
861 * the same */
862 if (mode1->clock && mode2->clock) {
863 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
864 return false;
865 } else if (mode1->clock != mode2->clock)
866 return false;
867
868 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
869 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
870 return false;
871
872 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
873}
874EXPORT_SYMBOL(drm_mode_equal);
875
876/**
877 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
878 * @mode1: first mode
879 * @mode2: second mode
880 *
881 * Check to see if @mode1 and @mode2 are equivalent, but
882 * don't check the pixel clocks nor the stereo layout.
883 *
884 * Returns:
885 * True if the modes are equal, false otherwise.
886 */
887bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
888 const struct drm_display_mode *mode2)
889{
890 if (mode1->hdisplay == mode2->hdisplay &&
891 mode1->hsync_start == mode2->hsync_start &&
892 mode1->hsync_end == mode2->hsync_end &&
893 mode1->htotal == mode2->htotal &&
894 mode1->hskew == mode2->hskew &&
895 mode1->vdisplay == mode2->vdisplay &&
896 mode1->vsync_start == mode2->vsync_start &&
897 mode1->vsync_end == mode2->vsync_end &&
898 mode1->vtotal == mode2->vtotal &&
899 mode1->vscan == mode2->vscan &&
900 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
901 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
902 return true;
903
904 return false;
905}
906EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
907
908/**
909 * drm_mode_validate_size - make sure modes adhere to size constraints
910 * @dev: DRM device
911 * @mode_list: list of modes to check
912 * @maxX: maximum width
913 * @maxY: maximum height
914 *
915 * This function is a helper which can be used to validate modes against size
916 * limitations of the DRM device/connector. If a mode is too big its status
917 * memeber is updated with the appropriate validation failure code. The list
918 * itself is not changed.
919 */
920void drm_mode_validate_size(struct drm_device *dev,
921 struct list_head *mode_list,
922 int maxX, int maxY)
923{
924 struct drm_display_mode *mode;
925
926 list_for_each_entry(mode, mode_list, head) {
927 if (maxX > 0 && mode->hdisplay > maxX)
928 mode->status = MODE_VIRTUAL_X;
929
930 if (maxY > 0 && mode->vdisplay > maxY)
931 mode->status = MODE_VIRTUAL_Y;
932 }
933}
934EXPORT_SYMBOL(drm_mode_validate_size);
935
936/**
937 * drm_mode_prune_invalid - remove invalid modes from mode list
938 * @dev: DRM device
939 * @mode_list: list of modes to check
940 * @verbose: be verbose about it
941 *
942 * This helper function can be used to prune a display mode list after
943 * validation has been completed. All modes who's status is not MODE_OK will be
944 * removed from the list, and if @verbose the status code and mode name is also
945 * printed to dmesg.
946 */
947void drm_mode_prune_invalid(struct drm_device *dev,
948 struct list_head *mode_list, bool verbose)
949{
950 struct drm_display_mode *mode, *t;
951
952 list_for_each_entry_safe(mode, t, mode_list, head) {
953 if (mode->status != MODE_OK) {
954 list_del(&mode->head);
955 if (verbose) {
956 drm_mode_debug_printmodeline(mode);
957 DRM_DEBUG_KMS("Not using %s mode %d\n",
958 mode->name, mode->status);
959 }
960 drm_mode_destroy(dev, mode);
961 }
962 }
963}
964EXPORT_SYMBOL(drm_mode_prune_invalid);
965
966/**
967 * drm_mode_compare - compare modes for favorability
968 * @priv: unused
969 * @lh_a: list_head for first mode
970 * @lh_b: list_head for second mode
971 *
972 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
973 * which is better.
974 *
975 * Returns:
976 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
977 * positive if @lh_b is better than @lh_a.
978 */
979static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
980{
981 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
982 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
983 int diff;
984
985 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
986 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
987 if (diff)
988 return diff;
989 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
990 if (diff)
991 return diff;
992
993 diff = b->vrefresh - a->vrefresh;
994 if (diff)
995 return diff;
996
997 diff = b->clock - a->clock;
998 return diff;
999}
1000
1001/**
1002 * drm_mode_sort - sort mode list
1003 * @mode_list: list of drm_display_mode structures to sort
1004 *
1005 * Sort @mode_list by favorability, moving good modes to the head of the list.
1006 */
1007void drm_mode_sort(struct list_head *mode_list)
1008{
1009 list_sort(NULL, mode_list, drm_mode_compare);
1010}
1011EXPORT_SYMBOL(drm_mode_sort);
1012
1013/**
1014 * drm_mode_connector_list_update - update the mode list for the connector
1015 * @connector: the connector to update
1016 *
1017 * This moves the modes from the @connector probed_modes list
1018 * to the actual mode list. It compares the probed mode against the current
1019 * list and only adds different/new modes.
1020 *
1021 * This is just a helper functions doesn't validate any modes itself and also
1022 * doesn't prune any invalid modes. Callers need to do that themselves.
1023 */
1024void drm_mode_connector_list_update(struct drm_connector *connector)
1025{
1026 struct drm_display_mode *mode;
1027 struct drm_display_mode *pmode, *pt;
1028 int found_it;
1029
1030 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1031
1032 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1033 head) {
1034 found_it = 0;
1035 /* go through current modes checking for the new probed mode */
1036 list_for_each_entry(mode, &connector->modes, head) {
1037 if (drm_mode_equal(pmode, mode)) {
1038 found_it = 1;
1039 /* if equal delete the probed mode */
1040 mode->status = pmode->status;
1041 /* Merge type bits together */
1042 mode->type |= pmode->type;
1043 list_del(&pmode->head);
1044 drm_mode_destroy(connector->dev, pmode);
1045 break;
1046 }
1047 }
1048
1049 if (!found_it) {
1050 list_move_tail(&pmode->head, &connector->modes);
1051 }
1052 }
1053}
1054EXPORT_SYMBOL(drm_mode_connector_list_update);
1055
1056/**
1057 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector
1058 * @mode_option: optional per connector mode option
1059 * @connector: connector to parse modeline for
1060 * @mode: preallocated drm_cmdline_mode structure to fill out
1061 *
1062 * This parses @mode_option command line modeline for modes and options to
1063 * configure the connector. If @mode_option is NULL the default command line
1064 * modeline in fb_mode_option will be parsed instead.
1065 *
1066 * This uses the same parameters as the fb modedb.c, except for an extra
1067 * force-enable, force-enable-digital and force-disable bit at the end:
1068 *
1069 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1070 *
1071 * The intermediate drm_cmdline_mode structure is required to store additional
1072 * options from the command line modline like the force-enabel/disable flag.
1073 *
1074 * Returns:
1075 * True if a valid modeline has been parsed, false otherwise.
1076 */
1077bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1078 struct drm_connector *connector,
1079 struct drm_cmdline_mode *mode)
1080{
1081 const char *name;
1082 unsigned int namelen;
1083 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1084 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1085 bool yres_specified = false, cvt = false, rb = false;
1086 bool interlace = false, margins = false, was_digit = false;
1087 int i;
1088 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1089
1090#ifdef CONFIG_FB
1091 if (!mode_option)
1092 mode_option = fb_mode_option;
1093#endif
1094
1095 if (!mode_option) {
1096 mode->specified = false;
1097 return false;
1098 }
1099
1100 name = mode_option;
1101 namelen = strlen(name);
1102 for (i = namelen-1; i >= 0; i--) {
1103 switch (name[i]) {
1104 case '@':
1105 if (!refresh_specified && !bpp_specified &&
1106 !yres_specified && !cvt && !rb && was_digit) {
1107 refresh = simple_strtol(&name[i+1], NULL, 10);
1108 refresh_specified = true;
1109 was_digit = false;
1110 } else
1111 goto done;
1112 break;
1113 case '-':
1114 if (!bpp_specified && !yres_specified && !cvt &&
1115 !rb && was_digit) {
1116 bpp = simple_strtol(&name[i+1], NULL, 10);
1117 bpp_specified = true;
1118 was_digit = false;
1119 } else
1120 goto done;
1121 break;
1122 case 'x':
1123 if (!yres_specified && was_digit) {
1124 yres = simple_strtol(&name[i+1], NULL, 10);
1125 yres_specified = true;
1126 was_digit = false;
1127 } else
1128 goto done;
1129 break;
1130 case '0' ... '9':
1131 was_digit = true;
1132 break;
1133 case 'M':
1134 if (yres_specified || cvt || was_digit)
1135 goto done;
1136 cvt = true;
1137 break;
1138 case 'R':
1139 if (yres_specified || cvt || rb || was_digit)
1140 goto done;
1141 rb = true;
1142 break;
1143 case 'm':
1144 if (cvt || yres_specified || was_digit)
1145 goto done;
1146 margins = true;
1147 break;
1148 case 'i':
1149 if (cvt || yres_specified || was_digit)
1150 goto done;
1151 interlace = true;
1152 break;
1153 case 'e':
1154 if (yres_specified || bpp_specified || refresh_specified ||
1155 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1156 goto done;
1157
1158 force = DRM_FORCE_ON;
1159 break;
1160 case 'D':
1161 if (yres_specified || bpp_specified || refresh_specified ||
1162 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1163 goto done;
1164
1165 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1166 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1167 force = DRM_FORCE_ON;
1168 else
1169 force = DRM_FORCE_ON_DIGITAL;
1170 break;
1171 case 'd':
1172 if (yres_specified || bpp_specified || refresh_specified ||
1173 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1174 goto done;
1175
1176 force = DRM_FORCE_OFF;
1177 break;
1178 default:
1179 goto done;
1180 }
1181 }
1182
1183 if (i < 0 && yres_specified) {
1184 char *ch;
1185 xres = simple_strtol(name, &ch, 10);
1186 if ((ch != NULL) && (*ch == 'x'))
1187 res_specified = true;
1188 else
1189 i = ch - name;
1190 } else if (!yres_specified && was_digit) {
1191 /* catch mode that begins with digits but has no 'x' */
1192 i = 0;
1193 }
1194done:
1195 if (i >= 0) {
1196 printk(KERN_WARNING
1197 "parse error at position %i in video mode '%s'\n",
1198 i, name);
1199 mode->specified = false;
1200 return false;
1201 }
1202
1203 if (res_specified) {
1204 mode->specified = true;
1205 mode->xres = xres;
1206 mode->yres = yres;
1207 }
1208
1209 if (refresh_specified) {
1210 mode->refresh_specified = true;
1211 mode->refresh = refresh;
1212 }
1213
1214 if (bpp_specified) {
1215 mode->bpp_specified = true;
1216 mode->bpp = bpp;
1217 }
1218 mode->rb = rb;
1219 mode->cvt = cvt;
1220 mode->interlace = interlace;
1221 mode->margins = margins;
1222 mode->force = force;
1223
1224 return true;
1225}
1226EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1227
1228/**
1229 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode
1230 * @dev: DRM device to create the new mode for
1231 * @cmd: input command line modeline
1232 *
1233 * Returns:
1234 * Pointer to converted mode on success, NULL on error.
1235 */
1236struct drm_display_mode *
1237drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1238 struct drm_cmdline_mode *cmd)
1239{
1240 struct drm_display_mode *mode;
1241
1242 if (cmd->cvt)
1243 mode = drm_cvt_mode(dev,
1244 cmd->xres, cmd->yres,
1245 cmd->refresh_specified ? cmd->refresh : 60,
1246 cmd->rb, cmd->interlace,
1247 cmd->margins);
1248 else
1249 mode = drm_gtf_mode(dev,
1250 cmd->xres, cmd->yres,
1251 cmd->refresh_specified ? cmd->refresh : 60,
1252 cmd->interlace,
1253 cmd->margins);
1254 if (!mode)
1255 return NULL;
1256
1257 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1258 return mode;
1259}
1260EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);