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1/*
2 * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
3 *
4 * (C) 2007 Michel Benoit
5 *
6 * Based on rtc-at91rm9200.c by Rick Bronson
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/time.h>
18#include <linux/rtc.h>
19#include <linux/interrupt.h>
20#include <linux/ioctl.h>
21#include <linux/slab.h>
22
23#include <mach/board.h>
24#include <mach/at91_rtt.h>
25#include <mach/cpu.h>
26
27
28/*
29 * This driver uses two configurable hardware resources that live in the
30 * AT91SAM9 backup power domain (intended to be powered at all times)
31 * to implement the Real Time Clock interfaces
32 *
33 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
34 * We can't assign the counter value (CRTV) ... but we can reset it.
35 *
36 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
37 * base time, normally an offset from the beginning of the POSIX
38 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
39 * local timezone's offset.
40 *
41 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
42 * is likewise a base (ALMV) plus that offset.
43 *
44 * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
45 * choose from, or a "real" RTC module. All systems have multiple GPBR
46 * registers available, likewise usable for more than "RTC" support.
47 */
48
49/*
50 * We store ALARM_DISABLED in ALMV to record that no alarm is set.
51 * It's also the reset value for that field.
52 */
53#define ALARM_DISABLED ((u32)~0)
54
55
56struct sam9_rtc {
57 void __iomem *rtt;
58 struct rtc_device *rtcdev;
59 u32 imr;
60};
61
62#define rtt_readl(rtc, field) \
63 __raw_readl((rtc)->rtt + AT91_RTT_ ## field)
64#define rtt_writel(rtc, field, val) \
65 __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
66
67#define gpbr_readl(rtc) \
68 at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR)
69#define gpbr_writel(rtc, val) \
70 at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val))
71
72/*
73 * Read current time and date in RTC
74 */
75static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
76{
77 struct sam9_rtc *rtc = dev_get_drvdata(dev);
78 u32 secs, secs2;
79 u32 offset;
80
81 /* read current time offset */
82 offset = gpbr_readl(rtc);
83 if (offset == 0)
84 return -EILSEQ;
85
86 /* reread the counter to help sync the two clock domains */
87 secs = rtt_readl(rtc, VR);
88 secs2 = rtt_readl(rtc, VR);
89 if (secs != secs2)
90 secs = rtt_readl(rtc, VR);
91
92 rtc_time_to_tm(offset + secs, tm);
93
94 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
95 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
96 tm->tm_hour, tm->tm_min, tm->tm_sec);
97
98 return 0;
99}
100
101/*
102 * Set current time and date in RTC
103 */
104static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
105{
106 struct sam9_rtc *rtc = dev_get_drvdata(dev);
107 int err;
108 u32 offset, alarm, mr;
109 unsigned long secs;
110
111 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
112 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
113 tm->tm_hour, tm->tm_min, tm->tm_sec);
114
115 err = rtc_tm_to_time(tm, &secs);
116 if (err != 0)
117 return err;
118
119 mr = rtt_readl(rtc, MR);
120
121 /* disable interrupts */
122 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
123
124 /* read current time offset */
125 offset = gpbr_readl(rtc);
126
127 /* store the new base time in a battery backup register */
128 secs += 1;
129 gpbr_writel(rtc, secs);
130
131 /* adjust the alarm time for the new base */
132 alarm = rtt_readl(rtc, AR);
133 if (alarm != ALARM_DISABLED) {
134 if (offset > secs) {
135 /* time jumped backwards, increase time until alarm */
136 alarm += (offset - secs);
137 } else if ((alarm + offset) > secs) {
138 /* time jumped forwards, decrease time until alarm */
139 alarm -= (secs - offset);
140 } else {
141 /* time jumped past the alarm, disable alarm */
142 alarm = ALARM_DISABLED;
143 mr &= ~AT91_RTT_ALMIEN;
144 }
145 rtt_writel(rtc, AR, alarm);
146 }
147
148 /* reset the timer, and re-enable interrupts */
149 rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
150
151 return 0;
152}
153
154static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
155{
156 struct sam9_rtc *rtc = dev_get_drvdata(dev);
157 struct rtc_time *tm = &alrm->time;
158 u32 alarm = rtt_readl(rtc, AR);
159 u32 offset;
160
161 offset = gpbr_readl(rtc);
162 if (offset == 0)
163 return -EILSEQ;
164
165 memset(alrm, 0, sizeof(*alrm));
166 if (alarm != ALARM_DISABLED && offset != 0) {
167 rtc_time_to_tm(offset + alarm, tm);
168
169 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
170 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
171 tm->tm_hour, tm->tm_min, tm->tm_sec);
172
173 if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
174 alrm->enabled = 1;
175 }
176
177 return 0;
178}
179
180static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
181{
182 struct sam9_rtc *rtc = dev_get_drvdata(dev);
183 struct rtc_time *tm = &alrm->time;
184 unsigned long secs;
185 u32 offset;
186 u32 mr;
187 int err;
188
189 err = rtc_tm_to_time(tm, &secs);
190 if (err != 0)
191 return err;
192
193 offset = gpbr_readl(rtc);
194 if (offset == 0) {
195 /* time is not set */
196 return -EILSEQ;
197 }
198 mr = rtt_readl(rtc, MR);
199 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
200
201 /* alarm in the past? finish and leave disabled */
202 if (secs <= offset) {
203 rtt_writel(rtc, AR, ALARM_DISABLED);
204 return 0;
205 }
206
207 /* else set alarm and maybe enable it */
208 rtt_writel(rtc, AR, secs - offset);
209 if (alrm->enabled)
210 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
211
212 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
213 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
214 tm->tm_min, tm->tm_sec);
215
216 return 0;
217}
218
219static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
220{
221 struct sam9_rtc *rtc = dev_get_drvdata(dev);
222 u32 mr = rtt_readl(rtc, MR);
223
224 dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
225 if (enabled)
226 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
227 else
228 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
229 return 0;
230}
231
232/*
233 * Provide additional RTC information in /proc/driver/rtc
234 */
235static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
236{
237 struct sam9_rtc *rtc = dev_get_drvdata(dev);
238 u32 mr = mr = rtt_readl(rtc, MR);
239
240 seq_printf(seq, "update_IRQ\t: %s\n",
241 (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
242 return 0;
243}
244
245/*
246 * IRQ handler for the RTC
247 */
248static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
249{
250 struct sam9_rtc *rtc = _rtc;
251 u32 sr, mr;
252 unsigned long events = 0;
253
254 /* Shared interrupt may be for another device. Note: reading
255 * SR clears it, so we must only read it in this irq handler!
256 */
257 mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
258 sr = rtt_readl(rtc, SR) & (mr >> 16);
259 if (!sr)
260 return IRQ_NONE;
261
262 /* alarm status */
263 if (sr & AT91_RTT_ALMS)
264 events |= (RTC_AF | RTC_IRQF);
265
266 /* timer update/increment */
267 if (sr & AT91_RTT_RTTINC)
268 events |= (RTC_UF | RTC_IRQF);
269
270 rtc_update_irq(rtc->rtcdev, 1, events);
271
272 pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
273 events >> 8, events & 0x000000FF);
274
275 return IRQ_HANDLED;
276}
277
278static const struct rtc_class_ops at91_rtc_ops = {
279 .read_time = at91_rtc_readtime,
280 .set_time = at91_rtc_settime,
281 .read_alarm = at91_rtc_readalarm,
282 .set_alarm = at91_rtc_setalarm,
283 .proc = at91_rtc_proc,
284 .alarm_irq_enable = at91_rtc_alarm_irq_enable,
285};
286
287/*
288 * Initialize and install RTC driver
289 */
290static int __init at91_rtc_probe(struct platform_device *pdev)
291{
292 struct resource *r;
293 struct sam9_rtc *rtc;
294 int ret;
295 u32 mr;
296
297 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
298 if (!r)
299 return -ENODEV;
300
301 rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
302 if (!rtc)
303 return -ENOMEM;
304
305 /* platform setup code should have handled this; sigh */
306 if (!device_can_wakeup(&pdev->dev))
307 device_init_wakeup(&pdev->dev, 1);
308
309 platform_set_drvdata(pdev, rtc);
310 rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
311 rtc->rtt += r->start;
312
313 mr = rtt_readl(rtc, MR);
314
315 /* unless RTT is counting at 1 Hz, re-initialize it */
316 if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
317 mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES);
318 gpbr_writel(rtc, 0);
319 }
320
321 /* disable all interrupts (same as on shutdown path) */
322 mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
323 rtt_writel(rtc, MR, mr);
324
325 rtc->rtcdev = rtc_device_register(pdev->name, &pdev->dev,
326 &at91_rtc_ops, THIS_MODULE);
327 if (IS_ERR(rtc->rtcdev)) {
328 ret = PTR_ERR(rtc->rtcdev);
329 goto fail;
330 }
331
332 /* register irq handler after we know what name we'll use */
333 ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt,
334 IRQF_DISABLED | IRQF_SHARED,
335 dev_name(&rtc->rtcdev->dev), rtc);
336 if (ret) {
337 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);
338 rtc_device_unregister(rtc->rtcdev);
339 goto fail;
340 }
341
342 /* NOTE: sam9260 rev A silicon has a ROM bug which resets the
343 * RTT on at least some reboots. If you have that chip, you must
344 * initialize the time from some external source like a GPS, wall
345 * clock, discrete RTC, etc
346 */
347
348 if (gpbr_readl(rtc) == 0)
349 dev_warn(&pdev->dev, "%s: SET TIME!\n",
350 dev_name(&rtc->rtcdev->dev));
351
352 return 0;
353
354fail:
355 platform_set_drvdata(pdev, NULL);
356 kfree(rtc);
357 return ret;
358}
359
360/*
361 * Disable and remove the RTC driver
362 */
363static int __exit at91_rtc_remove(struct platform_device *pdev)
364{
365 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
366 u32 mr = rtt_readl(rtc, MR);
367
368 /* disable all interrupts */
369 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
370 free_irq(AT91_ID_SYS, rtc);
371
372 rtc_device_unregister(rtc->rtcdev);
373
374 platform_set_drvdata(pdev, NULL);
375 kfree(rtc);
376 return 0;
377}
378
379static void at91_rtc_shutdown(struct platform_device *pdev)
380{
381 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
382 u32 mr = rtt_readl(rtc, MR);
383
384 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
385 rtt_writel(rtc, MR, mr & ~rtc->imr);
386}
387
388#ifdef CONFIG_PM
389
390/* AT91SAM9 RTC Power management control */
391
392static int at91_rtc_suspend(struct platform_device *pdev,
393 pm_message_t state)
394{
395 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
396 u32 mr = rtt_readl(rtc, MR);
397
398 /*
399 * This IRQ is shared with DBGU and other hardware which isn't
400 * necessarily a wakeup event source.
401 */
402 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
403 if (rtc->imr) {
404 if (device_may_wakeup(&pdev->dev) && (mr & AT91_RTT_ALMIEN)) {
405 enable_irq_wake(AT91_ID_SYS);
406 /* don't let RTTINC cause wakeups */
407 if (mr & AT91_RTT_RTTINCIEN)
408 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
409 } else
410 rtt_writel(rtc, MR, mr & ~rtc->imr);
411 }
412
413 return 0;
414}
415
416static int at91_rtc_resume(struct platform_device *pdev)
417{
418 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
419 u32 mr;
420
421 if (rtc->imr) {
422 if (device_may_wakeup(&pdev->dev))
423 disable_irq_wake(AT91_ID_SYS);
424 mr = rtt_readl(rtc, MR);
425 rtt_writel(rtc, MR, mr | rtc->imr);
426 }
427
428 return 0;
429}
430#else
431#define at91_rtc_suspend NULL
432#define at91_rtc_resume NULL
433#endif
434
435static struct platform_driver at91_rtc_driver = {
436 .driver.name = "rtc-at91sam9",
437 .driver.owner = THIS_MODULE,
438 .remove = __exit_p(at91_rtc_remove),
439 .shutdown = at91_rtc_shutdown,
440 .suspend = at91_rtc_suspend,
441 .resume = at91_rtc_resume,
442};
443
444/* Chips can have more than one RTT module, and they can be used for more
445 * than just RTCs. So we can't just register as "the" RTT driver.
446 *
447 * A normal approach in such cases is to create a library to allocate and
448 * free the modules. Here we just use bus_find_device() as like such a
449 * library, binding directly ... no runtime "library" footprint is needed.
450 */
451static int __init at91_rtc_match(struct device *dev, void *v)
452{
453 struct platform_device *pdev = to_platform_device(dev);
454 int ret;
455
456 /* continue searching if this isn't the RTT we need */
457 if (strcmp("at91_rtt", pdev->name) != 0
458 || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT)
459 goto fail;
460
461 /* else we found it ... but fail unless we can bind to the RTC driver */
462 if (dev->driver) {
463 dev_dbg(dev, "busy, can't use as RTC!\n");
464 goto fail;
465 }
466 dev->driver = &at91_rtc_driver.driver;
467 if (device_attach(dev) == 0) {
468 dev_dbg(dev, "can't attach RTC!\n");
469 goto fail;
470 }
471 ret = at91_rtc_probe(pdev);
472 if (ret == 0)
473 return true;
474
475 dev_dbg(dev, "RTC probe err %d!\n", ret);
476fail:
477 return false;
478}
479
480static int __init at91_rtc_init(void)
481{
482 int status;
483 struct device *rtc;
484
485 status = platform_driver_register(&at91_rtc_driver);
486 if (status)
487 return status;
488 rtc = bus_find_device(&platform_bus_type, NULL,
489 NULL, at91_rtc_match);
490 if (!rtc)
491 platform_driver_unregister(&at91_rtc_driver);
492 return rtc ? 0 : -ENODEV;
493}
494module_init(at91_rtc_init);
495
496static void __exit at91_rtc_exit(void)
497{
498 platform_driver_unregister(&at91_rtc_driver);
499}
500module_exit(at91_rtc_exit);
501
502
503MODULE_AUTHOR("Michel Benoit");
504MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
505MODULE_LICENSE("GPL");
1/*
2 * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
3 *
4 * (C) 2007 Michel Benoit
5 *
6 * Based on rtc-at91rm9200.c by Rick Bronson
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/time.h>
18#include <linux/rtc.h>
19#include <linux/interrupt.h>
20#include <linux/ioctl.h>
21#include <linux/slab.h>
22#include <linux/platform_data/atmel.h>
23#include <linux/io.h>
24
25#include <mach/at91_rtt.h>
26#include <mach/cpu.h>
27#include <mach/hardware.h>
28
29/*
30 * This driver uses two configurable hardware resources that live in the
31 * AT91SAM9 backup power domain (intended to be powered at all times)
32 * to implement the Real Time Clock interfaces
33 *
34 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
35 * We can't assign the counter value (CRTV) ... but we can reset it.
36 *
37 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
38 * base time, normally an offset from the beginning of the POSIX
39 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
40 * local timezone's offset.
41 *
42 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
43 * is likewise a base (ALMV) plus that offset.
44 *
45 * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
46 * choose from, or a "real" RTC module. All systems have multiple GPBR
47 * registers available, likewise usable for more than "RTC" support.
48 */
49
50/*
51 * We store ALARM_DISABLED in ALMV to record that no alarm is set.
52 * It's also the reset value for that field.
53 */
54#define ALARM_DISABLED ((u32)~0)
55
56
57struct sam9_rtc {
58 void __iomem *rtt;
59 struct rtc_device *rtcdev;
60 u32 imr;
61 void __iomem *gpbr;
62 int irq;
63};
64
65#define rtt_readl(rtc, field) \
66 __raw_readl((rtc)->rtt + AT91_RTT_ ## field)
67#define rtt_writel(rtc, field, val) \
68 __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
69
70#define gpbr_readl(rtc) \
71 __raw_readl((rtc)->gpbr)
72#define gpbr_writel(rtc, val) \
73 __raw_writel((val), (rtc)->gpbr)
74
75/*
76 * Read current time and date in RTC
77 */
78static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
79{
80 struct sam9_rtc *rtc = dev_get_drvdata(dev);
81 u32 secs, secs2;
82 u32 offset;
83
84 /* read current time offset */
85 offset = gpbr_readl(rtc);
86 if (offset == 0)
87 return -EILSEQ;
88
89 /* reread the counter to help sync the two clock domains */
90 secs = rtt_readl(rtc, VR);
91 secs2 = rtt_readl(rtc, VR);
92 if (secs != secs2)
93 secs = rtt_readl(rtc, VR);
94
95 rtc_time_to_tm(offset + secs, tm);
96
97 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
98 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
99 tm->tm_hour, tm->tm_min, tm->tm_sec);
100
101 return 0;
102}
103
104/*
105 * Set current time and date in RTC
106 */
107static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
108{
109 struct sam9_rtc *rtc = dev_get_drvdata(dev);
110 int err;
111 u32 offset, alarm, mr;
112 unsigned long secs;
113
114 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
115 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
116 tm->tm_hour, tm->tm_min, tm->tm_sec);
117
118 err = rtc_tm_to_time(tm, &secs);
119 if (err != 0)
120 return err;
121
122 mr = rtt_readl(rtc, MR);
123
124 /* disable interrupts */
125 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
126
127 /* read current time offset */
128 offset = gpbr_readl(rtc);
129
130 /* store the new base time in a battery backup register */
131 secs += 1;
132 gpbr_writel(rtc, secs);
133
134 /* adjust the alarm time for the new base */
135 alarm = rtt_readl(rtc, AR);
136 if (alarm != ALARM_DISABLED) {
137 if (offset > secs) {
138 /* time jumped backwards, increase time until alarm */
139 alarm += (offset - secs);
140 } else if ((alarm + offset) > secs) {
141 /* time jumped forwards, decrease time until alarm */
142 alarm -= (secs - offset);
143 } else {
144 /* time jumped past the alarm, disable alarm */
145 alarm = ALARM_DISABLED;
146 mr &= ~AT91_RTT_ALMIEN;
147 }
148 rtt_writel(rtc, AR, alarm);
149 }
150
151 /* reset the timer, and re-enable interrupts */
152 rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
153
154 return 0;
155}
156
157static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
158{
159 struct sam9_rtc *rtc = dev_get_drvdata(dev);
160 struct rtc_time *tm = &alrm->time;
161 u32 alarm = rtt_readl(rtc, AR);
162 u32 offset;
163
164 offset = gpbr_readl(rtc);
165 if (offset == 0)
166 return -EILSEQ;
167
168 memset(alrm, 0, sizeof(*alrm));
169 if (alarm != ALARM_DISABLED && offset != 0) {
170 rtc_time_to_tm(offset + alarm, tm);
171
172 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
173 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
174 tm->tm_hour, tm->tm_min, tm->tm_sec);
175
176 if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
177 alrm->enabled = 1;
178 }
179
180 return 0;
181}
182
183static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
184{
185 struct sam9_rtc *rtc = dev_get_drvdata(dev);
186 struct rtc_time *tm = &alrm->time;
187 unsigned long secs;
188 u32 offset;
189 u32 mr;
190 int err;
191
192 err = rtc_tm_to_time(tm, &secs);
193 if (err != 0)
194 return err;
195
196 offset = gpbr_readl(rtc);
197 if (offset == 0) {
198 /* time is not set */
199 return -EILSEQ;
200 }
201 mr = rtt_readl(rtc, MR);
202 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
203
204 /* alarm in the past? finish and leave disabled */
205 if (secs <= offset) {
206 rtt_writel(rtc, AR, ALARM_DISABLED);
207 return 0;
208 }
209
210 /* else set alarm and maybe enable it */
211 rtt_writel(rtc, AR, secs - offset);
212 if (alrm->enabled)
213 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
214
215 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
216 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
217 tm->tm_min, tm->tm_sec);
218
219 return 0;
220}
221
222static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
223{
224 struct sam9_rtc *rtc = dev_get_drvdata(dev);
225 u32 mr = rtt_readl(rtc, MR);
226
227 dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
228 if (enabled)
229 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
230 else
231 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
232 return 0;
233}
234
235/*
236 * Provide additional RTC information in /proc/driver/rtc
237 */
238static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
239{
240 struct sam9_rtc *rtc = dev_get_drvdata(dev);
241 u32 mr = mr = rtt_readl(rtc, MR);
242
243 seq_printf(seq, "update_IRQ\t: %s\n",
244 (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
245 return 0;
246}
247
248/*
249 * IRQ handler for the RTC
250 */
251static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
252{
253 struct sam9_rtc *rtc = _rtc;
254 u32 sr, mr;
255 unsigned long events = 0;
256
257 /* Shared interrupt may be for another device. Note: reading
258 * SR clears it, so we must only read it in this irq handler!
259 */
260 mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
261 sr = rtt_readl(rtc, SR) & (mr >> 16);
262 if (!sr)
263 return IRQ_NONE;
264
265 /* alarm status */
266 if (sr & AT91_RTT_ALMS)
267 events |= (RTC_AF | RTC_IRQF);
268
269 /* timer update/increment */
270 if (sr & AT91_RTT_RTTINC)
271 events |= (RTC_UF | RTC_IRQF);
272
273 rtc_update_irq(rtc->rtcdev, 1, events);
274
275 pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
276 events >> 8, events & 0x000000FF);
277
278 return IRQ_HANDLED;
279}
280
281static const struct rtc_class_ops at91_rtc_ops = {
282 .read_time = at91_rtc_readtime,
283 .set_time = at91_rtc_settime,
284 .read_alarm = at91_rtc_readalarm,
285 .set_alarm = at91_rtc_setalarm,
286 .proc = at91_rtc_proc,
287 .alarm_irq_enable = at91_rtc_alarm_irq_enable,
288};
289
290/*
291 * Initialize and install RTC driver
292 */
293static int at91_rtc_probe(struct platform_device *pdev)
294{
295 struct resource *r, *r_gpbr;
296 struct sam9_rtc *rtc;
297 int ret, irq;
298 u32 mr;
299
300 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
301 r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
302 if (!r || !r_gpbr) {
303 dev_err(&pdev->dev, "need 2 ressources\n");
304 return -ENODEV;
305 }
306
307 irq = platform_get_irq(pdev, 0);
308 if (irq < 0) {
309 dev_err(&pdev->dev, "failed to get interrupt resource\n");
310 return irq;
311 }
312
313 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
314 if (!rtc)
315 return -ENOMEM;
316
317 rtc->irq = irq;
318
319 /* platform setup code should have handled this; sigh */
320 if (!device_can_wakeup(&pdev->dev))
321 device_init_wakeup(&pdev->dev, 1);
322
323 platform_set_drvdata(pdev, rtc);
324 rtc->rtt = devm_ioremap(&pdev->dev, r->start, resource_size(r));
325 if (!rtc->rtt) {
326 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
327 return -ENOMEM;
328 }
329
330 rtc->gpbr = devm_ioremap(&pdev->dev, r_gpbr->start,
331 resource_size(r_gpbr));
332 if (!rtc->gpbr) {
333 dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n");
334 return -ENOMEM;
335 }
336
337 mr = rtt_readl(rtc, MR);
338
339 /* unless RTT is counting at 1 Hz, re-initialize it */
340 if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
341 mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES);
342 gpbr_writel(rtc, 0);
343 }
344
345 /* disable all interrupts (same as on shutdown path) */
346 mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
347 rtt_writel(rtc, MR, mr);
348
349 rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name,
350 &at91_rtc_ops, THIS_MODULE);
351 if (IS_ERR(rtc->rtcdev))
352 return PTR_ERR(rtc->rtcdev);
353
354 /* register irq handler after we know what name we'll use */
355 ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
356 IRQF_SHARED, dev_name(&rtc->rtcdev->dev), rtc);
357 if (ret) {
358 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
359 return ret;
360 }
361
362 /* NOTE: sam9260 rev A silicon has a ROM bug which resets the
363 * RTT on at least some reboots. If you have that chip, you must
364 * initialize the time from some external source like a GPS, wall
365 * clock, discrete RTC, etc
366 */
367
368 if (gpbr_readl(rtc) == 0)
369 dev_warn(&pdev->dev, "%s: SET TIME!\n",
370 dev_name(&rtc->rtcdev->dev));
371
372 return 0;
373}
374
375/*
376 * Disable and remove the RTC driver
377 */
378static int at91_rtc_remove(struct platform_device *pdev)
379{
380 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
381 u32 mr = rtt_readl(rtc, MR);
382
383 /* disable all interrupts */
384 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
385
386 return 0;
387}
388
389static void at91_rtc_shutdown(struct platform_device *pdev)
390{
391 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
392 u32 mr = rtt_readl(rtc, MR);
393
394 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
395 rtt_writel(rtc, MR, mr & ~rtc->imr);
396}
397
398#ifdef CONFIG_PM_SLEEP
399
400/* AT91SAM9 RTC Power management control */
401
402static int at91_rtc_suspend(struct device *dev)
403{
404 struct sam9_rtc *rtc = dev_get_drvdata(dev);
405 u32 mr = rtt_readl(rtc, MR);
406
407 /*
408 * This IRQ is shared with DBGU and other hardware which isn't
409 * necessarily a wakeup event source.
410 */
411 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
412 if (rtc->imr) {
413 if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) {
414 enable_irq_wake(rtc->irq);
415 /* don't let RTTINC cause wakeups */
416 if (mr & AT91_RTT_RTTINCIEN)
417 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
418 } else
419 rtt_writel(rtc, MR, mr & ~rtc->imr);
420 }
421
422 return 0;
423}
424
425static int at91_rtc_resume(struct device *dev)
426{
427 struct sam9_rtc *rtc = dev_get_drvdata(dev);
428 u32 mr;
429
430 if (rtc->imr) {
431 if (device_may_wakeup(dev))
432 disable_irq_wake(rtc->irq);
433 mr = rtt_readl(rtc, MR);
434 rtt_writel(rtc, MR, mr | rtc->imr);
435 }
436
437 return 0;
438}
439#endif
440
441static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
442
443static struct platform_driver at91_rtc_driver = {
444 .probe = at91_rtc_probe,
445 .remove = at91_rtc_remove,
446 .shutdown = at91_rtc_shutdown,
447 .driver = {
448 .name = "rtc-at91sam9",
449 .owner = THIS_MODULE,
450 .pm = &at91_rtc_pm_ops,
451 },
452};
453
454module_platform_driver(at91_rtc_driver);
455
456MODULE_AUTHOR("Michel Benoit");
457MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
458MODULE_LICENSE("GPL");