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1/*
2 * File: htirq.c
3 * Purpose: Hypertransport Interrupt Capability
4 *
5 * Copyright (C) 2006 Linux Networx
6 * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
7 */
8
9#include <linux/irq.h>
10#include <linux/pci.h>
11#include <linux/spinlock.h>
12#include <linux/slab.h>
13#include <linux/htirq.h>
14
15/* Global ht irq lock.
16 *
17 * This is needed to serialize access to the data port in hypertransport
18 * irq capability.
19 *
20 * With multiple simultaneous hypertransport irq devices it might pay
21 * to make this more fine grained. But start with simple, stupid, and correct.
22 */
23static DEFINE_SPINLOCK(ht_irq_lock);
24
25struct ht_irq_cfg {
26 struct pci_dev *dev;
27 /* Update callback used to cope with buggy hardware */
28 ht_irq_update_t *update;
29 unsigned pos;
30 unsigned idx;
31 struct ht_irq_msg msg;
32};
33
34
35void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
36{
37 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
38 unsigned long flags;
39 spin_lock_irqsave(&ht_irq_lock, flags);
40 if (cfg->msg.address_lo != msg->address_lo) {
41 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
42 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo);
43 }
44 if (cfg->msg.address_hi != msg->address_hi) {
45 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
46 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi);
47 }
48 if (cfg->update)
49 cfg->update(cfg->dev, irq, msg);
50 spin_unlock_irqrestore(&ht_irq_lock, flags);
51 cfg->msg = *msg;
52}
53
54void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
55{
56 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
57 *msg = cfg->msg;
58}
59
60void mask_ht_irq(struct irq_data *data)
61{
62 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
63 struct ht_irq_msg msg = cfg->msg;
64
65 msg.address_lo |= 1;
66 write_ht_irq_msg(data->irq, &msg);
67}
68
69void unmask_ht_irq(struct irq_data *data)
70{
71 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
72 struct ht_irq_msg msg = cfg->msg;
73
74 msg.address_lo &= ~1;
75 write_ht_irq_msg(data->irq, &msg);
76}
77
78/**
79 * __ht_create_irq - create an irq and attach it to a device.
80 * @dev: The hypertransport device to find the irq capability on.
81 * @idx: Which of the possible irqs to attach to.
82 * @update: Function to be called when changing the htirq message
83 *
84 * The irq number of the new irq or a negative error value is returned.
85 */
86int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update)
87{
88 struct ht_irq_cfg *cfg;
89 unsigned long flags;
90 u32 data;
91 int max_irq;
92 int pos;
93 int irq;
94 int node;
95
96 pos = pci_find_ht_capability(dev, HT_CAPTYPE_IRQ);
97 if (!pos)
98 return -EINVAL;
99
100 /* Verify the idx I want to use is in range */
101 spin_lock_irqsave(&ht_irq_lock, flags);
102 pci_write_config_byte(dev, pos + 2, 1);
103 pci_read_config_dword(dev, pos + 4, &data);
104 spin_unlock_irqrestore(&ht_irq_lock, flags);
105
106 max_irq = (data >> 16) & 0xff;
107 if ( idx > max_irq)
108 return -EINVAL;
109
110 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
111 if (!cfg)
112 return -ENOMEM;
113
114 cfg->dev = dev;
115 cfg->update = update;
116 cfg->pos = pos;
117 cfg->idx = 0x10 + (idx * 2);
118 /* Initialize msg to a value that will never match the first write. */
119 cfg->msg.address_lo = 0xffffffff;
120 cfg->msg.address_hi = 0xffffffff;
121
122 node = dev_to_node(&dev->dev);
123 irq = create_irq_nr(0, node);
124
125 if (irq <= 0) {
126 kfree(cfg);
127 return -EBUSY;
128 }
129 irq_set_handler_data(irq, cfg);
130
131 if (arch_setup_ht_irq(irq, dev) < 0) {
132 ht_destroy_irq(irq);
133 return -EBUSY;
134 }
135
136 return irq;
137}
138
139/**
140 * ht_create_irq - create an irq and attach it to a device.
141 * @dev: The hypertransport device to find the irq capability on.
142 * @idx: Which of the possible irqs to attach to.
143 *
144 * ht_create_irq needs to be called for all hypertransport devices
145 * that generate irqs.
146 *
147 * The irq number of the new irq or a negative error value is returned.
148 */
149int ht_create_irq(struct pci_dev *dev, int idx)
150{
151 return __ht_create_irq(dev, idx, NULL);
152}
153
154/**
155 * ht_destroy_irq - destroy an irq created with ht_create_irq
156 * @irq: irq to be destroyed
157 *
158 * This reverses ht_create_irq removing the specified irq from
159 * existence. The irq should be free before this happens.
160 */
161void ht_destroy_irq(unsigned int irq)
162{
163 struct ht_irq_cfg *cfg;
164
165 cfg = irq_get_handler_data(irq);
166 irq_set_chip(irq, NULL);
167 irq_set_handler_data(irq, NULL);
168 destroy_irq(irq);
169
170 kfree(cfg);
171}
172
173EXPORT_SYMBOL(__ht_create_irq);
174EXPORT_SYMBOL(ht_create_irq);
175EXPORT_SYMBOL(ht_destroy_irq);
1/*
2 * File: htirq.c
3 * Purpose: Hypertransport Interrupt Capability
4 *
5 * Copyright (C) 2006 Linux Networx
6 * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
7 */
8
9#include <linux/irq.h>
10#include <linux/pci.h>
11#include <linux/spinlock.h>
12#include <linux/export.h>
13#include <linux/slab.h>
14#include <linux/htirq.h>
15
16/* Global ht irq lock.
17 *
18 * This is needed to serialize access to the data port in hypertransport
19 * irq capability.
20 *
21 * With multiple simultaneous hypertransport irq devices it might pay
22 * to make this more fine grained. But start with simple, stupid, and correct.
23 */
24static DEFINE_SPINLOCK(ht_irq_lock);
25
26struct ht_irq_cfg {
27 struct pci_dev *dev;
28 /* Update callback used to cope with buggy hardware */
29 ht_irq_update_t *update;
30 unsigned pos;
31 unsigned idx;
32 struct ht_irq_msg msg;
33};
34
35
36void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
37{
38 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
39 unsigned long flags;
40 spin_lock_irqsave(&ht_irq_lock, flags);
41 if (cfg->msg.address_lo != msg->address_lo) {
42 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
43 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo);
44 }
45 if (cfg->msg.address_hi != msg->address_hi) {
46 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
47 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi);
48 }
49 if (cfg->update)
50 cfg->update(cfg->dev, irq, msg);
51 spin_unlock_irqrestore(&ht_irq_lock, flags);
52 cfg->msg = *msg;
53}
54
55void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
56{
57 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
58 *msg = cfg->msg;
59}
60
61void mask_ht_irq(struct irq_data *data)
62{
63 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
64 struct ht_irq_msg msg = cfg->msg;
65
66 msg.address_lo |= 1;
67 write_ht_irq_msg(data->irq, &msg);
68}
69
70void unmask_ht_irq(struct irq_data *data)
71{
72 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
73 struct ht_irq_msg msg = cfg->msg;
74
75 msg.address_lo &= ~1;
76 write_ht_irq_msg(data->irq, &msg);
77}
78
79/**
80 * __ht_create_irq - create an irq and attach it to a device.
81 * @dev: The hypertransport device to find the irq capability on.
82 * @idx: Which of the possible irqs to attach to.
83 * @update: Function to be called when changing the htirq message
84 *
85 * The irq number of the new irq or a negative error value is returned.
86 */
87int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update)
88{
89 struct ht_irq_cfg *cfg;
90 unsigned long flags;
91 u32 data;
92 int max_irq;
93 int pos;
94 int irq;
95 int node;
96
97 pos = pci_find_ht_capability(dev, HT_CAPTYPE_IRQ);
98 if (!pos)
99 return -EINVAL;
100
101 /* Verify the idx I want to use is in range */
102 spin_lock_irqsave(&ht_irq_lock, flags);
103 pci_write_config_byte(dev, pos + 2, 1);
104 pci_read_config_dword(dev, pos + 4, &data);
105 spin_unlock_irqrestore(&ht_irq_lock, flags);
106
107 max_irq = (data >> 16) & 0xff;
108 if ( idx > max_irq)
109 return -EINVAL;
110
111 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
112 if (!cfg)
113 return -ENOMEM;
114
115 cfg->dev = dev;
116 cfg->update = update;
117 cfg->pos = pos;
118 cfg->idx = 0x10 + (idx * 2);
119 /* Initialize msg to a value that will never match the first write. */
120 cfg->msg.address_lo = 0xffffffff;
121 cfg->msg.address_hi = 0xffffffff;
122
123 node = dev_to_node(&dev->dev);
124 irq = create_irq_nr(0, node);
125
126 if (irq <= 0) {
127 kfree(cfg);
128 return -EBUSY;
129 }
130 irq_set_handler_data(irq, cfg);
131
132 if (arch_setup_ht_irq(irq, dev) < 0) {
133 ht_destroy_irq(irq);
134 return -EBUSY;
135 }
136
137 return irq;
138}
139
140/**
141 * ht_create_irq - create an irq and attach it to a device.
142 * @dev: The hypertransport device to find the irq capability on.
143 * @idx: Which of the possible irqs to attach to.
144 *
145 * ht_create_irq needs to be called for all hypertransport devices
146 * that generate irqs.
147 *
148 * The irq number of the new irq or a negative error value is returned.
149 */
150int ht_create_irq(struct pci_dev *dev, int idx)
151{
152 return __ht_create_irq(dev, idx, NULL);
153}
154
155/**
156 * ht_destroy_irq - destroy an irq created with ht_create_irq
157 * @irq: irq to be destroyed
158 *
159 * This reverses ht_create_irq removing the specified irq from
160 * existence. The irq should be free before this happens.
161 */
162void ht_destroy_irq(unsigned int irq)
163{
164 struct ht_irq_cfg *cfg;
165
166 cfg = irq_get_handler_data(irq);
167 irq_set_chip(irq, NULL);
168 irq_set_handler_data(irq, NULL);
169 destroy_irq(irq);
170
171 kfree(cfg);
172}
173
174EXPORT_SYMBOL(__ht_create_irq);
175EXPORT_SYMBOL(ht_create_irq);
176EXPORT_SYMBOL(ht_destroy_irq);