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1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * RajeshwarR: Dec 11, 2007
9 * -- Added support for Inter Processor Interrupts
10 *
11 * Vineetg: Nov 1st, 2007
12 * -- Initial Write (Borrowed heavily from ARM)
13 */
14
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/sched.h>
19#include <linux/interrupt.h>
20#include <linux/profile.h>
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/mm.h>
24#include <linux/cpu.h>
25#include <linux/smp.h>
26#include <linux/irq.h>
27#include <linux/delay.h>
28#include <linux/atomic.h>
29#include <linux/percpu.h>
30#include <linux/cpumask.h>
31#include <linux/spinlock_types.h>
32#include <linux/reboot.h>
33#include <asm/processor.h>
34#include <asm/setup.h>
35#include <asm/mach_desc.h>
36
37arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
38arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
39
40struct plat_smp_ops plat_smp_ops;
41
42/* XXX: per cpu ? Only needed once in early seconday boot */
43struct task_struct *secondary_idle_tsk;
44
45/* Called from start_kernel */
46void __init smp_prepare_boot_cpu(void)
47{
48}
49
50/*
51 * Initialise the CPU possible map early - this describes the CPUs
52 * which may be present or become present in the system.
53 */
54void __init smp_init_cpus(void)
55{
56 unsigned int i;
57
58 for (i = 0; i < NR_CPUS; i++)
59 set_cpu_possible(i, true);
60}
61
62/* called from init ( ) => process 1 */
63void __init smp_prepare_cpus(unsigned int max_cpus)
64{
65 int i;
66
67 /*
68 * Initialise the present map, which describes the set of CPUs
69 * actually populated at the present time.
70 */
71 for (i = 0; i < max_cpus; i++)
72 set_cpu_present(i, true);
73}
74
75void __init smp_cpus_done(unsigned int max_cpus)
76{
77
78}
79
80/*
81 * After power-up, a non Master CPU needs to wait for Master to kick start it
82 *
83 * The default implementation halts
84 *
85 * This relies on platform specific support allowing Master to directly set
86 * this CPU's PC (to be @first_lines_of_secondary() and kick start it.
87 *
88 * In lack of such h/w assist, platforms can override this function
89 * - make this function busy-spin on a token, eventually set by Master
90 * (from arc_platform_smp_wakeup_cpu())
91 * - Once token is available, jump to @first_lines_of_secondary
92 * (using inline asm).
93 *
94 * Alert: can NOT use stack here as it has not been determined/setup for CPU.
95 * If it turns out to be elaborate, it's better to code it in assembly
96 *
97 */
98void __weak arc_platform_smp_wait_to_boot(int cpu)
99{
100 /*
101 * As a hack for debugging - since debugger will single-step over the
102 * FLAG insn - wrap the halt itself it in a self loop
103 */
104 __asm__ __volatile__(
105 "1: \n"
106 " flag 1 \n"
107 " b 1b \n");
108}
109
110const char *arc_platform_smp_cpuinfo(void)
111{
112 return plat_smp_ops.info;
113}
114
115/*
116 * The very first "C" code executed by secondary
117 * Called from asm stub in head.S
118 * "current"/R25 already setup by low level boot code
119 */
120void start_kernel_secondary(void)
121{
122 struct mm_struct *mm = &init_mm;
123 unsigned int cpu = smp_processor_id();
124
125 /* MMU, Caches, Vector Table, Interrupts etc */
126 setup_processor();
127
128 atomic_inc(&mm->mm_users);
129 atomic_inc(&mm->mm_count);
130 current->active_mm = mm;
131 cpumask_set_cpu(cpu, mm_cpumask(mm));
132
133 notify_cpu_starting(cpu);
134 set_cpu_online(cpu, true);
135
136 pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
137
138 if (machine_desc->init_smp)
139 machine_desc->init_smp(smp_processor_id());
140
141 arc_local_timer_setup(cpu);
142
143 local_irq_enable();
144 preempt_disable();
145 cpu_startup_entry(CPUHP_ONLINE);
146}
147
148/*
149 * Called from kernel_init( ) -> smp_init( ) - for each CPU
150 *
151 * At this point, Secondary Processor is "HALT"ed:
152 * -It booted, but was halted in head.S
153 * -It was configured to halt-on-reset
154 * So need to wake it up.
155 *
156 * Essential requirements being where to run from (PC) and stack (SP)
157*/
158int __cpu_up(unsigned int cpu, struct task_struct *idle)
159{
160 unsigned long wait_till;
161
162 secondary_idle_tsk = idle;
163
164 pr_info("Idle Task [%d] %p", cpu, idle);
165 pr_info("Trying to bring up CPU%u ...\n", cpu);
166
167 if (plat_smp_ops.cpu_kick)
168 plat_smp_ops.cpu_kick(cpu,
169 (unsigned long)first_lines_of_secondary);
170
171 /* wait for 1 sec after kicking the secondary */
172 wait_till = jiffies + HZ;
173 while (time_before(jiffies, wait_till)) {
174 if (cpu_online(cpu))
175 break;
176 }
177
178 if (!cpu_online(cpu)) {
179 pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu);
180 return -1;
181 }
182
183 secondary_idle_tsk = NULL;
184
185 return 0;
186}
187
188/*
189 * not supported here
190 */
191int __init setup_profiling_timer(unsigned int multiplier)
192{
193 return -EINVAL;
194}
195
196/*****************************************************************************/
197/* Inter Processor Interrupt Handling */
198/*****************************************************************************/
199
200enum ipi_msg_type {
201 IPI_EMPTY = 0,
202 IPI_RESCHEDULE = 1,
203 IPI_CALL_FUNC,
204 IPI_CPU_STOP,
205};
206
207/*
208 * In arches with IRQ for each msg type (above), receiver can use IRQ-id to
209 * figure out what msg was sent. For those which don't (ARC has dedicated IPI
210 * IRQ), the msg-type needs to be conveyed via per-cpu data
211 */
212
213static DEFINE_PER_CPU(unsigned long, ipi_data);
214
215static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
216{
217 unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
218 unsigned long old, new;
219 unsigned long flags;
220
221 pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
222
223 local_irq_save(flags);
224
225 /*
226 * Atomically write new msg bit (in case others are writing too),
227 * and read back old value
228 */
229 do {
230 new = old = *ipi_data_ptr;
231 new |= 1U << msg;
232 } while (cmpxchg(ipi_data_ptr, old, new) != old);
233
234 /*
235 * Call the platform specific IPI kick function, but avoid if possible:
236 * Only do so if there's no pending msg from other concurrent sender(s).
237 * Otherwise, recevier will see this msg as well when it takes the
238 * IPI corresponding to that msg. This is true, even if it is already in
239 * IPI handler, because !@old means it has not yet dequeued the msg(s)
240 * so @new msg can be a free-loader
241 */
242 if (plat_smp_ops.ipi_send && !old)
243 plat_smp_ops.ipi_send(cpu);
244
245 local_irq_restore(flags);
246}
247
248static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
249{
250 unsigned int cpu;
251
252 for_each_cpu(cpu, callmap)
253 ipi_send_msg_one(cpu, msg);
254}
255
256void smp_send_reschedule(int cpu)
257{
258 ipi_send_msg_one(cpu, IPI_RESCHEDULE);
259}
260
261void smp_send_stop(void)
262{
263 struct cpumask targets;
264 cpumask_copy(&targets, cpu_online_mask);
265 cpumask_clear_cpu(smp_processor_id(), &targets);
266 ipi_send_msg(&targets, IPI_CPU_STOP);
267}
268
269void arch_send_call_function_single_ipi(int cpu)
270{
271 ipi_send_msg_one(cpu, IPI_CALL_FUNC);
272}
273
274void arch_send_call_function_ipi_mask(const struct cpumask *mask)
275{
276 ipi_send_msg(mask, IPI_CALL_FUNC);
277}
278
279/*
280 * ipi_cpu_stop - handle IPI from smp_send_stop()
281 */
282static void ipi_cpu_stop(void)
283{
284 machine_halt();
285}
286
287static inline void __do_IPI(unsigned long msg)
288{
289 switch (msg) {
290 case IPI_RESCHEDULE:
291 scheduler_ipi();
292 break;
293
294 case IPI_CALL_FUNC:
295 generic_smp_call_function_interrupt();
296 break;
297
298 case IPI_CPU_STOP:
299 ipi_cpu_stop();
300 break;
301
302 default:
303 pr_warn("IPI with unexpected msg %ld\n", msg);
304 }
305}
306
307/*
308 * arch-common ISR to handle for inter-processor interrupts
309 * Has hooks for platform specific IPI
310 */
311irqreturn_t do_IPI(int irq, void *dev_id)
312{
313 unsigned long pending;
314
315 pr_debug("IPI [%ld] received on cpu %d\n",
316 *this_cpu_ptr(&ipi_data), smp_processor_id());
317
318 if (plat_smp_ops.ipi_clear)
319 plat_smp_ops.ipi_clear(irq);
320
321 /*
322 * "dequeue" the msg corresponding to this IPI (and possibly other
323 * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
324 */
325 pending = xchg(this_cpu_ptr(&ipi_data), 0);
326
327 do {
328 unsigned long msg = __ffs(pending);
329 __do_IPI(msg);
330 pending &= ~(1U << msg);
331 } while (pending);
332
333 return IRQ_HANDLED;
334}
335
336/*
337 * API called by platform code to hookup arch-common ISR to their IPI IRQ
338 */
339static DEFINE_PER_CPU(int, ipi_dev);
340int smp_ipi_irq_setup(int cpu, int irq)
341{
342 int *dev_id = &per_cpu(ipi_dev, smp_processor_id());
343 return request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev_id);
344}