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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 | // SPDX-License-Identifier: GPL-2.0 // // mt6797-afe-clk.c -- Mediatek 6797 afe clock ctrl // // Copyright (c) 2018 MediaTek Inc. // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com> #include <linux/clk.h> #include "mt6797-afe-common.h" #include "mt6797-afe-clk.h" enum { CLK_INFRA_SYS_AUD, CLK_INFRA_SYS_AUD_26M, CLK_TOP_MUX_AUD, CLK_TOP_MUX_AUD_BUS, CLK_TOP_SYSPLL3_D4, CLK_TOP_SYSPLL1_D4, CLK_CLK26M, CLK_NUM }; static const char *aud_clks[CLK_NUM] = { [CLK_INFRA_SYS_AUD] = "infra_sys_audio_clk", [CLK_INFRA_SYS_AUD_26M] = "infra_sys_audio_26m", [CLK_TOP_MUX_AUD] = "top_mux_audio", [CLK_TOP_MUX_AUD_BUS] = "top_mux_aud_intbus", [CLK_TOP_SYSPLL3_D4] = "top_sys_pll3_d4", [CLK_TOP_SYSPLL1_D4] = "top_sys_pll1_d4", [CLK_CLK26M] = "top_clk26m_clk", }; int mt6797_init_clock(struct mtk_base_afe *afe) { struct mt6797_afe_private *afe_priv = afe->platform_priv; int i; afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), GFP_KERNEL); if (!afe_priv->clk) return -ENOMEM; for (i = 0; i < CLK_NUM; i++) { afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); if (IS_ERR(afe_priv->clk[i])) { dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n", __func__, aud_clks[i], PTR_ERR(afe_priv->clk[i])); return PTR_ERR(afe_priv->clk[i]); } } return 0; } int mt6797_afe_enable_clock(struct mtk_base_afe *afe) { struct mt6797_afe_private *afe_priv = afe->platform_priv; int ret; ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD]); if (ret) { dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", __func__, aud_clks[CLK_INFRA_SYS_AUD], ret); goto CLK_INFRA_SYS_AUDIO_ERR; } ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]); if (ret) { dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", __func__, aud_clks[CLK_INFRA_SYS_AUD_26M], ret); goto CLK_INFRA_SYS_AUD_26M_ERR; } ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD]); if (ret) { dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", __func__, aud_clks[CLK_TOP_MUX_AUD], ret); goto CLK_MUX_AUDIO_ERR; } ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD], afe_priv->clk[CLK_CLK26M]); if (ret) { dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n", __func__, aud_clks[CLK_TOP_MUX_AUD], aud_clks[CLK_CLK26M], ret); goto CLK_MUX_AUDIO_ERR; } ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]); if (ret) { dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", __func__, aud_clks[CLK_TOP_MUX_AUD_BUS], ret); goto CLK_MUX_AUDIO_INTBUS_ERR; } return ret; CLK_MUX_AUDIO_INTBUS_ERR: clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]); CLK_MUX_AUDIO_ERR: clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]); CLK_INFRA_SYS_AUD_26M_ERR: clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]); CLK_INFRA_SYS_AUDIO_ERR: clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]); return 0; } int mt6797_afe_disable_clock(struct mtk_base_afe *afe) { struct mt6797_afe_private *afe_priv = afe->platform_priv; clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]); clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]); clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]); clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]); return 0; } |