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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 | // SPDX-License-Identifier: GPL-2.0-only // // Copyright(c) 2020 Intel Corporation. All rights reserved. // // Author: Cezary Rojewski <cezary.rojewski@intel.com> // #include <linux/dma-mapping.h> #include <linux/firmware.h> #include <linux/slab.h> #include "core.h" #include "registers.h" /* FW load (200ms) plus operational delays */ #define FW_READY_TIMEOUT_MS 250 #define FW_SIGNATURE "$SST" #define FW_SIGNATURE_SIZE 4 struct catpt_fw_hdr { char signature[FW_SIGNATURE_SIZE]; u32 file_size; u32 modules; u32 file_format; u32 reserved[4]; } __packed; struct catpt_fw_mod_hdr { char signature[FW_SIGNATURE_SIZE]; u32 mod_size; u32 blocks; u16 slot; u16 module_id; u32 entry_point; u32 persistent_size; u32 scratch_size; } __packed; enum catpt_ram_type { CATPT_RAM_TYPE_IRAM = 1, CATPT_RAM_TYPE_DRAM = 2, /* DRAM with module's initial state */ CATPT_RAM_TYPE_INSTANCE = 3, }; struct catpt_fw_block_hdr { u32 ram_type; u32 size; u32 ram_offset; u32 rsvd; } __packed; void catpt_sram_init(struct resource *sram, u32 start, u32 size) { sram->start = start; sram->end = start + size - 1; } void catpt_sram_free(struct resource *sram) { struct resource *res, *save; for (res = sram->child; res;) { save = res->sibling; release_resource(res); kfree(res); res = save; } } struct resource * catpt_request_region(struct resource *root, resource_size_t size) { struct resource *res = root->child; resource_size_t addr = root->start; for (;;) { if (res->start - addr >= size) break; addr = res->end + 1; res = res->sibling; if (!res) return NULL; } return __request_region(root, addr, size, NULL, 0); } int catpt_store_streams_context(struct catpt_dev *cdev, struct dma_chan *chan) { struct catpt_stream_runtime *stream; list_for_each_entry(stream, &cdev->stream_list, node) { u32 off, size; int ret; off = stream->persistent->start; size = resource_size(stream->persistent); dev_dbg(cdev->dev, "storing stream %d ctx: off 0x%08x size %d\n", stream->info.stream_hw_id, off, size); ret = catpt_dma_memcpy_fromdsp(cdev, chan, cdev->dxbuf_paddr + off, cdev->lpe_base + off, ALIGN(size, 4)); if (ret) { dev_err(cdev->dev, "memcpy fromdsp failed: %d\n", ret); return ret; } } return 0; } int catpt_store_module_states(struct catpt_dev *cdev, struct dma_chan *chan) { int i; for (i = 0; i < ARRAY_SIZE(cdev->modules); i++) { struct catpt_module_type *type; u32 off; int ret; type = &cdev->modules[i]; if (!type->loaded || !type->state_size) continue; off = type->state_offset; dev_dbg(cdev->dev, "storing mod %d state: off 0x%08x size %d\n", i, off, type->state_size); ret = catpt_dma_memcpy_fromdsp(cdev, chan, cdev->dxbuf_paddr + off, cdev->lpe_base + off, ALIGN(type->state_size, 4)); if (ret) { dev_err(cdev->dev, "memcpy fromdsp failed: %d\n", ret); return ret; } } return 0; } int catpt_store_memdumps(struct catpt_dev *cdev, struct dma_chan *chan) { int i; for (i = 0; i < cdev->dx_ctx.num_meminfo; i++) { struct catpt_save_meminfo *info; u32 off; int ret; info = &cdev->dx_ctx.meminfo[i]; if (info->source != CATPT_DX_TYPE_MEMORY_DUMP) continue; off = catpt_to_host_offset(info->offset); if (off < cdev->dram.start || off > cdev->dram.end) continue; dev_dbg(cdev->dev, "storing memdump: off 0x%08x size %d\n", off, info->size); ret = catpt_dma_memcpy_fromdsp(cdev, chan, cdev->dxbuf_paddr + off, cdev->lpe_base + off, ALIGN(info->size, 4)); if (ret) { dev_err(cdev->dev, "memcpy fromdsp failed: %d\n", ret); return ret; } } return 0; } static int catpt_restore_streams_context(struct catpt_dev *cdev, struct dma_chan *chan) { struct catpt_stream_runtime *stream; list_for_each_entry(stream, &cdev->stream_list, node) { u32 off, size; int ret; off = stream->persistent->start; size = resource_size(stream->persistent); dev_dbg(cdev->dev, "restoring stream %d ctx: off 0x%08x size %d\n", stream->info.stream_hw_id, off, size); ret = catpt_dma_memcpy_todsp(cdev, chan, cdev->lpe_base + off, cdev->dxbuf_paddr + off, ALIGN(size, 4)); if (ret) { dev_err(cdev->dev, "memcpy fromdsp failed: %d\n", ret); return ret; } } return 0; } static int catpt_restore_memdumps(struct catpt_dev *cdev, struct dma_chan *chan) { int i; for (i = 0; i < cdev->dx_ctx.num_meminfo; i++) { struct catpt_save_meminfo *info; u32 off; int ret; info = &cdev->dx_ctx.meminfo[i]; if (info->source != CATPT_DX_TYPE_MEMORY_DUMP) continue; off = catpt_to_host_offset(info->offset); if (off < cdev->dram.start || off > cdev->dram.end) continue; dev_dbg(cdev->dev, "restoring memdump: off 0x%08x size %d\n", off, info->size); ret = catpt_dma_memcpy_todsp(cdev, chan, cdev->lpe_base + off, cdev->dxbuf_paddr + off, ALIGN(info->size, 4)); if (ret) { dev_err(cdev->dev, "restore block failed: %d\n", ret); return ret; } } return 0; } static int catpt_restore_fwimage(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_block_hdr *blk) { struct resource r1, r2, common; int i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, blk, sizeof(*blk), false); r1.start = cdev->dram.start + blk->ram_offset; r1.end = r1.start + blk->size - 1; /* advance to data area */ paddr += sizeof(*blk); for (i = 0; i < cdev->dx_ctx.num_meminfo; i++) { struct catpt_save_meminfo *info; u32 off; int ret; info = &cdev->dx_ctx.meminfo[i]; if (info->source != CATPT_DX_TYPE_FW_IMAGE) continue; off = catpt_to_host_offset(info->offset); if (off < cdev->dram.start || off > cdev->dram.end) continue; r2.start = off; r2.end = r2.start + info->size - 1; if (!resource_intersection(&r2, &r1, &common)) continue; /* calculate start offset of common data area */ off = common.start - r1.start; dev_dbg(cdev->dev, "restoring fwimage: %pr\n", &common); ret = catpt_dma_memcpy_todsp(cdev, chan, common.start, paddr + off, resource_size(&common)); if (ret) { dev_err(cdev->dev, "memcpy todsp failed: %d\n", ret); return ret; } } return 0; } static int catpt_load_block(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_block_hdr *blk, bool alloc) { struct resource *sram, *res; dma_addr_t dst_addr; int ret; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, blk, sizeof(*blk), false); switch (blk->ram_type) { case CATPT_RAM_TYPE_IRAM: sram = &cdev->iram; break; default: sram = &cdev->dram; break; } dst_addr = sram->start + blk->ram_offset; if (alloc) { res = __request_region(sram, dst_addr, blk->size, NULL, 0); if (!res) return -EBUSY; } /* advance to data area */ paddr += sizeof(*blk); ret = catpt_dma_memcpy_todsp(cdev, chan, dst_addr, paddr, blk->size); if (ret) { dev_err(cdev->dev, "memcpy error: %d\n", ret); __release_region(sram, dst_addr, blk->size); } return ret; } static int catpt_restore_basefw(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_mod_hdr *basefw) { u32 offset = sizeof(*basefw); int ret, i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, basefw, sizeof(*basefw), false); /* restore basefw image */ for (i = 0; i < basefw->blocks; i++) { struct catpt_fw_block_hdr *blk; blk = (struct catpt_fw_block_hdr *)((u8 *)basefw + offset); switch (blk->ram_type) { case CATPT_RAM_TYPE_IRAM: ret = catpt_load_block(cdev, chan, paddr + offset, blk, false); break; default: ret = catpt_restore_fwimage(cdev, chan, paddr + offset, blk); break; } if (ret) { dev_err(cdev->dev, "restore block failed: %d\n", ret); return ret; } offset += sizeof(*blk) + blk->size; } /* then proceed with memory dumps */ ret = catpt_restore_memdumps(cdev, chan); if (ret) dev_err(cdev->dev, "restore memdumps failed: %d\n", ret); return ret; } static int catpt_restore_module(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_mod_hdr *mod) { u32 offset = sizeof(*mod); int i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, mod, sizeof(*mod), false); for (i = 0; i < mod->blocks; i++) { struct catpt_fw_block_hdr *blk; int ret; blk = (struct catpt_fw_block_hdr *)((u8 *)mod + offset); switch (blk->ram_type) { case CATPT_RAM_TYPE_INSTANCE: /* restore module state */ ret = catpt_dma_memcpy_todsp(cdev, chan, cdev->lpe_base + blk->ram_offset, cdev->dxbuf_paddr + blk->ram_offset, ALIGN(blk->size, 4)); break; default: ret = catpt_load_block(cdev, chan, paddr + offset, blk, false); break; } if (ret) { dev_err(cdev->dev, "restore block failed: %d\n", ret); return ret; } offset += sizeof(*blk) + blk->size; } return 0; } static int catpt_load_module(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_mod_hdr *mod) { struct catpt_module_type *type; u32 offset = sizeof(*mod); int i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, mod, sizeof(*mod), false); type = &cdev->modules[mod->module_id]; for (i = 0; i < mod->blocks; i++) { struct catpt_fw_block_hdr *blk; int ret; blk = (struct catpt_fw_block_hdr *)((u8 *)mod + offset); ret = catpt_load_block(cdev, chan, paddr + offset, blk, true); if (ret) { dev_err(cdev->dev, "load block failed: %d\n", ret); return ret; } /* * Save state window coordinates - these will be * used to capture module state on D0 exit. */ if (blk->ram_type == CATPT_RAM_TYPE_INSTANCE) { type->state_offset = blk->ram_offset; type->state_size = blk->size; } offset += sizeof(*blk) + blk->size; } /* init module type static info */ type->loaded = true; /* DSP expects address from module header substracted by 4 */ type->entry_point = mod->entry_point - 4; type->persistent_size = mod->persistent_size; type->scratch_size = mod->scratch_size; return 0; } static int catpt_restore_firmware(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_hdr *fw) { u32 offset = sizeof(*fw); int i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, fw, sizeof(*fw), false); for (i = 0; i < fw->modules; i++) { struct catpt_fw_mod_hdr *mod; int ret; mod = (struct catpt_fw_mod_hdr *)((u8 *)fw + offset); if (strncmp(fw->signature, mod->signature, FW_SIGNATURE_SIZE)) { dev_err(cdev->dev, "module signature mismatch\n"); return -EINVAL; } if (mod->module_id > CATPT_MODID_LAST) return -EINVAL; switch (mod->module_id) { case CATPT_MODID_BASE_FW: ret = catpt_restore_basefw(cdev, chan, paddr + offset, mod); break; default: ret = catpt_restore_module(cdev, chan, paddr + offset, mod); break; } if (ret) { dev_err(cdev->dev, "restore module failed: %d\n", ret); return ret; } offset += sizeof(*mod) + mod->mod_size; } return 0; } static int catpt_load_firmware(struct catpt_dev *cdev, struct dma_chan *chan, dma_addr_t paddr, struct catpt_fw_hdr *fw) { u32 offset = sizeof(*fw); int i; print_hex_dump_debug(__func__, DUMP_PREFIX_OFFSET, 8, 4, fw, sizeof(*fw), false); for (i = 0; i < fw->modules; i++) { struct catpt_fw_mod_hdr *mod; int ret; mod = (struct catpt_fw_mod_hdr *)((u8 *)fw + offset); if (strncmp(fw->signature, mod->signature, FW_SIGNATURE_SIZE)) { dev_err(cdev->dev, "module signature mismatch\n"); return -EINVAL; } if (mod->module_id > CATPT_MODID_LAST) return -EINVAL; ret = catpt_load_module(cdev, chan, paddr + offset, mod); if (ret) { dev_err(cdev->dev, "load module failed: %d\n", ret); return ret; } offset += sizeof(*mod) + mod->mod_size; } return 0; } static int catpt_load_image(struct catpt_dev *cdev, struct dma_chan *chan, const char *name, const char *signature, bool restore) { struct catpt_fw_hdr *fw; struct firmware *img; dma_addr_t paddr; void *vaddr; int ret; ret = request_firmware((const struct firmware **)&img, name, cdev->dev); if (ret) return ret; fw = (struct catpt_fw_hdr *)img->data; if (strncmp(fw->signature, signature, FW_SIGNATURE_SIZE)) { dev_err(cdev->dev, "firmware signature mismatch\n"); ret = -EINVAL; goto release_fw; } vaddr = dma_alloc_coherent(cdev->dev, img->size, &paddr, GFP_KERNEL); if (!vaddr) { ret = -ENOMEM; goto release_fw; } memcpy(vaddr, img->data, img->size); fw = (struct catpt_fw_hdr *)vaddr; if (restore) ret = catpt_restore_firmware(cdev, chan, paddr, fw); else ret = catpt_load_firmware(cdev, chan, paddr, fw); dma_free_coherent(cdev->dev, img->size, vaddr, paddr); release_fw: release_firmware(img); return ret; } static int catpt_load_images(struct catpt_dev *cdev, bool restore) { static const char *const names[] = { "intel/IntcSST1.bin", "intel/IntcSST2.bin", }; struct dma_chan *chan; int ret; chan = catpt_dma_request_config_chan(cdev); if (IS_ERR(chan)) return PTR_ERR(chan); ret = catpt_load_image(cdev, chan, names[cdev->spec->core_id - 1], FW_SIGNATURE, restore); if (ret) goto release_dma_chan; if (!restore) goto release_dma_chan; ret = catpt_restore_streams_context(cdev, chan); if (ret) dev_err(cdev->dev, "restore streams ctx failed: %d\n", ret); release_dma_chan: dma_release_channel(chan); return ret; } int catpt_boot_firmware(struct catpt_dev *cdev, bool restore) { int ret; catpt_dsp_stall(cdev, true); ret = catpt_load_images(cdev, restore); if (ret) { dev_err(cdev->dev, "load binaries failed: %d\n", ret); return ret; } reinit_completion(&cdev->fw_ready); catpt_dsp_stall(cdev, false); ret = wait_for_completion_timeout(&cdev->fw_ready, msecs_to_jiffies(FW_READY_TIMEOUT_MS)); if (!ret) { dev_err(cdev->dev, "firmware ready timeout\n"); return -ETIMEDOUT; } /* update sram pg & clock once done booting */ catpt_dsp_update_srampge(cdev, &cdev->dram, cdev->spec->dram_mask); catpt_dsp_update_srampge(cdev, &cdev->iram, cdev->spec->iram_mask); return catpt_dsp_update_lpclock(cdev); } int catpt_first_boot_firmware(struct catpt_dev *cdev) { struct resource *res; int ret; ret = catpt_boot_firmware(cdev, false); if (ret) { dev_err(cdev->dev, "basefw boot failed: %d\n", ret); return ret; } /* restrict FW Core dump area */ __request_region(&cdev->dram, 0, 0x200, NULL, 0); /* restrict entire area following BASE_FW - highest offset in DRAM */ for (res = cdev->dram.child; res->sibling; res = res->sibling) ; __request_region(&cdev->dram, res->end + 1, cdev->dram.end - res->end, NULL, 0); ret = catpt_ipc_get_mixer_stream_info(cdev, &cdev->mixer); if (ret) return CATPT_IPC_ERROR(ret); ret = catpt_arm_stream_templates(cdev); if (ret) { dev_err(cdev->dev, "arm templates failed: %d\n", ret); return ret; } /* update dram pg for scratch and restricted regions */ catpt_dsp_update_srampge(cdev, &cdev->dram, cdev->spec->dram_mask); return 0; } |