1/* SPDX-License-Identifier: GPL-2.0+ */
  2/* Copyright (c) 2023 Hisilicon Limited. */
  3
  4#ifndef __KUNPENG_HCCS_H__
  5#define __KUNPENG_HCCS_H__
  6
  7/*
  8 * |---------------  Chip0  ---------------|----------------  ChipN  -------------|
  9 * |--------Die0-------|--------DieN-------|--------Die0-------|-------DieN-------|
 10 * | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 |P0 | P1 | P2 | P3 |
 11 */
 12
 13/*
 14 * This value cannot be 255, otherwise the loop of the multi-BD communication
 15 * case cannot end.
 16 */
 17#define HCCS_DIE_MAX_PORT_ID	254
 18
 19struct hccs_port_info {
 20	u8 port_id;
 21	u8 port_type;
 22	u8 lane_mode;
 23	bool enable; /* if the port is enabled */
 24	struct kobject kobj;
 25	bool dir_created;
 26	struct hccs_die_info *die; /* point to the die the port is located */
 27};
 28
 29struct hccs_die_info {
 30	u8 die_id;
 31	u8 port_num;
 32	u8 min_port_id;
 33	u8 max_port_id;
 34	struct hccs_port_info *ports;
 35	struct kobject kobj;
 36	bool dir_created;
 37	struct hccs_chip_info *chip; /* point to the chip the die is located */
 38};
 39
 40struct hccs_chip_info {
 41	u8 chip_id;
 42	u8 die_num;
 43	struct hccs_die_info *dies;
 44	struct kobject kobj;
 45	struct hccs_dev *hdev;
 46};
 47
 48struct hccs_mbox_client_info {
 49	struct mbox_client client;
 50	struct mbox_chan *mbox_chan;
 51	struct pcc_mbox_chan *pcc_chan;
 52	u64 deadline_us;
 53	void __iomem *pcc_comm_addr;
 54	struct completion done;
 55};
 56
 57struct hccs_desc;
 58
 59struct hccs_verspecific_data {
 60	void (*rx_callback)(struct mbox_client *cl, void *mssg);
 61	int (*wait_cmd_complete)(struct hccs_dev *hdev);
 62	void (*fill_pcc_shared_mem)(struct hccs_dev *hdev,
 63				    u8 cmd, struct hccs_desc *desc,
 64				    void __iomem *comm_space,
 65				    u16 space_size);
 66	u16 shared_mem_size;
 67	bool has_txdone_irq;
 68};
 69
 70struct hccs_dev {
 71	struct device *dev;
 72	struct acpi_device *acpi_dev;
 73	const struct hccs_verspecific_data *verspec_data;
 74	u64 caps;
 75	u8 chip_num;
 76	struct hccs_chip_info *chips;
 77	u8 chan_id;
 78	struct mutex lock;
 79	struct hccs_mbox_client_info cl_info;
 80};
 81
 82#define HCCS_SERDES_MODULE_CODE 0x32
 83enum hccs_subcmd_type {
 84	HCCS_GET_CHIP_NUM = 0x1,
 85	HCCS_GET_DIE_NUM,
 86	HCCS_GET_DIE_INFO,
 87	HCCS_GET_DIE_PORT_INFO,
 88	HCCS_GET_DEV_CAP,
 89	HCCS_GET_PORT_LINK_STATUS,
 90	HCCS_GET_PORT_CRC_ERR_CNT,
 91	HCCS_GET_DIE_PORTS_LANE_STA,
 92	HCCS_GET_DIE_PORTS_LINK_STA,
 93	HCCS_GET_DIE_PORTS_CRC_ERR_CNT,
 94	HCCS_SUB_CMD_MAX = 255,
 95};
 96
 97struct hccs_die_num_req_param {
 98	u8 chip_id;
 99};
100
101struct hccs_die_info_req_param {
102	u8 chip_id;
103	u8 die_idx;
104};
105
106struct hccs_die_info_rsp_data {
107	u8 die_id;
108	u8 port_num;
109	u8 min_port_id;
110	u8 max_port_id;
111};
112
113struct hccs_port_attr {
114	u8 port_id;
115	u8 port_type;
116	u8 lane_mode;
117	u8 enable : 1; /* if the port is enabled */
118	u16 rsv[2];
119};
120
121/*
122 * The common command request for getting the information of all HCCS port on
123 * specified DIE.
124 */
125struct hccs_die_comm_req_param {
126	u8 chip_id;
127	u8 die_id; /* id in hardware */
128};
129
130/* The common command request for getting the information of a specific port */
131struct hccs_port_comm_req_param {
132	u8 chip_id;
133	u8 die_id;
134	u8 port_id;
135};
136
137#define HCCS_PORT_RESET         1
138#define HCCS_PORT_SETUP         2
139#define HCCS_PORT_CONFIG        3
140#define HCCS_PORT_READY         4
141struct hccs_link_status {
142	u8 lane_mask; /* indicate which lanes are used. */
143	u8 link_fsm : 3; /* link fsm, 1: reset 2: setup 3: config 4: link-up */
144	u8 lane_num : 5; /* current lane number */
145};
146
147struct hccs_req_head {
148	u8 module_code; /* set to 0x32 for serdes */
149	u8 start_id;
150	u8 rsv[2];
151};
152
153struct hccs_rsp_head {
154	u8 data_len;
155	u8 next_id;
156	u8 rsv[2];
157};
158
159struct hccs_fw_inner_head {
160	u8 retStatus; /* 0: success, other: failure */
161	u8 rsv[7];
162};
163
164#define HCCS_PCC_SHARE_MEM_BYTES	64
165#define HCCS_FW_INNER_HEAD_BYTES	8
166#define HCCS_RSP_HEAD_BYTES		4
167
168#define HCCS_MAX_RSP_DATA_BYTES		(HCCS_PCC_SHARE_MEM_BYTES - \
169					 HCCS_FW_INNER_HEAD_BYTES - \
170					 HCCS_RSP_HEAD_BYTES)
171#define HCCS_MAX_RSP_DATA_SIZE_MAX	(HCCS_MAX_RSP_DATA_BYTES / 4)
172
173/*
174 * Note: Actual available size of data field also depands on the PCC header
175 * bytes of the specific type. Driver needs to copy the response data in the
176 * communication space based on the real length.
177 */
178struct hccs_rsp_desc {
179	struct hccs_fw_inner_head fw_inner_head; /* 8 Bytes */
180	struct hccs_rsp_head rsp_head; /* 4 Bytes */
181	u32 data[HCCS_MAX_RSP_DATA_SIZE_MAX];
182};
183
184#define HCCS_REQ_HEAD_BYTES		4
185#define HCCS_MAX_REQ_DATA_BYTES		(HCCS_PCC_SHARE_MEM_BYTES - \
186					 HCCS_REQ_HEAD_BYTES)
187#define HCCS_MAX_REQ_DATA_SIZE_MAX	(HCCS_MAX_REQ_DATA_BYTES / 4)
188
189/*
190 * Note: Actual available size of data field also depands on the PCC header
191 * bytes of the specific type. Driver needs to copy the request data to the
192 * communication space based on the real length.
193 */
194struct hccs_req_desc {
195	struct hccs_req_head req_head; /* 4 Bytes */
196	u32 data[HCCS_MAX_REQ_DATA_SIZE_MAX];
197};
198
199struct hccs_desc {
200	union {
201		struct hccs_req_desc req;
202		struct hccs_rsp_desc rsp;
203	};
204};
205
206#endif /* __KUNPENG_HCCS_H__ */