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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2016 IBM Corp. */ #include <linux/mfd/syscon.h> #include <linux/platform_device.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/string.h> #include "../core.h" #include "pinctrl-aspeed.h" int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); return pdata->pinmux.ngroups; } const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev, unsigned int group) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); return pdata->pinmux.groups[group].name; } int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, const unsigned int **pins, unsigned int *npins) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); *pins = &pdata->pinmux.groups[group].pins[0]; *npins = pdata->pinmux.groups[group].npins; return 0; } void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int offset) { seq_printf(s, " %s", dev_name(pctldev->dev)); } int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); return pdata->pinmux.nfunctions; } const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev, unsigned int function) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); return pdata->pinmux.functions[function].name; } int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev, unsigned int function, const char * const **groups, unsigned int * const num_groups) { struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); *groups = pdata->pinmux.functions[function].groups; *num_groups = pdata->pinmux.functions[function].ngroups; return 0; } static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx, const struct aspeed_sig_expr *expr) { int ret; pr_debug("Enabling signal %s for %s\n", expr->signal, expr->function); ret = aspeed_sig_expr_eval(ctx, expr, true); if (ret < 0) return ret; if (!ret) return aspeed_sig_expr_set(ctx, expr, true); return 0; } static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx, const struct aspeed_sig_expr *expr) { int ret; pr_debug("Disabling signal %s for %s\n", expr->signal, expr->function); ret = aspeed_sig_expr_eval(ctx, expr, true); if (ret < 0) return ret; if (ret) return aspeed_sig_expr_set(ctx, expr, false); return 0; } /** * aspeed_disable_sig() - Disable a signal on a pin by disabling all provided * signal expressions. * * @ctx: The pinmux context * @exprs: The list of signal expressions (from a priority level on a pin) * * Return: 0 if all expressions are disabled, otherwise a negative error code */ static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx, const struct aspeed_sig_expr **exprs) { int ret = 0; if (!exprs) return -EINVAL; while (*exprs && !ret) { ret = aspeed_sig_expr_disable(ctx, *exprs); exprs++; } return ret; } /** * aspeed_find_expr_by_name - Search for the signal expression needed to * enable the pin's signal for the requested function. * * @exprs: List of signal expressions (haystack) * @name: The name of the requested function (needle) * * Return: A pointer to the signal expression whose function tag matches the * provided name, otherwise NULL. * */ static const struct aspeed_sig_expr *aspeed_find_expr_by_name( const struct aspeed_sig_expr **exprs, const char *name) { while (*exprs) { if (strcmp((*exprs)->function, name) == 0) return *exprs; exprs++; } return NULL; } static char *get_defined_attribute(const struct aspeed_pin_desc *pdesc, const char *(*get)( const struct aspeed_sig_expr *)) { char *found = NULL; size_t len = 0; const struct aspeed_sig_expr ***prios, **funcs, *expr; prios = pdesc->prios; while ((funcs = *prios)) { while ((expr = *funcs)) { const char *str = get(expr); size_t delta = strlen(str) + 2; char *expanded; expanded = krealloc(found, len + delta + 1, GFP_KERNEL); if (!expanded) { kfree(found); return expanded; } found = expanded; found[len] = '\0'; len += delta; strcat(found, str); strcat(found, ", "); funcs++; } prios++; } if (len < 2) { kfree(found); return NULL; } found[len - 2] = '\0'; return found; } static const char *aspeed_sig_expr_function(const struct aspeed_sig_expr *expr) { return expr->function; } static char *get_defined_functions(const struct aspeed_pin_desc *pdesc) { return get_defined_attribute(pdesc, aspeed_sig_expr_function); } static const char *aspeed_sig_expr_signal(const struct aspeed_sig_expr *expr) { return expr->signal; } static char *get_defined_signals(const struct aspeed_pin_desc *pdesc) { return get_defined_attribute(pdesc, aspeed_sig_expr_signal); } int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function, unsigned int group) { int i; int ret; struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group]; const struct aspeed_pin_function *pfunc = &pdata->pinmux.functions[function]; for (i = 0; i < pgroup->npins; i++) { int pin = pgroup->pins[i]; const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data; const struct aspeed_sig_expr *expr = NULL; const struct aspeed_sig_expr **funcs; const struct aspeed_sig_expr ***prios; if (!pdesc) return -EINVAL; pr_debug("Muxing pin %s for %s\n", pdesc->name, pfunc->name); prios = pdesc->prios; if (!prios) continue; /* Disable functions at a higher priority than that requested */ while ((funcs = *prios)) { expr = aspeed_find_expr_by_name(funcs, pfunc->name); if (expr) break; ret = aspeed_disable_sig(&pdata->pinmux, funcs); if (ret) return ret; prios++; } if (!expr) { char *functions = get_defined_functions(pdesc); char *signals = get_defined_signals(pdesc); pr_warn("No function %s found on pin %s (%d). Found signal(s) %s for function(s) %s\n", pfunc->name, pdesc->name, pin, signals, functions); kfree(signals); kfree(functions); return -ENXIO; } ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); if (ret) return ret; pr_debug("Muxed pin %s as %s for %s\n", pdesc->name, expr->signal, expr->function); } return 0; } static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr) { /* * We need to differentiate between GPIO and non-GPIO signals to * implement the gpio_request_enable() interface. For better or worse * the ASPEED pinctrl driver uses the expression names to determine * whether an expression will mux a pin for GPIO. * * Generally we have the following - A GPIO such as B1 has: * * - expr->signal set to "GPIOB1" * - expr->function set to "GPIOB1" * * Using this fact we can determine whether the provided expression is * a GPIO expression by testing the signal name for the string prefix * "GPIO". * * However, some GPIOs are input-only, and the ASPEED datasheets name * them differently. An input-only GPIO such as T0 has: * * - expr->signal set to "GPIT0" * - expr->function set to "GPIT0" * * It's tempting to generalise the prefix test from "GPIO" to "GPI" to * account for both GPIOs and GPIs, but in doing so we run aground on * another feature: * * Some pins in the ASPEED BMC SoCs have a "pass-through" GPIO * function where the input state of one pin is replicated as the * output state of another (as if they were shorted together - a mux * configuration that is typically enabled by hardware strapping). * This feature allows the BMC to pass e.g. power button state through * to the host while the BMC is yet to boot, but take control of the * button state once the BMC has booted by muxing each pin as a * separate, pin-specific GPIO. * * Conceptually this pass-through mode is a form of GPIO and is named * as such in the datasheets, e.g. "GPID0". This naming similarity * trips us up with the simple GPI-prefixed-signal-name scheme * discussed above, as the pass-through configuration is not what we * want when muxing a pin as GPIO for the GPIO subsystem. * * On e.g. the AST2400, a pass-through function "GPID0" is grouped on * balls A18 and D16, where we have: * * For ball A18: * - expr->signal set to "GPID0IN" * - expr->function set to "GPID0" * * For ball D16: * - expr->signal set to "GPID0OUT" * - expr->function set to "GPID0" * * By contrast, the pin-specific GPIO expressions for the same pins are * as follows: * * For ball A18: * - expr->signal looks like "GPIOD0" * - expr->function looks like "GPIOD0" * * For ball D16: * - expr->signal looks like "GPIOD1" * - expr->function looks like "GPIOD1" * * Testing both the signal _and_ function names gives us the means * differentiate the pass-through GPIO pinmux configuration from the * pin-specific configuration that the GPIO subsystem is after: An * expression is a pin-specific (non-pass-through) GPIO configuration * if the signal prefix is "GPI" and the signal name matches the * function name. */ return !strncmp(expr->signal, "GPI", 3) && !strcmp(expr->signal, expr->function); } static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs) { if (!exprs) return false; while (*exprs) { if (aspeed_expr_is_gpio(*exprs)) return true; exprs++; } return false; } int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { int ret; struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data; const struct aspeed_sig_expr ***prios, **funcs, *expr; if (!pdesc) return -EINVAL; prios = pdesc->prios; if (!prios) return -ENXIO; pr_debug("Muxing pin %s for GPIO\n", pdesc->name); /* Disable any functions of higher priority than GPIO */ while ((funcs = *prios)) { if (aspeed_gpio_in_exprs(funcs)) break; ret = aspeed_disable_sig(&pdata->pinmux, funcs); if (ret) return ret; prios++; } if (!funcs) { char *signals = get_defined_signals(pdesc); pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n", pdesc->name, offset, signals); kfree(signals); return -ENXIO; } expr = *funcs; /* * Disabling all higher-priority expressions is enough to enable the * lowest-priority signal type. As such it has no associated * expression. */ if (!expr) { pr_debug("Muxed pin %s as GPIO\n", pdesc->name); return 0; } /* * If GPIO is not the lowest priority signal type, assume there is only * one expression defined to enable the GPIO function */ ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); if (ret) return ret; pr_debug("Muxed pin %s as %s\n", pdesc->name, expr->signal); return 0; } int aspeed_pinctrl_probe(struct platform_device *pdev, struct pinctrl_desc *pdesc, struct aspeed_pinctrl_data *pdata) { struct device *parent; struct pinctrl_dev *pctl; parent = pdev->dev.parent; if (!parent) { dev_err(&pdev->dev, "No parent for syscon pincontroller\n"); return -ENODEV; } pdata->scu = syscon_node_to_regmap(parent->of_node); if (IS_ERR(pdata->scu)) { dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n"); return PTR_ERR(pdata->scu); } pdata->pinmux.maps[ASPEED_IP_SCU] = pdata->scu; pctl = pinctrl_register(pdesc, &pdev->dev, pdata); if (IS_ERR(pctl)) { dev_err(&pdev->dev, "Failed to register pinctrl\n"); return PTR_ERR(pctl); } platform_set_drvdata(pdev, pdata); return 0; } static inline bool pin_in_config_range(unsigned int offset, const struct aspeed_pin_config *config) { return offset >= config->pins[0] && offset <= config->pins[1]; } static inline const struct aspeed_pin_config *find_pinconf_config( const struct aspeed_pinctrl_data *pdata, unsigned int offset, enum pin_config_param param) { unsigned int i; for (i = 0; i < pdata->nconfigs; i++) { if (param == pdata->configs[i].param && pin_in_config_range(offset, &pdata->configs[i])) return &pdata->configs[i]; } return NULL; } enum aspeed_pin_config_map_type { MAP_TYPE_ARG, MAP_TYPE_VAL }; static const struct aspeed_pin_config_map *find_pinconf_map( const struct aspeed_pinctrl_data *pdata, enum pin_config_param param, enum aspeed_pin_config_map_type type, s64 value) { int i; for (i = 0; i < pdata->nconfmaps; i++) { const struct aspeed_pin_config_map *elem; bool match; elem = &pdata->confmaps[i]; switch (type) { case MAP_TYPE_ARG: match = (elem->arg == -1 || elem->arg == value); break; case MAP_TYPE_VAL: match = (elem->val == value); break; } if (param == elem->param && match) return elem; } return NULL; } int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset, unsigned long *config) { const enum pin_config_param param = pinconf_to_config_param(*config); const struct aspeed_pin_config_map *pmap; const struct aspeed_pinctrl_data *pdata; const struct aspeed_pin_config *pconf; unsigned int val; int rc = 0; u32 arg; pdata = pinctrl_dev_get_drvdata(pctldev); pconf = find_pinconf_config(pdata, offset, param); if (!pconf) return -ENOTSUPP; rc = regmap_read(pdata->scu, pconf->reg, &val); if (rc < 0) return rc; pmap = find_pinconf_map(pdata, param, MAP_TYPE_VAL, (val & pconf->mask) >> __ffs(pconf->mask)); if (!pmap) return -EINVAL; if (param == PIN_CONFIG_DRIVE_STRENGTH) arg = (u32) pmap->arg; else if (param == PIN_CONFIG_BIAS_PULL_DOWN) arg = !!pmap->arg; else arg = 1; if (!arg) return -EINVAL; *config = pinconf_to_config_packed(param, arg); return 0; } int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, unsigned long *configs, unsigned int num_configs) { const struct aspeed_pinctrl_data *pdata; unsigned int i; int rc = 0; pdata = pinctrl_dev_get_drvdata(pctldev); for (i = 0; i < num_configs; i++) { const struct aspeed_pin_config_map *pmap; const struct aspeed_pin_config *pconf; enum pin_config_param param; unsigned int val; u32 arg; param = pinconf_to_config_param(configs[i]); arg = pinconf_to_config_argument(configs[i]); pconf = find_pinconf_config(pdata, offset, param); if (!pconf) return -ENOTSUPP; pmap = find_pinconf_map(pdata, param, MAP_TYPE_ARG, arg); if (WARN_ON(!pmap)) return -EINVAL; val = pmap->val << __ffs(pconf->mask); rc = regmap_update_bits(pdata->scu, pconf->reg, pconf->mask, val); if (rc < 0) return rc; pr_debug("%s: Set SCU%02X[0x%08X]=0x%X for param %d(=%d) on pin %d\n", __func__, pconf->reg, pconf->mask, val, param, arg, offset); } return 0; } int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev, unsigned int selector, unsigned long *config) { const unsigned int *pins; unsigned int npins; int rc; rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins); if (rc < 0) return rc; if (!npins) return -ENODEV; rc = aspeed_pin_config_get(pctldev, pins[0], config); return rc; } int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev, unsigned int selector, unsigned long *configs, unsigned int num_configs) { const unsigned int *pins; unsigned int npins; int rc; int i; pr_debug("%s: Fetching pins for group selector %d\n", __func__, selector); rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins); if (rc < 0) return rc; for (i = 0; i < npins; i++) { rc = aspeed_pin_config_set(pctldev, pins[i], configs, num_configs); if (rc < 0) return rc; } return 0; } |