1/* SPDX-License-Identifier: GPL-2.0 */
  2/* Copyright(c) 2009-2012  Realtek Corporation.*/
  3
  4#ifndef	__RTL92COMMON_DM_H__
  5#define __RTL92COMMON_DM_H__
  6
  7#include "../wifi.h"
  8#include "../rtl8192ce/def.h"
  9#include "../rtl8192ce/reg.h"
 10#include "fw_common.h"
 11
 12#define HAL_DM_DIG_DISABLE			BIT(0)
 13#define HAL_DM_HIPWR_DISABLE			BIT(1)
 14
 15#define OFDM_TABLE_LENGTH			37
 16#define CCK_TABLE_LENGTH			33
 17
 18#define OFDM_TABLE_SIZE				37
 19#define CCK_TABLE_SIZE				33
 20
 21#define BW_AUTO_SWITCH_HIGH_LOW			25
 22#define BW_AUTO_SWITCH_LOW_HIGH			30
 23
 24#define DM_DIG_FA_UPPER				0x32
 25#define DM_DIG_FA_LOWER				0x20
 26#define DM_DIG_FA_TH0				0x20
 27#define DM_DIG_FA_TH1				0x100
 28#define DM_DIG_FA_TH2				0x200
 29
 30#define RXPATHSELECTION_SS_TH_LOW		30
 31#define RXPATHSELECTION_DIFF_TH			18
 32
 33#define DM_RATR_STA_INIT			0
 34#define DM_RATR_STA_HIGH			1
 35#define DM_RATR_STA_MIDDLE			2
 36#define DM_RATR_STA_LOW				3
 37
 38#define CTS2SELF_THVAL				30
 39#define REGC38_TH				20
 40
 41#define WAIOTTHVAL				25
 42
 43#define TXHIGHPWRLEVEL_NORMAL			0
 44#define TXHIGHPWRLEVEL_LEVEL1			1
 45#define TXHIGHPWRLEVEL_LEVEL2			2
 46#define TXHIGHPWRLEVEL_BT1			3
 47#define TXHIGHPWRLEVEL_BT2			4
 48
 49#define DM_TYPE_BYFW				0
 50#define DM_TYPE_BYDRIVER			1
 51
 52#define TX_POWER_NEAR_FIELD_THRESH_LVL2		74
 53#define TX_POWER_NEAR_FIELD_THRESH_LVL1		67
 54
 55#define DYNAMIC_FUNC_DISABLE			0x0
 56#define DYNAMIC_FUNC_DIG			BIT(0)
 57#define DYNAMIC_FUNC_HP				BIT(1)
 58#define DYNAMIC_FUNC_SS				BIT(2) /*Tx Power Tracking*/
 59#define DYNAMIC_FUNC_BT				BIT(3)
 60#define DYNAMIC_FUNC_ANT_DIV			BIT(4)
 61
 62#define	RSSI_CCK				0
 63#define	RSSI_OFDM				1
 64#define	RSSI_DEFAULT				2
 65
 66struct swat_t {
 67	u8 failure_cnt;
 68	u8 try_flag;
 69	u8 stop_trying;
 70	long pre_rssi;
 71	long trying_threshold;
 72	u8 cur_antenna;
 73	u8 pre_antenna;
 74};
 75
 76enum tag_dynamic_init_gain_operation_type_definition {
 77	DIG_TYPE_THRESH_HIGH = 0,
 78	DIG_TYPE_THRESH_LOW = 1,
 79	DIG_TYPE_BACKOFF = 2,
 80	DIG_TYPE_RX_GAIN_MIN = 3,
 81	DIG_TYPE_RX_GAIN_MAX = 4,
 82	DIG_TYPE_ENABLE = 5,
 83	DIG_TYPE_DISABLE = 6,
 84	DIG_OP_TYPE_MAX
 85};
 86
 87enum dm_1r_cca_e {
 88	CCA_1R = 0,
 89	CCA_2R = 1,
 90	CCA_MAX = 2,
 91};
 92
 93enum dm_rf_e {
 94	RF_SAVE = 0,
 95	RF_NORMAL = 1,
 96	RF_MAX = 2,
 97};
 98
 99enum dm_sw_ant_switch_e {
100	ANS_ANTENNA_B = 1,
101	ANS_ANTENNA_A = 2,
102	ANS_ANTENNA_MAX = 3,
103};
104
105void rtl92c_dm_init(struct ieee80211_hw *hw);
106void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
107void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
108void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
109void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
110void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
111void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
112void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta);
113void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
114void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool recovery);
115void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
116void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
117void dm_savepowerindex(struct ieee80211_hw *hw);
118void dm_writepowerindex(struct ieee80211_hw *hw, u8 value);
119void dm_restorepowerindex(struct ieee80211_hw *hw);
120
121#endif