1// SPDX-License-Identifier: ISC
 2/*
 3 * Copyright (c) 2014 Broadcom Corporation
 4 */
 5#ifndef BRCMF_CHIP_H
 6#define BRCMF_CHIP_H
 7
 8#include <linux/types.h>
 9
10#define CORE_CC_REG(base, field) \
11		(base + offsetof(struct chipcregs, field))
12
13/**
14 * struct brcmf_chip - chip level information.
15 *
16 * @chip: chip identifier.
17 * @chiprev: chip revision.
18 * @enum_base: base address of core enumeration space.
19 * @cc_caps: chipcommon core capabilities.
20 * @cc_caps_ext: chipcommon core extended capabilities.
21 * @pmucaps: PMU capabilities.
22 * @pmurev: PMU revision.
23 * @rambase: RAM base address (only applicable for ARM CR4 chips).
24 * @ramsize: amount of RAM on chip including retention.
25 * @srsize: amount of retention RAM on chip.
26 * @name: string representation of the chip identifier.
27 */
28struct brcmf_chip {
29	u32 chip;
30	u32 chiprev;
31	u32 enum_base;
32	u32 cc_caps;
33	u32 cc_caps_ext;
34	u32 pmucaps;
35	u32 pmurev;
36	u32 rambase;
37	u32 ramsize;
38	u32 srsize;
39	char name[12];
40};
41
42/**
43 * struct brcmf_core - core related information.
44 *
45 * @id: core identifier.
46 * @rev: core revision.
47 * @base: base address of core register space.
48 */
49struct brcmf_core {
50	u16 id;
51	u16 rev;
52	u32 base;
53};
54
55/**
56 * struct brcmf_buscore_ops - buscore specific callbacks.
57 *
58 * @read32: read 32-bit value over bus.
59 * @write32: write 32-bit value over bus.
60 * @prepare: prepare bus for core configuration.
61 * @setup: bus-specific core setup.
62 * @active: chip becomes active.
63 *	The callback should use the provided @rstvec when non-zero.
64 */
65struct brcmf_buscore_ops {
66	u32 (*read32)(void *ctx, u32 addr);
67	void (*write32)(void *ctx, u32 addr, u32 value);
68	int (*prepare)(void *ctx);
69	int (*reset)(void *ctx, struct brcmf_chip *chip);
70	int (*setup)(void *ctx, struct brcmf_chip *chip);
71	void (*activate)(void *ctx, struct brcmf_chip *chip, u32 rstvec);
72};
73
74int brcmf_chip_get_raminfo(struct brcmf_chip *pub);
75struct brcmf_chip *brcmf_chip_attach(void *ctx, u16 devid,
76				     const struct brcmf_buscore_ops *ops);
77void brcmf_chip_detach(struct brcmf_chip *chip);
78struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid);
79struct brcmf_core *brcmf_chip_get_d11core(struct brcmf_chip *pub, u8 unit);
80struct brcmf_core *brcmf_chip_get_chipcommon(struct brcmf_chip *chip);
81struct brcmf_core *brcmf_chip_get_pmu(struct brcmf_chip *pub);
82bool brcmf_chip_iscoreup(struct brcmf_core *core);
83void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
84void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
85			  u32 postreset);
86void brcmf_chip_set_passive(struct brcmf_chip *ci);
87bool brcmf_chip_set_active(struct brcmf_chip *ci, u32 rstvec);
88bool brcmf_chip_sr_capable(struct brcmf_chip *pub);
89char *brcmf_chip_name(u32 chipid, u32 chiprev, char *buf, uint len);
90u32 brcmf_chip_enum_base(u16 devid);
91
92#endif /* BRCMF_AXIDMP_H */