1/* SPDX-License-Identifier: GPL-2.0+ */
  2// Copyright (c) 2021 Hisilicon Limited.
  3
  4#ifndef __HCLGE_PTP_H
  5#define __HCLGE_PTP_H
  6
  7#include <linux/ptp_clock_kernel.h>
  8#include <linux/net_tstamp.h>
  9#include <linux/types.h>
 10
 11struct hclge_dev;
 12struct ifreq;
 13
 14#define HCLGE_PTP_REG_OFFSET	0x29000
 15
 16#define HCLGE_PTP_TX_TS_SEQID_REG	0x0
 17#define HCLGE_PTP_TX_TS_NSEC_REG	0x4
 18#define HCLGE_PTP_TX_TS_NSEC_MASK	GENMASK(29, 0)
 19#define HCLGE_PTP_TX_TS_SEC_L_REG	0x8
 20#define HCLGE_PTP_TX_TS_SEC_H_REG	0xC
 21#define HCLGE_PTP_TX_TS_SEC_H_MASK	GENMASK(15, 0)
 22#define HCLGE_PTP_TX_TS_CNT_REG		0x30
 23
 24#define HCLGE_PTP_TIME_SEC_H_REG	0x50
 25#define HCLGE_PTP_TIME_SEC_H_MASK	GENMASK(15, 0)
 26#define HCLGE_PTP_TIME_SEC_L_REG	0x54
 27#define HCLGE_PTP_TIME_NSEC_REG		0x58
 28#define HCLGE_PTP_TIME_NSEC_MASK	GENMASK(29, 0)
 29#define HCLGE_PTP_TIME_NSEC_NEG		BIT(31)
 30#define HCLGE_PTP_TIME_SYNC_REG		0x5C
 31#define HCLGE_PTP_TIME_SYNC_EN		BIT(0)
 32#define HCLGE_PTP_TIME_ADJ_REG		0x60
 33#define HCLGE_PTP_TIME_ADJ_EN		BIT(0)
 34#define HCLGE_PTP_CYCLE_QUO_REG		0x64
 35#define HCLGE_PTP_CYCLE_QUO_MASK	GENMASK(7, 0)
 36#define HCLGE_PTP_CYCLE_DEN_REG		0x68
 37#define HCLGE_PTP_CYCLE_NUM_REG		0x6C
 38#define HCLGE_PTP_CYCLE_CFG_REG		0x70
 39#define HCLGE_PTP_CYCLE_ADJ_EN		BIT(0)
 40#define HCLGE_PTP_CUR_TIME_SEC_H_REG	0x74
 41#define HCLGE_PTP_CUR_TIME_SEC_L_REG	0x78
 42#define HCLGE_PTP_CUR_TIME_NSEC_REG	0x7C
 43
 44#define HCLGE_PTP_CYCLE_ADJ_MAX		500000000
 45#define HCLGE_PTP_SEC_H_OFFSET		32u
 46#define HCLGE_PTP_SEC_L_MASK		GENMASK(31, 0)
 47
 48#define HCLGE_PTP_FLAG_EN		0
 49#define HCLGE_PTP_FLAG_TX_EN		1
 50#define HCLGE_PTP_FLAG_RX_EN		2
 51
 52struct hclge_ptp_cycle {
 53	u32 quo;
 54	u32 numer;
 55	u32 den;
 56};
 57
 58struct hclge_ptp {
 59	struct hclge_dev *hdev;
 60	struct ptp_clock *clock;
 61	struct sk_buff *tx_skb;
 62	unsigned long flags;
 63	void __iomem *io_base;
 64	struct ptp_clock_info info;
 65	struct hwtstamp_config ts_cfg;
 66	spinlock_t lock;	/* protects ptp registers */
 67	u32 ptp_cfg;
 68	u32 last_tx_seqid;
 69	struct hclge_ptp_cycle cycle;
 70	unsigned long tx_start;
 71	unsigned long tx_cnt;
 72	unsigned long tx_skipped;
 73	unsigned long tx_cleaned;
 74	unsigned long last_rx;
 75	unsigned long rx_cnt;
 76	unsigned long tx_timeout;
 77};
 78
 79struct hclge_ptp_int_cmd {
 80#define HCLGE_PTP_INT_EN_B	BIT(0)
 81
 82	u8 int_en;
 83	u8 rsvd[23];
 84};
 85
 86enum hclge_ptp_udp_type {
 87	HCLGE_PTP_UDP_NOT_TYPE,
 88	HCLGE_PTP_UDP_P13F_TYPE,
 89	HCLGE_PTP_UDP_P140_TYPE,
 90	HCLGE_PTP_UDP_FULL_TYPE,
 91};
 92
 93enum hclge_ptp_msg_type {
 94	HCLGE_PTP_MSG_TYPE_V2_L2,
 95	HCLGE_PTP_MSG_TYPE_V2,
 96	HCLGE_PTP_MSG_TYPE_V2_EVENT,
 97};
 98
 99enum hclge_ptp_msg0_type {
100	HCLGE_PTP_MSG0_V2_DELAY_REQ = 1,
101	HCLGE_PTP_MSG0_V2_PDELAY_REQ,
102	HCLGE_PTP_MSG0_V2_DELAY_RESP,
103	HCLGE_PTP_MSG0_V2_EVENT = 0xF,
104};
105
106#define HCLGE_PTP_MSG1_V2_DEFAULT	1
107
108struct hclge_ptp_cfg_cmd {
109#define HCLGE_PTP_EN_B			BIT(0)
110#define HCLGE_PTP_TX_EN_B		BIT(1)
111#define HCLGE_PTP_RX_EN_B		BIT(2)
112#define HCLGE_PTP_UDP_EN_SHIFT		3
113#define HCLGE_PTP_UDP_EN_MASK		GENMASK(4, 3)
114#define HCLGE_PTP_MSG_TYPE_SHIFT	8
115#define HCLGE_PTP_MSG_TYPE_MASK		GENMASK(9, 8)
116#define HCLGE_PTP_MSG1_SHIFT		16
117#define HCLGE_PTP_MSG1_MASK		GENMASK(19, 16)
118#define HCLGE_PTP_MSG0_SHIFT		24
119#define HCLGE_PTP_MSG0_MASK		GENMASK(27, 24)
120
121	__le32 cfg;
122	u8 rsvd[20];
123};
124
125static inline struct hclge_dev *hclge_ptp_get_hdev(struct ptp_clock_info *info)
126{
127	struct hclge_ptp *ptp = container_of(info, struct hclge_ptp, info);
128
129	return ptp->hdev;
130}
131
132bool hclge_ptp_set_tx_info(struct hnae3_handle *handle, struct sk_buff *skb);
133void hclge_ptp_clean_tx_hwts(struct hclge_dev *hdev);
134void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,
135			   u32 nsec, u32 sec);
136int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr);
137int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr);
138int hclge_ptp_init(struct hclge_dev *hdev);
139void hclge_ptp_uninit(struct hclge_dev *hdev);
140int hclge_ptp_get_ts_info(struct hnae3_handle *handle,
141			  struct ethtool_ts_info *info);
142int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg);
143#endif