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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 | /********************************************************************** * Author: Cavium, Inc. * * Contact: support@cavium.com * Please include "LiquidIO" in the subject. * * Copyright (c) 2003-2016 Cavium, Inc. * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as * published by the Free Software Foundation. * * This file is distributed in the hope that it will be useful, but * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or * NONINFRINGEMENT. See the GNU General Public License for more * details. **********************************************************************/ #include <linux/pci.h> #include <linux/netdevice.h> #include "liquidio_common.h" #include "octeon_droq.h" #include "octeon_iq.h" #include "response_manager.h" #include "octeon_device.h" #include "octeon_main.h" static void oct_poll_req_completion(struct work_struct *work); int octeon_setup_response_list(struct octeon_device *oct) { int i, ret = 0; struct cavium_wq *cwq; for (i = 0; i < MAX_RESPONSE_LISTS; i++) { INIT_LIST_HEAD(&oct->response_list[i].head); spin_lock_init(&oct->response_list[i].lock); atomic_set(&oct->response_list[i].pending_req_count, 0); } spin_lock_init(&oct->cmd_resp_wqlock); oct->dma_comp_wq.wq = alloc_workqueue("dma-comp", WQ_MEM_RECLAIM, 0); if (!oct->dma_comp_wq.wq) { dev_err(&oct->pci_dev->dev, "failed to create wq thread\n"); return -ENOMEM; } cwq = &oct->dma_comp_wq; INIT_DELAYED_WORK(&cwq->wk.work, oct_poll_req_completion); cwq->wk.ctxptr = oct; oct->cmd_resp_state = OCT_DRV_ONLINE; return ret; } EXPORT_SYMBOL_GPL(octeon_setup_response_list); void octeon_delete_response_list(struct octeon_device *oct) { cancel_delayed_work_sync(&oct->dma_comp_wq.wk.work); destroy_workqueue(oct->dma_comp_wq.wq); } EXPORT_SYMBOL_GPL(octeon_delete_response_list); int lio_process_ordered_list(struct octeon_device *octeon_dev, u32 force_quit) { struct octeon_response_list *ordered_sc_list; struct octeon_soft_command *sc; int request_complete = 0; int resp_to_process = MAX_ORD_REQS_TO_PROCESS; u32 status; u64 status64; octeon_free_sc_done_list(octeon_dev); ordered_sc_list = &octeon_dev->response_list[OCTEON_ORDERED_SC_LIST]; do { spin_lock_bh(&ordered_sc_list->lock); if (list_empty(&ordered_sc_list->head)) { spin_unlock_bh(&ordered_sc_list->lock); return 1; } sc = list_first_entry(&ordered_sc_list->head, struct octeon_soft_command, node); status = OCTEON_REQUEST_PENDING; /* check if octeon has finished DMA'ing a response * to where rptr is pointing to */ status64 = *sc->status_word; if (status64 != COMPLETION_WORD_INIT) { /* This logic ensures that all 64b have been written. * 1. check byte 0 for non-FF * 2. if non-FF, then swap result from BE to host order * 3. check byte 7 (swapped to 0) for non-FF * 4. if non-FF, use the low 32-bit status code * 5. if either byte 0 or byte 7 is FF, don't use status */ if ((status64 & 0xff) != 0xff) { octeon_swap_8B_data(&status64, 1); if (((status64 & 0xff) != 0xff)) { /* retrieve 16-bit firmware status */ status = (u32)(status64 & 0xffffULL); if (status) { status = FIRMWARE_STATUS_CODE(status); } else { /* i.e. no error */ status = OCTEON_REQUEST_DONE; } } } } else if (unlikely(force_quit) || (sc->expiry_time && time_after(jiffies, (unsigned long)sc->expiry_time))) { struct octeon_instr_irh *irh = (struct octeon_instr_irh *)&sc->cmd.cmd3.irh; dev_err(&octeon_dev->pci_dev->dev, "%s: ", __func__); dev_err(&octeon_dev->pci_dev->dev, "cmd %x/%x/%llx/%llx failed, ", irh->opcode, irh->subcode, sc->cmd.cmd3.ossp[0], sc->cmd.cmd3.ossp[1]); dev_err(&octeon_dev->pci_dev->dev, "timeout (%ld, %ld)\n", (long)jiffies, (long)sc->expiry_time); status = OCTEON_REQUEST_TIMEOUT; } if (status != OCTEON_REQUEST_PENDING) { sc->sc_status = status; /* we have received a response or we have timed out */ /* remove node from linked list */ list_del(&sc->node); atomic_dec(&octeon_dev->response_list [OCTEON_ORDERED_SC_LIST]. pending_req_count); if (!sc->callback) { atomic_inc(&octeon_dev->response_list [OCTEON_DONE_SC_LIST]. pending_req_count); list_add_tail(&sc->node, &octeon_dev->response_list [OCTEON_DONE_SC_LIST].head); if (unlikely(READ_ONCE(sc->caller_is_done))) { /* caller does not wait for response * from firmware */ if (status != OCTEON_REQUEST_DONE) { struct octeon_instr_irh *irh; irh = (struct octeon_instr_irh *) &sc->cmd.cmd3.irh; dev_dbg (&octeon_dev->pci_dev->dev, "%s: sc failed: opcode=%x, ", __func__, irh->opcode); dev_dbg (&octeon_dev->pci_dev->dev, "subcode=%x, ossp[0]=%llx, ", irh->subcode, sc->cmd.cmd3.ossp[0]); dev_dbg (&octeon_dev->pci_dev->dev, "ossp[1]=%llx, status=%d\n", sc->cmd.cmd3.ossp[1], status); } } else { complete(&sc->complete); } spin_unlock_bh(&ordered_sc_list->lock); } else { /* sc with callback function */ if (status == OCTEON_REQUEST_TIMEOUT) { atomic_inc(&octeon_dev->response_list [OCTEON_ZOMBIE_SC_LIST]. pending_req_count); list_add_tail(&sc->node, &octeon_dev->response_list [OCTEON_ZOMBIE_SC_LIST]. head); } spin_unlock_bh(&ordered_sc_list->lock); sc->callback(octeon_dev, status, sc->callback_arg); /* sc is freed by caller */ } request_complete++; } else { /* no response yet */ request_complete = 0; spin_unlock_bh (&ordered_sc_list->lock); } /* If we hit the Max Ordered requests to process every loop, * we quit * and let this function be invoked the next time the poll * thread runs * to process the remaining requests. This function can take up * the entire CPU if there is no upper limit to the requests * processed. */ if (request_complete >= resp_to_process) break; } while (request_complete); return 0; } EXPORT_SYMBOL_GPL(lio_process_ordered_list); static void oct_poll_req_completion(struct work_struct *work) { struct cavium_wk *wk = (struct cavium_wk *)work; struct octeon_device *oct = (struct octeon_device *)wk->ctxptr; struct cavium_wq *cwq = &oct->dma_comp_wq; lio_process_ordered_list(oct, 0); if (atomic_read(&oct->response_list [OCTEON_ORDERED_SC_LIST].pending_req_count)) queue_delayed_work(cwq->wq, &cwq->wk.work, msecs_to_jiffies(1)); } |