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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 | // SPDX-License-Identifier: GPL-2.0 /* * Author: * Chuanhong Guo <gch981213@gmail.com> - the main driver logic * Martin Kurbanov <mmkurbanov@sberdevices.ru> - OOB layout */ #include <linux/device.h> #include <linux/kernel.h> #include <linux/mtd/spinand.h> /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */ #define SPINAND_MFR_ESMT_C8 0xc8 static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), SPINAND_PROG_LOAD(true, 0, NULL, 0)); static SPINAND_OP_VARIANTS(update_cache_variants, SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), SPINAND_PROG_LOAD(false, 0, NULL, 0)); /* * OOB spare area map (64 bytes) * * Bad Block Markers * filled by HW and kernel Reserved * | +-----------------------+-----------------------+ * | | | | * | | OOB free data Area |non ECC protected | * | +-------------|-----+-----------------|-----+-----------------|-----+ * | | | | | | | | * +-|---|----------+--|-----|--------------+--|-----|--------------+--|-----|--------------+ * | | | section0 | | | section1 | | | section2 | | | section3 | * +-v-+-v-+---+----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+ * | | | | | | | | | | | | | | | | | * |0:1|2:3|4:7|8:15|16:17|18:19|20:23|24:31|32:33|34:35|36:39|40:47|48:49|50:51|52:55|56:63| * | | | | | | | | | | | | | | | | | * +---+---+-^-+--^-+-----+-----+--^--+--^--+-----+-----+--^--+--^--+-----+-----+--^--+--^--+ * | | | | | | | | * | +----------------|-----+-----------------|-----+-----------------|-----+ * | ECC Area|(Main + Spare) - filled|by ESMT NAND HW | * | | | | * +---------------------+-----------------------+-----------------------+ * OOB ECC protected Area - not used due to * partial programming from some filesystems * (like JFFS2 with cleanmarkers) */ #define ESMT_OOB_SECTION_COUNT 4 #define ESMT_OOB_SECTION_SIZE(nand) \ (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT) #define ESMT_OOB_FREE_SIZE(nand) \ (ESMT_OOB_SECTION_SIZE(nand) / 2) #define ESMT_OOB_ECC_SIZE(nand) \ (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand)) #define ESMT_OOB_BBM_SIZE 2 static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { struct nand_device *nand = mtd_to_nanddev(mtd); if (section >= ESMT_OOB_SECTION_COUNT) return -ERANGE; region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + ESMT_OOB_FREE_SIZE(nand); region->length = ESMT_OOB_ECC_SIZE(nand); return 0; } static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { struct nand_device *nand = mtd_to_nanddev(mtd); if (section >= ESMT_OOB_SECTION_COUNT) return -ERANGE; /* * Reserve space for bad blocks markers (section0) and * reserved bytes (sections 1-3) */ region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + 2; /* Use only 2 non-protected ECC bytes per each OOB section */ region->length = 2; return 0; } static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = { .ecc = f50l1g41lb_ooblayout_ecc, .free = f50l1g41lb_ooblayout_free, }; static const struct spinand_info esmt_c8_spinand_table[] = { SPINAND_INFO("F50L1G41LB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f, 0x7f, 0x7f), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), SPINAND_INFO("F50D1G41LB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f, 0x7f, 0x7f), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), SPINAND_INFO("F50D2G41KA", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f, 0x7f, 0x7f), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), }; static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = { }; const struct spinand_manufacturer esmt_c8_spinand_manufacturer = { .id = SPINAND_MFR_ESMT_C8, .name = "ESMT", .chips = esmt_c8_spinand_table, .nchips = ARRAY_SIZE(esmt_c8_spinand_table), .ops = &esmt_spinand_manuf_ops, }; |