1/* SPDX-License-Identifier: GPL-2.0+ */
 2/*
 3 * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
 4 * Author: Yong Deng <yong.deng@magewell.com>
 5 * Copyright 2021-2022 Bootlin
 6 * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
 7 */
 8
 9#ifndef _SUN6I_CSI_H_
10#define _SUN6I_CSI_H_
11
12#include <media/v4l2-device.h>
13#include <media/videobuf2-v4l2.h>
14
15#include "sun6i_csi_bridge.h"
16#include "sun6i_csi_capture.h"
17
18#define SUN6I_CSI_NAME		"sun6i-csi"
19#define SUN6I_CSI_DESCRIPTION	"Allwinner A31 CSI Device"
20
21enum sun6i_csi_port {
22	SUN6I_CSI_PORT_PARALLEL		= 0,
23	SUN6I_CSI_PORT_MIPI_CSI2	= 1,
24	SUN6I_CSI_PORT_ISP		= 2,
25};
26
27struct sun6i_csi_buffer {
28	struct vb2_v4l2_buffer		v4l2_buffer;
29	struct list_head		list;
30};
31
32struct sun6i_csi_v4l2 {
33	struct v4l2_device		v4l2_dev;
34	struct media_device		media_dev;
35};
36
37struct sun6i_csi_device {
38	struct device			*dev;
39	struct v4l2_device		*v4l2_dev;
40	struct media_device		*media_dev;
41
42	struct sun6i_csi_v4l2		v4l2;
43	struct sun6i_csi_bridge		bridge;
44	struct sun6i_csi_capture	capture;
45
46	struct regmap			*regmap;
47	struct clk			*clock_mod;
48	struct clk			*clock_ram;
49	struct reset_control		*reset;
50
51	bool				isp_available;
52};
53
54struct sun6i_csi_variant {
55	unsigned long	clock_mod_rate;
56};
57
58/* ISP */
59
60int sun6i_csi_isp_complete(struct sun6i_csi_device *csi_dev,
61			   struct v4l2_device *v4l2_dev);
62
63#endif