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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 | // SPDX-License-Identifier: GPL-2.0 /* * cxd2880_tnrdmd_mon.c * Sony CXD2880 DVB-T2/T tuner + demodulator driver * common monitor functions * * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation */ #include "cxd2880_common.h" #include "cxd2880_tnrdmd_mon.h" static const u8 rf_lvl_seq[2] = { 0x80, 0x00, }; int cxd2880_tnrdmd_mon_rf_lvl(struct cxd2880_tnrdmd *tnr_dmd, int *rf_lvl_db) { u8 rdata[2]; int ret; if (!tnr_dmd || !rf_lvl_db) return -EINVAL; if (tnr_dmd->state != CXD2880_TNRDMD_STATE_ACTIVE) return -EINVAL; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_DMD, 0x00, 0x00); if (ret) return ret; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_DMD, 0x10, 0x01); if (ret) return ret; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x00, 0x10); if (ret) return ret; ret = tnr_dmd->io->write_regs(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x5b, rf_lvl_seq, 2); if (ret) return ret; usleep_range(2000, 3000); ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x00, 0x1a); if (ret) return ret; ret = tnr_dmd->io->read_regs(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x15, rdata, 2); if (ret) return ret; if (rdata[0] || rdata[1]) return -EINVAL; ret = tnr_dmd->io->read_regs(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x11, rdata, 2); if (ret) return ret; *rf_lvl_db = cxd2880_convert2s_complement((rdata[0] << 3) | ((rdata[1] & 0xe0) >> 5), 11); *rf_lvl_db *= 125; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_DMD, 0x00, 0x00); if (ret) return ret; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_DMD, 0x10, 0x00); if (ret) return ret; if (tnr_dmd->rf_lvl_cmpstn) ret = tnr_dmd->rf_lvl_cmpstn(tnr_dmd, rf_lvl_db); return ret; } int cxd2880_tnrdmd_mon_rf_lvl_sub(struct cxd2880_tnrdmd *tnr_dmd, int *rf_lvl_db) { if (!tnr_dmd || !rf_lvl_db) return -EINVAL; if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN) return -EINVAL; return cxd2880_tnrdmd_mon_rf_lvl(tnr_dmd->diver_sub, rf_lvl_db); } int cxd2880_tnrdmd_mon_internal_cpu_status(struct cxd2880_tnrdmd *tnr_dmd, u16 *status) { u8 data[2] = { 0 }; int ret; if (!tnr_dmd || !status) return -EINVAL; ret = tnr_dmd->io->write_reg(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x00, 0x1a); if (ret) return ret; ret = tnr_dmd->io->read_regs(tnr_dmd->io, CXD2880_IO_TGT_SYS, 0x15, data, 2); if (ret) return ret; *status = (data[0] << 8) | data[1]; return 0; } int cxd2880_tnrdmd_mon_internal_cpu_status_sub(struct cxd2880_tnrdmd *tnr_dmd, u16 *status) { if (!tnr_dmd || !status) return -EINVAL; if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN) return -EINVAL; return cxd2880_tnrdmd_mon_internal_cpu_status(tnr_dmd->diver_sub, status); } |