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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 | /* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include "chan.h" #include "chid.h" #include "cgrp.h" #include "runl.h" #include "priv.h" #include <core/ramht.h> #include <subdev/mmu.h> #include <engine/dma.h> #include <nvif/if0020.h> const struct nvkm_event_func nvkm_chan_event = { }; void nvkm_chan_cctx_bind(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx *cctx) { struct nvkm_cgrp *cgrp = chan->cgrp; struct nvkm_runl *runl = cgrp->runl; struct nvkm_engine *engine = engn->engine; if (!engn->func->bind) return; CHAN_TRACE(chan, "%sbind cctx %d[%s]", cctx ? "" : "un", engn->id, engine->subdev.name); /* Prevent any channel in channel group from being rescheduled, kick them * off host and any engine(s) they're loaded on. */ if (cgrp->hw) nvkm_runl_block(runl); else nvkm_chan_block(chan); nvkm_chan_preempt(chan, true); /* Update context pointer. */ engn->func->bind(engn, cctx, chan); /* Resume normal operation. */ if (cgrp->hw) nvkm_runl_allow(runl); else nvkm_chan_allow(chan); } void nvkm_chan_cctx_put(struct nvkm_chan *chan, struct nvkm_cctx **pcctx) { struct nvkm_cctx *cctx = *pcctx; if (cctx) { struct nvkm_engn *engn = cctx->vctx->ectx->engn; if (refcount_dec_and_mutex_lock(&cctx->refs, &chan->cgrp->mutex)) { CHAN_TRACE(chan, "dtor cctx %d[%s]", engn->id, engn->engine->subdev.name); nvkm_cgrp_vctx_put(chan->cgrp, &cctx->vctx); list_del(&cctx->head); kfree(cctx); mutex_unlock(&chan->cgrp->mutex); } *pcctx = NULL; } } int nvkm_chan_cctx_get(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx **pcctx, struct nvkm_client *client) { struct nvkm_cgrp *cgrp = chan->cgrp; struct nvkm_vctx *vctx; struct nvkm_cctx *cctx; int ret; /* Look for an existing channel context for this engine+VEID. */ mutex_lock(&cgrp->mutex); cctx = nvkm_list_find(cctx, &chan->cctxs, head, cctx->vctx->ectx->engn == engn && cctx->vctx->vmm == chan->vmm); if (cctx) { refcount_inc(&cctx->refs); *pcctx = cctx; mutex_unlock(&chan->cgrp->mutex); return 0; } /* Nope - create a fresh one. But, sub-context first. */ ret = nvkm_cgrp_vctx_get(cgrp, engn, chan, &vctx, client); if (ret) { CHAN_ERROR(chan, "vctx %d[%s]: %d", engn->id, engn->engine->subdev.name, ret); goto done; } /* Now, create the channel context - to track engine binding. */ CHAN_TRACE(chan, "ctor cctx %d[%s]", engn->id, engn->engine->subdev.name); if (!(cctx = *pcctx = kzalloc(sizeof(*cctx), GFP_KERNEL))) { nvkm_cgrp_vctx_put(cgrp, &vctx); ret = -ENOMEM; goto done; } cctx->vctx = vctx; refcount_set(&cctx->refs, 1); refcount_set(&cctx->uses, 0); list_add_tail(&cctx->head, &chan->cctxs); done: mutex_unlock(&cgrp->mutex); return ret; } int nvkm_chan_preempt_locked(struct nvkm_chan *chan, bool wait) { struct nvkm_runl *runl = chan->cgrp->runl; CHAN_TRACE(chan, "preempt"); chan->func->preempt(chan); if (!wait) return 0; return nvkm_runl_preempt_wait(runl); } int nvkm_chan_preempt(struct nvkm_chan *chan, bool wait) { int ret; if (!chan->func->preempt) return 0; mutex_lock(&chan->cgrp->runl->mutex); ret = nvkm_chan_preempt_locked(chan, wait); mutex_unlock(&chan->cgrp->runl->mutex); return ret; } void nvkm_chan_remove_locked(struct nvkm_chan *chan) { struct nvkm_cgrp *cgrp = chan->cgrp; struct nvkm_runl *runl = cgrp->runl; if (list_empty(&chan->head)) return; CHAN_TRACE(chan, "remove"); if (!--cgrp->chan_nr) { runl->cgrp_nr--; list_del(&cgrp->head); } runl->chan_nr--; list_del_init(&chan->head); atomic_set(&runl->changed, 1); } void nvkm_chan_remove(struct nvkm_chan *chan, bool preempt) { struct nvkm_runl *runl = chan->cgrp->runl; mutex_lock(&runl->mutex); if (preempt && chan->func->preempt) nvkm_chan_preempt_locked(chan, true); nvkm_chan_remove_locked(chan); nvkm_runl_update_locked(runl, true); mutex_unlock(&runl->mutex); } void nvkm_chan_insert(struct nvkm_chan *chan) { struct nvkm_cgrp *cgrp = chan->cgrp; struct nvkm_runl *runl = cgrp->runl; mutex_lock(&runl->mutex); if (WARN_ON(!list_empty(&chan->head))) { mutex_unlock(&runl->mutex); return; } CHAN_TRACE(chan, "insert"); list_add_tail(&chan->head, &cgrp->chans); runl->chan_nr++; if (!cgrp->chan_nr++) { list_add_tail(&cgrp->head, &cgrp->runl->cgrps); runl->cgrp_nr++; } atomic_set(&runl->changed, 1); nvkm_runl_update_locked(runl, true); mutex_unlock(&runl->mutex); } static void nvkm_chan_block_locked(struct nvkm_chan *chan) { CHAN_TRACE(chan, "block %d", atomic_read(&chan->blocked)); if (atomic_inc_return(&chan->blocked) == 1) chan->func->stop(chan); } void nvkm_chan_error(struct nvkm_chan *chan, bool preempt) { unsigned long flags; spin_lock_irqsave(&chan->lock, flags); if (atomic_inc_return(&chan->errored) == 1) { CHAN_ERROR(chan, "errored - disabling channel"); nvkm_chan_block_locked(chan); if (preempt) chan->func->preempt(chan); nvkm_event_ntfy(&chan->cgrp->runl->chid->event, chan->id, NVKM_CHAN_EVENT_ERRORED); } spin_unlock_irqrestore(&chan->lock, flags); } void nvkm_chan_block(struct nvkm_chan *chan) { spin_lock_irq(&chan->lock); nvkm_chan_block_locked(chan); spin_unlock_irq(&chan->lock); } void nvkm_chan_allow(struct nvkm_chan *chan) { spin_lock_irq(&chan->lock); CHAN_TRACE(chan, "allow %d", atomic_read(&chan->blocked)); if (atomic_dec_and_test(&chan->blocked)) chan->func->start(chan); spin_unlock_irq(&chan->lock); } void nvkm_chan_del(struct nvkm_chan **pchan) { struct nvkm_chan *chan = *pchan; if (!chan) return; if (chan->func->ramfc->clear) chan->func->ramfc->clear(chan); nvkm_ramht_del(&chan->ramht); nvkm_gpuobj_del(&chan->pgd); nvkm_gpuobj_del(&chan->eng); nvkm_gpuobj_del(&chan->cache); nvkm_gpuobj_del(&chan->ramfc); if (chan->cgrp) { if (!chan->func->id_put) nvkm_chid_put(chan->cgrp->runl->chid, chan->id, &chan->cgrp->lock); else chan->func->id_put(chan); nvkm_cgrp_unref(&chan->cgrp); } nvkm_memory_unref(&chan->userd.mem); if (chan->vmm) { nvkm_vmm_part(chan->vmm, chan->inst->memory); nvkm_vmm_unref(&chan->vmm); } nvkm_gpuobj_del(&chan->push); nvkm_gpuobj_del(&chan->inst); kfree(chan); } void nvkm_chan_put(struct nvkm_chan **pchan, unsigned long irqflags) { struct nvkm_chan *chan = *pchan; if (!chan) return; *pchan = NULL; spin_unlock_irqrestore(&chan->cgrp->lock, irqflags); } struct nvkm_chan * nvkm_chan_get_inst(struct nvkm_engine *engine, u64 inst, unsigned long *pirqflags) { struct nvkm_fifo *fifo = engine->subdev.device->fifo; struct nvkm_runl *runl; struct nvkm_engn *engn; struct nvkm_chan *chan; nvkm_runl_foreach(runl, fifo) { nvkm_runl_foreach_engn(engn, runl) { if (engine == &fifo->engine || engn->engine == engine) { chan = nvkm_runl_chan_get_inst(runl, inst, pirqflags); if (chan || engn->engine == engine) return chan; } } } return NULL; } struct nvkm_chan * nvkm_chan_get_chid(struct nvkm_engine *engine, int id, unsigned long *pirqflags) { struct nvkm_fifo *fifo = engine->subdev.device->fifo; struct nvkm_runl *runl; struct nvkm_engn *engn; nvkm_runl_foreach(runl, fifo) { nvkm_runl_foreach_engn(engn, runl) { if (fifo->chid || engn->engine == engine) return nvkm_runl_chan_get_chid(runl, id, pirqflags); } } return NULL; } int nvkm_chan_new_(const struct nvkm_chan_func *func, struct nvkm_runl *runl, int runq, struct nvkm_cgrp *cgrp, const char *name, bool priv, u32 devm, struct nvkm_vmm *vmm, struct nvkm_dmaobj *dmaobj, u64 offset, u64 length, struct nvkm_memory *userd, u64 ouserd, struct nvkm_chan **pchan) { struct nvkm_fifo *fifo = runl->fifo; struct nvkm_device *device = fifo->engine.subdev.device; struct nvkm_chan *chan; int ret; /* Validate arguments against class requirements. */ if ((runq && runq >= runl->func->runqs) || (!func->inst->vmm != !vmm) || ((func->userd->bar < 0) == !userd) || (!func->ramfc->ctxdma != !dmaobj) || ((func->ramfc->devm < devm) && devm != BIT(0)) || (!func->ramfc->priv && priv)) { RUNL_DEBUG(runl, "args runq:%d:%d vmm:%d:%p userd:%d:%p " "push:%d:%p devm:%08x:%08x priv:%d:%d", runl->func->runqs, runq, func->inst->vmm, vmm, func->userd->bar < 0, userd, func->ramfc->ctxdma, dmaobj, func->ramfc->devm, devm, func->ramfc->priv, priv); return -EINVAL; } if (!(chan = *pchan = kzalloc(sizeof(*chan), GFP_KERNEL))) return -ENOMEM; chan->func = func; strscpy(chan->name, name, sizeof(chan->name)); chan->runq = runq; chan->id = -1; spin_lock_init(&chan->lock); atomic_set(&chan->blocked, 1); atomic_set(&chan->errored, 0); INIT_LIST_HEAD(&chan->cctxs); INIT_LIST_HEAD(&chan->head); /* Join channel group. * * GK110 and newer support channel groups (aka TSGs), where individual channels * share a timeslice, and, engine context(s). * * As such, engine contexts are tracked in nvkm_cgrp and we need them even when * channels aren't in an API channel group, and on HW that doesn't support TSGs. */ if (!cgrp) { ret = nvkm_cgrp_new(runl, chan->name, vmm, fifo->func->cgrp.force, &chan->cgrp); if (ret) { RUNL_DEBUG(runl, "cgrp %d", ret); return ret; } cgrp = chan->cgrp; } else { if (cgrp->runl != runl || cgrp->vmm != vmm) { RUNL_DEBUG(runl, "cgrp %d %d", cgrp->runl != runl, cgrp->vmm != vmm); return -EINVAL; } chan->cgrp = nvkm_cgrp_ref(cgrp); } /* Allocate instance block. */ ret = nvkm_gpuobj_new(device, func->inst->size, 0x1000, func->inst->zero, NULL, &chan->inst); if (ret) { RUNL_DEBUG(runl, "inst %d", ret); return ret; } /* Initialise virtual address-space. */ if (func->inst->vmm) { if (WARN_ON(vmm->mmu != device->mmu)) return -EINVAL; ret = nvkm_vmm_join(vmm, chan->inst->memory); if (ret) { RUNL_DEBUG(runl, "vmm %d", ret); return ret; } chan->vmm = nvkm_vmm_ref(vmm); } /* Allocate HW ctxdma for push buffer. */ if (func->ramfc->ctxdma) { ret = nvkm_object_bind(&dmaobj->object, chan->inst, -16, &chan->push); if (ret) { RUNL_DEBUG(runl, "bind %d", ret); return ret; } } /* Allocate channel ID. */ if (!chan->func->id_get) { chan->id = nvkm_chid_get(runl->chid, chan); if (chan->id >= 0) { if (func->userd->bar < 0) { if (ouserd + chan->func->userd->size >= nvkm_memory_size(userd)) { RUNL_DEBUG(runl, "ouserd %llx", ouserd); return -EINVAL; } ret = nvkm_memory_kmap(userd, &chan->userd.mem); if (ret) { RUNL_DEBUG(runl, "userd %d", ret); return ret; } chan->userd.base = ouserd; } else { chan->userd.mem = nvkm_memory_ref(fifo->userd.mem); chan->userd.base = chan->id * chan->func->userd->size; } } } else { chan->id = chan->func->id_get(chan, userd, ouserd); } if (chan->id < 0) { RUNL_ERROR(runl, "!chids"); return -ENOSPC; } if (cgrp->id < 0) cgrp->id = chan->id; /* Initialise USERD. */ if (chan->func->userd->clear) chan->func->userd->clear(chan); /* Initialise RAMFC. */ ret = chan->func->ramfc->write(chan, offset, length, devm, priv); if (ret) { RUNL_DEBUG(runl, "ramfc %d", ret); return ret; } return 0; } |