1#ifndef __NVIF_IF000C_H__
  2#define __NVIF_IF000C_H__
  3struct nvif_vmm_v0 {
  4	__u8  version;
  5	__u8  page_nr;
  6#define NVIF_VMM_V0_TYPE_UNMANAGED                                         0x00
  7#define NVIF_VMM_V0_TYPE_MANAGED                                           0x01
  8#define NVIF_VMM_V0_TYPE_RAW                                               0x02
  9	__u8  type;
 10	__u8  pad03[5];
 11	__u64 addr;
 12	__u64 size;
 13	__u8  data[];
 14};
 15
 16#define NVIF_VMM_V0_PAGE                                                   0x00
 17#define NVIF_VMM_V0_GET                                                    0x01
 18#define NVIF_VMM_V0_PUT                                                    0x02
 19#define NVIF_VMM_V0_MAP                                                    0x03
 20#define NVIF_VMM_V0_UNMAP                                                  0x04
 21#define NVIF_VMM_V0_PFNMAP                                                 0x05
 22#define NVIF_VMM_V0_PFNCLR                                                 0x06
 23#define NVIF_VMM_V0_RAW                                                    0x07
 24#define NVIF_VMM_V0_MTHD(i)                                         ((i) + 0x80)
 25
 26struct nvif_vmm_page_v0 {
 27	__u8  version;
 28	__u8  index;
 29	__u8  shift;
 30	__u8  sparse;
 31	__u8  vram;
 32	__u8  host;
 33	__u8  comp;
 34	__u8  pad07[1];
 35};
 36
 37struct nvif_vmm_get_v0 {
 38	__u8  version;
 39#define NVIF_VMM_GET_V0_ADDR                                               0x00
 40#define NVIF_VMM_GET_V0_PTES                                               0x01
 41#define NVIF_VMM_GET_V0_LAZY	                                           0x02
 42	__u8  type;
 43	__u8  sparse;
 44	__u8  page;
 45	__u8  align;
 46	__u8  pad05[3];
 47	__u64 size;
 48	__u64 addr;
 49};
 50
 51struct nvif_vmm_put_v0 {
 52	__u8  version;
 53	__u8  pad01[7];
 54	__u64 addr;
 55};
 56
 57struct nvif_vmm_map_v0 {
 58	__u8  version;
 59	__u8  pad01[7];
 60	__u64 addr;
 61	__u64 size;
 62	__u64 memory;
 63	__u64 offset;
 64	__u8  data[];
 65};
 66
 67struct nvif_vmm_unmap_v0 {
 68	__u8  version;
 69	__u8  pad01[7];
 70	__u64 addr;
 71};
 72
 73struct nvif_vmm_raw_v0 {
 74	__u8 version;
 75#define NVIF_VMM_RAW_V0_GET	0x0
 76#define NVIF_VMM_RAW_V0_PUT	0x1
 77#define NVIF_VMM_RAW_V0_MAP	0x2
 78#define NVIF_VMM_RAW_V0_UNMAP	0x3
 79#define NVIF_VMM_RAW_V0_SPARSE	0x4
 80	__u8  op;
 81	__u8  sparse;
 82	__u8  ref;
 83	__u8  shift;
 84	__u32 argc;
 85	__u8  pad01[7];
 86	__u64 addr;
 87	__u64 size;
 88	__u64 offset;
 89	__u64 memory;
 90	__u64 argv;
 91};
 92
 93struct nvif_vmm_pfnmap_v0 {
 94	__u8  version;
 95	__u8  page;
 96	__u8  pad02[6];
 97	__u64 addr;
 98	__u64 size;
 99#define NVIF_VMM_PFNMAP_V0_ADDR                           0xfffffffffffff000ULL
100#define NVIF_VMM_PFNMAP_V0_ADDR_SHIFT                                        12
101#define NVIF_VMM_PFNMAP_V0_APER                           0x00000000000000f0ULL
102#define NVIF_VMM_PFNMAP_V0_HOST                           0x0000000000000000ULL
103#define NVIF_VMM_PFNMAP_V0_VRAM                           0x0000000000000010ULL
104#define NVIF_VMM_PFNMAP_V0_A				  0x0000000000000004ULL
105#define NVIF_VMM_PFNMAP_V0_W                              0x0000000000000002ULL
106#define NVIF_VMM_PFNMAP_V0_V                              0x0000000000000001ULL
107#define NVIF_VMM_PFNMAP_V0_NONE                           0x0000000000000000ULL
108	__u64 phys[];
109};
110
111struct nvif_vmm_pfnclr_v0 {
112	__u8  version;
113	__u8  pad01[7];
114	__u64 addr;
115	__u64 size;
116};
117#endif