Loading...
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
4 */
5
6#include <linux/pci.h>
7#include <linux/vgaarb.h>
8
9#include <drm/drm_aperture.h>
10#include <drm/drm_atomic.h>
11#include <drm/drm_atomic_helper.h>
12#include <drm/drm_drv.h>
13#include <drm/drm_fbdev_generic.h>
14#include <drm/drm_gem_framebuffer_helper.h>
15#include <drm/drm_ioctl.h>
16#include <drm/drm_modeset_helper.h>
17#include <drm/drm_probe_helper.h>
18#include <drm/drm_vblank.h>
19
20#include "loongson_module.h"
21#include "lsdc_drv.h"
22#include "lsdc_gem.h"
23#include "lsdc_ttm.h"
24
25#define DRIVER_AUTHOR "Sui Jingfeng <suijingfeng@loongson.cn>"
26#define DRIVER_NAME "loongson"
27#define DRIVER_DESC "drm driver for loongson graphics"
28#define DRIVER_DATE "20220701"
29#define DRIVER_MAJOR 1
30#define DRIVER_MINOR 0
31#define DRIVER_PATCHLEVEL 0
32
33DEFINE_DRM_GEM_FOPS(lsdc_gem_fops);
34
35static const struct drm_driver lsdc_drm_driver = {
36 .driver_features = DRIVER_MODESET | DRIVER_RENDER | DRIVER_GEM | DRIVER_ATOMIC,
37 .fops = &lsdc_gem_fops,
38
39 .name = DRIVER_NAME,
40 .desc = DRIVER_DESC,
41 .date = DRIVER_DATE,
42 .major = DRIVER_MAJOR,
43 .minor = DRIVER_MINOR,
44 .patchlevel = DRIVER_PATCHLEVEL,
45
46 .debugfs_init = lsdc_debugfs_init,
47 .dumb_create = lsdc_dumb_create,
48 .dumb_map_offset = lsdc_dumb_map_offset,
49 .gem_prime_import_sg_table = lsdc_prime_import_sg_table,
50};
51
52static const struct drm_mode_config_funcs lsdc_mode_config_funcs = {
53 .fb_create = drm_gem_fb_create,
54 .atomic_check = drm_atomic_helper_check,
55 .atomic_commit = drm_atomic_helper_commit,
56};
57
58/* Display related */
59
60static int lsdc_modeset_init(struct lsdc_device *ldev,
61 unsigned int num_crtc,
62 const struct lsdc_kms_funcs *funcs,
63 bool has_vblank)
64{
65 struct drm_device *ddev = &ldev->base;
66 struct lsdc_display_pipe *dispipe;
67 unsigned int i;
68 int ret;
69
70 for (i = 0; i < num_crtc; i++) {
71 dispipe = &ldev->dispipe[i];
72
73 /* We need an index before crtc is initialized */
74 dispipe->index = i;
75
76 ret = funcs->create_i2c(ddev, dispipe, i);
77 if (ret)
78 return ret;
79 }
80
81 for (i = 0; i < num_crtc; i++) {
82 struct i2c_adapter *ddc = NULL;
83
84 dispipe = &ldev->dispipe[i];
85 if (dispipe->li2c)
86 ddc = &dispipe->li2c->adapter;
87
88 ret = funcs->output_init(ddev, dispipe, ddc, i);
89 if (ret)
90 return ret;
91
92 ldev->num_output++;
93 }
94
95 for (i = 0; i < num_crtc; i++) {
96 dispipe = &ldev->dispipe[i];
97
98 ret = funcs->primary_plane_init(ddev, &dispipe->primary.base, i);
99 if (ret)
100 return ret;
101
102 ret = funcs->cursor_plane_init(ddev, &dispipe->cursor.base, i);
103 if (ret)
104 return ret;
105
106 ret = funcs->crtc_init(ddev, &dispipe->crtc.base,
107 &dispipe->primary.base,
108 &dispipe->cursor.base,
109 i, has_vblank);
110 if (ret)
111 return ret;
112 }
113
114 drm_info(ddev, "Total %u outputs\n", ldev->num_output);
115
116 return 0;
117}
118
119static const struct drm_mode_config_helper_funcs lsdc_mode_config_helper_funcs = {
120 .atomic_commit_tail = drm_atomic_helper_commit_tail,
121};
122
123static int lsdc_mode_config_init(struct drm_device *ddev,
124 const struct lsdc_desc *descp)
125{
126 int ret;
127
128 ret = drmm_mode_config_init(ddev);
129 if (ret)
130 return ret;
131
132 ddev->mode_config.funcs = &lsdc_mode_config_funcs;
133 ddev->mode_config.min_width = 1;
134 ddev->mode_config.min_height = 1;
135 ddev->mode_config.max_width = descp->max_width * LSDC_NUM_CRTC;
136 ddev->mode_config.max_height = descp->max_height * LSDC_NUM_CRTC;
137 ddev->mode_config.preferred_depth = 24;
138 ddev->mode_config.prefer_shadow = 1;
139
140 ddev->mode_config.cursor_width = descp->hw_cursor_h;
141 ddev->mode_config.cursor_height = descp->hw_cursor_h;
142
143 ddev->mode_config.helper_private = &lsdc_mode_config_helper_funcs;
144
145 if (descp->has_vblank_counter)
146 ddev->max_vblank_count = 0xffffffff;
147
148 return ret;
149}
150
151/*
152 * The GPU and display controller in the LS7A1000/LS7A2000/LS2K2000 are
153 * separated PCIE devices. They are two devices, not one. Bar 2 of the GPU
154 * device contains the base address and size of the VRAM, both the GPU and
155 * the DC could access the on-board VRAM.
156 */
157static int lsdc_get_dedicated_vram(struct lsdc_device *ldev,
158 struct pci_dev *pdev_dc,
159 const struct lsdc_desc *descp)
160{
161 struct drm_device *ddev = &ldev->base;
162 struct pci_dev *pdev_gpu;
163 resource_size_t base, size;
164
165 /*
166 * The GPU has 00:06.0 as its BDF, while the DC has 00:06.1
167 * This is true for the LS7A1000, LS7A2000 and LS2K2000.
168 */
169 pdev_gpu = pci_get_domain_bus_and_slot(pci_domain_nr(pdev_dc->bus),
170 pdev_dc->bus->number,
171 PCI_DEVFN(6, 0));
172 if (!pdev_gpu) {
173 drm_err(ddev, "No GPU device, then no VRAM\n");
174 return -ENODEV;
175 }
176
177 base = pci_resource_start(pdev_gpu, 2);
178 size = pci_resource_len(pdev_gpu, 2);
179
180 ldev->vram_base = base;
181 ldev->vram_size = size;
182 ldev->gpu = pdev_gpu;
183
184 drm_info(ddev, "Dedicated vram start: 0x%llx, size: %uMiB\n",
185 (u64)base, (u32)(size >> 20));
186
187 return (size > SZ_1M) ? 0 : -ENODEV;
188}
189
190static struct lsdc_device *
191lsdc_create_device(struct pci_dev *pdev,
192 const struct lsdc_desc *descp,
193 const struct drm_driver *driver)
194{
195 struct lsdc_device *ldev;
196 struct drm_device *ddev;
197 int ret;
198
199 ldev = devm_drm_dev_alloc(&pdev->dev, driver, struct lsdc_device, base);
200 if (IS_ERR(ldev))
201 return ldev;
202
203 ldev->dc = pdev;
204 ldev->descp = descp;
205
206 ddev = &ldev->base;
207
208 loongson_gfxpll_create(ddev, &ldev->gfxpll);
209
210 ret = lsdc_get_dedicated_vram(ldev, pdev, descp);
211 if (ret) {
212 drm_err(ddev, "Init VRAM failed: %d\n", ret);
213 return ERR_PTR(ret);
214 }
215
216 ret = drm_aperture_remove_conflicting_framebuffers(ldev->vram_base,
217 ldev->vram_size,
218 driver);
219 if (ret) {
220 drm_err(ddev, "Remove firmware framebuffers failed: %d\n", ret);
221 return ERR_PTR(ret);
222 }
223
224 ret = lsdc_ttm_init(ldev);
225 if (ret) {
226 drm_err(ddev, "Memory manager init failed: %d\n", ret);
227 return ERR_PTR(ret);
228 }
229
230 lsdc_gem_init(ddev);
231
232 /* Bar 0 of the DC device contains the MMIO register's base address */
233 ldev->reg_base = pcim_iomap(pdev, 0, 0);
234 if (!ldev->reg_base)
235 return ERR_PTR(-ENODEV);
236
237 spin_lock_init(&ldev->reglock);
238
239 ret = lsdc_mode_config_init(ddev, descp);
240 if (ret)
241 return ERR_PTR(ret);
242
243 ret = lsdc_modeset_init(ldev, descp->num_of_crtc, descp->funcs,
244 loongson_vblank);
245 if (ret)
246 return ERR_PTR(ret);
247
248 drm_mode_config_reset(ddev);
249
250 return ldev;
251}
252
253/* For multiple GPU driver instance co-exixt in the system */
254
255static unsigned int lsdc_vga_set_decode(struct pci_dev *pdev, bool state)
256{
257 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
258}
259
260static int lsdc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
261{
262 const struct lsdc_desc *descp;
263 struct drm_device *ddev;
264 struct lsdc_device *ldev;
265 int ret;
266
267 descp = lsdc_device_probe(pdev, ent->driver_data);
268 if (IS_ERR_OR_NULL(descp))
269 return -ENODEV;
270
271 pci_set_master(pdev);
272
273 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
274 if (ret)
275 return ret;
276
277 ret = pcim_enable_device(pdev);
278 if (ret)
279 return ret;
280
281 dev_info(&pdev->dev, "Found %s, revision: %u",
282 to_loongson_gfx(descp)->model, pdev->revision);
283
284 ldev = lsdc_create_device(pdev, descp, &lsdc_drm_driver);
285 if (IS_ERR(ldev))
286 return PTR_ERR(ldev);
287
288 ddev = &ldev->base;
289
290 pci_set_drvdata(pdev, ddev);
291
292 vga_client_register(pdev, lsdc_vga_set_decode);
293
294 drm_kms_helper_poll_init(ddev);
295
296 if (loongson_vblank) {
297 ret = drm_vblank_init(ddev, descp->num_of_crtc);
298 if (ret)
299 return ret;
300
301 ret = devm_request_irq(&pdev->dev, pdev->irq,
302 descp->funcs->irq_handler,
303 IRQF_SHARED,
304 dev_name(&pdev->dev), ddev);
305 if (ret) {
306 drm_err(ddev, "Failed to register interrupt: %d\n", ret);
307 return ret;
308 }
309
310 drm_info(ddev, "registered irq: %u\n", pdev->irq);
311 }
312
313 ret = drm_dev_register(ddev, 0);
314 if (ret)
315 return ret;
316
317 drm_fbdev_generic_setup(ddev, 32);
318
319 return 0;
320}
321
322static void lsdc_pci_remove(struct pci_dev *pdev)
323{
324 struct drm_device *ddev = pci_get_drvdata(pdev);
325
326 drm_dev_unregister(ddev);
327 drm_atomic_helper_shutdown(ddev);
328}
329
330static void lsdc_pci_shutdown(struct pci_dev *pdev)
331{
332 drm_atomic_helper_shutdown(pci_get_drvdata(pdev));
333}
334
335static int lsdc_drm_freeze(struct drm_device *ddev)
336{
337 struct lsdc_device *ldev = to_lsdc(ddev);
338 struct lsdc_bo *lbo;
339 int ret;
340
341 /* unpin all of buffers in the VRAM */
342 mutex_lock(&ldev->gem.mutex);
343 list_for_each_entry(lbo, &ldev->gem.objects, list) {
344 struct ttm_buffer_object *tbo = &lbo->tbo;
345 struct ttm_resource *resource = tbo->resource;
346 unsigned int pin_count = tbo->pin_count;
347
348 drm_dbg(ddev, "bo[%p], size: %zuKiB, type: %s, pin count: %u\n",
349 lbo, lsdc_bo_size(lbo) >> 10,
350 lsdc_mem_type_to_str(resource->mem_type), pin_count);
351
352 if (!pin_count)
353 continue;
354
355 if (resource->mem_type == TTM_PL_VRAM) {
356 ret = lsdc_bo_reserve(lbo);
357 if (unlikely(ret)) {
358 drm_err(ddev, "bo reserve failed: %d\n", ret);
359 continue;
360 }
361
362 do {
363 lsdc_bo_unpin(lbo);
364 --pin_count;
365 } while (pin_count);
366
367 lsdc_bo_unreserve(lbo);
368 }
369 }
370 mutex_unlock(&ldev->gem.mutex);
371
372 lsdc_bo_evict_vram(ddev);
373
374 ret = drm_mode_config_helper_suspend(ddev);
375 if (unlikely(ret)) {
376 drm_err(ddev, "Freeze error: %d", ret);
377 return ret;
378 }
379
380 return 0;
381}
382
383static int lsdc_drm_resume(struct device *dev)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct drm_device *ddev = pci_get_drvdata(pdev);
387
388 return drm_mode_config_helper_resume(ddev);
389}
390
391static int lsdc_pm_freeze(struct device *dev)
392{
393 struct pci_dev *pdev = to_pci_dev(dev);
394 struct drm_device *ddev = pci_get_drvdata(pdev);
395
396 return lsdc_drm_freeze(ddev);
397}
398
399static int lsdc_pm_thaw(struct device *dev)
400{
401 return lsdc_drm_resume(dev);
402}
403
404static int lsdc_pm_suspend(struct device *dev)
405{
406 struct pci_dev *pdev = to_pci_dev(dev);
407 int error;
408
409 error = lsdc_pm_freeze(dev);
410 if (error)
411 return error;
412
413 pci_save_state(pdev);
414 /* Shut down the device */
415 pci_disable_device(pdev);
416 pci_set_power_state(pdev, PCI_D3hot);
417
418 return 0;
419}
420
421static int lsdc_pm_resume(struct device *dev)
422{
423 struct pci_dev *pdev = to_pci_dev(dev);
424
425 pci_set_power_state(pdev, PCI_D0);
426
427 pci_restore_state(pdev);
428
429 if (pcim_enable_device(pdev))
430 return -EIO;
431
432 return lsdc_pm_thaw(dev);
433}
434
435static const struct dev_pm_ops lsdc_pm_ops = {
436 .suspend = lsdc_pm_suspend,
437 .resume = lsdc_pm_resume,
438 .freeze = lsdc_pm_freeze,
439 .thaw = lsdc_pm_thaw,
440 .poweroff = lsdc_pm_freeze,
441 .restore = lsdc_pm_resume,
442};
443
444static const struct pci_device_id lsdc_pciid_list[] = {
445 {PCI_VDEVICE(LOONGSON, 0x7a06), CHIP_LS7A1000},
446 {PCI_VDEVICE(LOONGSON, 0x7a36), CHIP_LS7A2000},
447 { }
448};
449
450struct pci_driver lsdc_pci_driver = {
451 .name = DRIVER_NAME,
452 .id_table = lsdc_pciid_list,
453 .probe = lsdc_pci_probe,
454 .remove = lsdc_pci_remove,
455 .shutdown = lsdc_pci_shutdown,
456 .driver.pm = &lsdc_pm_ops,
457};
458
459MODULE_DEVICE_TABLE(pci, lsdc_pciid_list);
460MODULE_AUTHOR(DRIVER_AUTHOR);
461MODULE_DESCRIPTION(DRIVER_DESC);
462MODULE_LICENSE("GPL");