1# SPDX-License-Identifier: GPL-2.0-only
 2config DRM_CDNS_DSI
 3	tristate "Cadence DPI/DSI bridge"
 4	select DRM_KMS_HELPER
 5	select DRM_MIPI_DSI
 6	select DRM_PANEL_BRIDGE
 7	select GENERIC_PHY
 8	select GENERIC_PHY_MIPI_DPHY
 9	depends on OF
10	help
11	  Support Cadence DPI to DSI bridge. This is an internal
12	  bridge and is meant to be directly embedded in a SoC.
13
14if DRM_CDNS_DSI
15
16config DRM_CDNS_DSI_J721E
17	bool "J721E Cadence DSI wrapper support"
18	default y
19	help
20	  Support J721E Cadence DSI wrapper. The wrapper manages
21	  the routing of the DSS DPI signal to the Cadence DSI.
22endif
23
24config DRM_CDNS_MHDP8546
25	tristate "Cadence DPI/DP bridge"
26	select DRM_DISPLAY_DP_HELPER
27	select DRM_DISPLAY_HDCP_HELPER
28	select DRM_DISPLAY_HELPER
29	select DRM_KMS_HELPER
30	select DRM_PANEL_BRIDGE
31	depends on OF
32	help
33	  Support Cadence DPI to DP bridge. This is an internal
34	  bridge and is meant to be directly embedded in a SoC.
35	  It takes a DPI stream as input and outputs it encoded
36	  in DP format.
37
38if DRM_CDNS_MHDP8546
39
40config DRM_CDNS_MHDP8546_J721E
41	depends on ARCH_K3 || COMPILE_TEST
42	bool "J721E Cadence DPI/DP wrapper support"
43	default y
44	help
45	  Support J721E Cadence DPI/DP wrapper. This is a wrapper
46	  which adds support for J721E related platform ops. It
47	  initializes the J721E Display Port and sets up the
48	  clock and data muxes.
49endif