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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright 2023 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27#ifndef _DCN35_PG_CNTL_H_
28#define _DCN35_PG_CNTL_H_
29
30#include "pg_cntl.h"
31
32#define PG_CNTL_REG_LIST_DCN35()\
33 SR(DOMAIN0_PG_CONFIG), \
34 SR(DOMAIN1_PG_CONFIG), \
35 SR(DOMAIN2_PG_CONFIG), \
36 SR(DOMAIN3_PG_CONFIG), \
37 SR(DOMAIN16_PG_CONFIG), \
38 SR(DOMAIN17_PG_CONFIG), \
39 SR(DOMAIN18_PG_CONFIG), \
40 SR(DOMAIN19_PG_CONFIG), \
41 SR(DOMAIN22_PG_CONFIG), \
42 SR(DOMAIN23_PG_CONFIG), \
43 SR(DOMAIN24_PG_CONFIG), \
44 SR(DOMAIN25_PG_CONFIG), \
45 SR(DOMAIN0_PG_STATUS), \
46 SR(DOMAIN1_PG_STATUS), \
47 SR(DOMAIN2_PG_STATUS), \
48 SR(DOMAIN3_PG_STATUS), \
49 SR(DOMAIN16_PG_STATUS), \
50 SR(DOMAIN17_PG_STATUS), \
51 SR(DOMAIN18_PG_STATUS), \
52 SR(DOMAIN19_PG_STATUS), \
53 SR(DOMAIN22_PG_STATUS), \
54 SR(DOMAIN23_PG_STATUS), \
55 SR(DOMAIN24_PG_STATUS), \
56 SR(DOMAIN25_PG_STATUS), \
57 SR(DC_IP_REQUEST_CNTL)
58
59#define PG_CNTL_SF(reg_name, field_name, post_fix)\
60 .field_name = reg_name ## __ ## field_name ## post_fix
61
62#define PG_CNTL_MASK_SH_LIST_DCN35(mask_sh) \
63 PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
64 PG_CNTL_SF(DOMAIN0_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
65 PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
66 PG_CNTL_SF(DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
67 PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
68 PG_CNTL_SF(DOMAIN2_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
69 PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
70 PG_CNTL_SF(DOMAIN3_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
71 PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
72 PG_CNTL_SF(DOMAIN16_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
73 PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
74 PG_CNTL_SF(DOMAIN17_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
75 PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
76 PG_CNTL_SF(DOMAIN18_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
77 PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
78 PG_CNTL_SF(DOMAIN19_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
79 PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
80 PG_CNTL_SF(DOMAIN22_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
81 PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
82 PG_CNTL_SF(DOMAIN23_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
83 PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
84 PG_CNTL_SF(DOMAIN24_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
85 PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_FORCEON, mask_sh), \
86 PG_CNTL_SF(DOMAIN25_PG_CONFIG, DOMAIN_POWER_GATE, mask_sh), \
87 PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
88 PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
89 PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
90 PG_CNTL_SF(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
91 PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
92 PG_CNTL_SF(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
93 PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
94 PG_CNTL_SF(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
95 PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
96 PG_CNTL_SF(DOMAIN16_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
97 PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
98 PG_CNTL_SF(DOMAIN17_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
99 PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
100 PG_CNTL_SF(DOMAIN18_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
101 PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
102 PG_CNTL_SF(DOMAIN19_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
103 PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
104 PG_CNTL_SF(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
105 PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
106 PG_CNTL_SF(DOMAIN23_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
107 PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
108 PG_CNTL_SF(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
109 PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
110 PG_CNTL_SF(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
111 PG_CNTL_SF(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
112
113#define PG_CNTL_REG_FIELD_LIST(type) \
114 type IPS2;\
115 type IPS1;\
116 type IPS0;\
117 type IPS0_All
118
119#define PG_CNTL_DCN35_REG_FIELD_LIST(type) \
120 type IP_REQUEST_EN; \
121 type DOMAIN_POWER_FORCEON; \
122 type DOMAIN_POWER_GATE; \
123 type DOMAIN_DESIRED_PWR_STATE; \
124 type DOMAIN_PGFSM_PWR_STATUS
125
126struct pg_cntl_shift {
127 PG_CNTL_REG_FIELD_LIST(uint8_t);
128 PG_CNTL_DCN35_REG_FIELD_LIST(uint8_t);
129};
130
131struct pg_cntl_mask {
132 PG_CNTL_REG_FIELD_LIST(uint32_t);
133 PG_CNTL_DCN35_REG_FIELD_LIST(uint32_t);
134};
135
136struct pg_cntl_registers {
137 uint32_t LONO_STATE;
138 uint32_t DC_IP_REQUEST_CNTL;
139 uint32_t DOMAIN0_PG_CONFIG;
140 uint32_t DOMAIN1_PG_CONFIG;
141 uint32_t DOMAIN2_PG_CONFIG;
142 uint32_t DOMAIN3_PG_CONFIG;
143 uint32_t DOMAIN16_PG_CONFIG;
144 uint32_t DOMAIN17_PG_CONFIG;
145 uint32_t DOMAIN18_PG_CONFIG;
146 uint32_t DOMAIN19_PG_CONFIG;
147 uint32_t DOMAIN22_PG_CONFIG;
148 uint32_t DOMAIN23_PG_CONFIG;
149 uint32_t DOMAIN24_PG_CONFIG;
150 uint32_t DOMAIN25_PG_CONFIG;
151 uint32_t DOMAIN0_PG_STATUS;
152 uint32_t DOMAIN1_PG_STATUS;
153 uint32_t DOMAIN2_PG_STATUS;
154 uint32_t DOMAIN3_PG_STATUS;
155 uint32_t DOMAIN16_PG_STATUS;
156 uint32_t DOMAIN17_PG_STATUS;
157 uint32_t DOMAIN18_PG_STATUS;
158 uint32_t DOMAIN19_PG_STATUS;
159 uint32_t DOMAIN22_PG_STATUS;
160 uint32_t DOMAIN23_PG_STATUS;
161 uint32_t DOMAIN24_PG_STATUS;
162 uint32_t DOMAIN25_PG_STATUS;
163};
164
165struct dcn_pg_cntl {
166 struct pg_cntl base;
167 const struct pg_cntl_registers *regs;
168 const struct pg_cntl_shift *pg_cntl_shift;
169 const struct pg_cntl_mask *pg_cntl_mask;
170};
171
172void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
173void pg_cntl35_hubp_dpp_pg_control(struct pg_cntl *pg_cntl,
174 unsigned int hubp_dpp_inst, bool power_on);
175void pg_cntl35_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on);
176void pg_cntl35_io_clk_pg_control(struct pg_cntl *pg_cntl, bool power_on);
177void pg_cntl35_plane_otg_pg_control(struct pg_cntl *pg_cntl, bool power_on);
178void pg_cntl35_mpcc_pg_control(struct pg_cntl *pg_cntl,
179 unsigned int mpcc_inst, bool power_on);
180void pg_cntl35_opp_pg_control(struct pg_cntl *pg_cntl,
181 unsigned int opp_inst, bool power_on);
182void pg_cntl35_optc_pg_control(struct pg_cntl *pg_cntl,
183 unsigned int optc_inst, bool power_on);
184void pg_cntl35_dwb_pg_control(struct pg_cntl *pg_cntl, bool power_on);
185void pg_cntl35_init_pg_status(struct pg_cntl *pg_cntl);
186
187struct pg_cntl *pg_cntl35_create(
188 struct dc_context *ctx,
189 const struct pg_cntl_registers *regs,
190 const struct pg_cntl_shift *pg_cntl_shift,
191 const struct pg_cntl_mask *pg_cntl_mask);
192
193void dcn_pg_cntl_destroy(struct pg_cntl **pg_cntl);
194
195#endif /* DCN35_PG_CNTL */