1/*
  2 * Copyright 2014 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 */
 22
 23/* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
 24
 25#ifndef AMDGPU_AMDKFD_H_INCLUDED
 26#define AMDGPU_AMDKFD_H_INCLUDED
 27
 28#include <linux/list.h>
 29#include <linux/types.h>
 30#include <linux/mm.h>
 31#include <linux/kthread.h>
 32#include <linux/workqueue.h>
 33#include <linux/mmu_notifier.h>
 34#include <linux/memremap.h>
 35#include <kgd_kfd_interface.h>
 36#include <drm/drm_client.h>
 37#include "amdgpu_sync.h"
 38#include "amdgpu_vm.h"
 39#include "amdgpu_xcp.h"
 40
 41extern uint64_t amdgpu_amdkfd_total_mem_size;
 42
 43enum TLB_FLUSH_TYPE {
 44	TLB_FLUSH_LEGACY = 0,
 45	TLB_FLUSH_LIGHTWEIGHT,
 46	TLB_FLUSH_HEAVYWEIGHT
 47};
 48
 49struct amdgpu_device;
 50
 51enum kfd_mem_attachment_type {
 52	KFD_MEM_ATT_SHARED,	/* Share kgd_mem->bo or another attachment's */
 53	KFD_MEM_ATT_USERPTR,	/* SG bo to DMA map pages from a userptr bo */
 54	KFD_MEM_ATT_DMABUF,	/* DMAbuf to DMA map TTM BOs */
 55	KFD_MEM_ATT_SG		/* Tag to DMA map SG BOs */
 56};
 57
 58struct kfd_mem_attachment {
 59	struct list_head list;
 60	enum kfd_mem_attachment_type type;
 61	bool is_mapped;
 62	struct amdgpu_bo_va *bo_va;
 63	struct amdgpu_device *adev;
 64	uint64_t va;
 65	uint64_t pte_flags;
 66};
 67
 68struct kgd_mem {
 69	struct mutex lock;
 70	struct amdgpu_bo *bo;
 71	struct dma_buf *dmabuf;
 72	struct hmm_range *range;
 73	struct list_head attachments;
 74	/* protected by amdkfd_process_info.lock */
 75	struct list_head validate_list;
 76	uint32_t domain;
 77	unsigned int mapped_to_gpu_memory;
 78	uint64_t va;
 79
 80	uint32_t alloc_flags;
 81
 82	uint32_t invalid;
 83	struct amdkfd_process_info *process_info;
 84
 85	struct amdgpu_sync sync;
 86
 87	uint32_t gem_handle;
 88	bool aql_queue;
 89	bool is_imported;
 90};
 91
 92/* KFD Memory Eviction */
 93struct amdgpu_amdkfd_fence {
 94	struct dma_fence base;
 95	struct mm_struct *mm;
 96	spinlock_t lock;
 97	char timeline_name[TASK_COMM_LEN];
 98	struct svm_range_bo *svm_bo;
 99};
100
101struct amdgpu_kfd_dev {
102	struct kfd_dev *dev;
103	int64_t vram_used[MAX_XCP];
104	uint64_t vram_used_aligned[MAX_XCP];
105	bool init_complete;
106	struct work_struct reset_work;
107
108	/* HMM page migration MEMORY_DEVICE_PRIVATE mapping */
109	struct dev_pagemap pgmap;
110
111	/* Client for KFD BO GEM handle allocations */
112	struct drm_client_dev client;
113};
114
115enum kgd_engine_type {
116	KGD_ENGINE_PFP = 1,
117	KGD_ENGINE_ME,
118	KGD_ENGINE_CE,
119	KGD_ENGINE_MEC1,
120	KGD_ENGINE_MEC2,
121	KGD_ENGINE_RLC,
122	KGD_ENGINE_SDMA1,
123	KGD_ENGINE_SDMA2,
124	KGD_ENGINE_MAX
125};
126
127
128struct amdkfd_process_info {
129	/* List head of all VMs that belong to a KFD process */
130	struct list_head vm_list_head;
131	/* List head for all KFD BOs that belong to a KFD process. */
132	struct list_head kfd_bo_list;
133	/* List of userptr BOs that are valid or invalid */
134	struct list_head userptr_valid_list;
135	struct list_head userptr_inval_list;
136	/* Lock to protect kfd_bo_list */
137	struct mutex lock;
138
139	/* Number of VMs */
140	unsigned int n_vms;
141	/* Eviction Fence */
142	struct amdgpu_amdkfd_fence *eviction_fence;
143
144	/* MMU-notifier related fields */
145	struct mutex notifier_lock;
146	uint32_t evicted_bos;
147	struct delayed_work restore_userptr_work;
148	struct pid *pid;
149	bool block_mmu_notifications;
150};
151
152int amdgpu_amdkfd_init(void);
153void amdgpu_amdkfd_fini(void);
154
155void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm);
156int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm);
157void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
158			const void *ih_ring_entry);
159void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
160void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
161void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
162int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev);
163void amdgpu_amdkfd_unlock_kfd(struct amdgpu_device *adev);
164int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
165				enum kgd_engine_type engine,
166				uint32_t vmid, uint64_t gpu_addr,
167				uint32_t *ib_cmd, uint32_t ib_len);
168void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
169bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
170
171bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
172
173int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);
174
175int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
176
177void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
178
179int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
180					int queue_bit);
181
182struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
183				struct mm_struct *mm,
184				struct svm_range_bo *svm_bo);
185
186int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
187#if defined(CONFIG_DEBUG_FS)
188int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
189#endif
190#if IS_ENABLED(CONFIG_HSA_AMD)
191bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
192struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
193int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo);
194int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
195				unsigned long cur_seq, struct kgd_mem *mem);
196int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
197					uint32_t domain,
198					struct dma_fence *fence);
199#else
200static inline
201bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
202{
203	return false;
204}
205
206static inline
207struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
208{
209	return NULL;
210}
211
212static inline
213int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo)
214{
215	return 0;
216}
217
218static inline
219int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
220				unsigned long cur_seq, struct kgd_mem *mem)
221{
222	return 0;
223}
224static inline
225int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
226					uint32_t domain,
227					struct dma_fence *fence)
228{
229	return 0;
230}
231#endif
232/* Shared API */
233int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,
234				void **mem_obj, uint64_t *gpu_addr,
235				void **cpu_ptr, bool mqd_gfx9);
236void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj);
237int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
238				void **mem_obj);
239void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
240int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
241int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
242uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,
243				      enum kgd_engine_type type);
244void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
245				      struct kfd_local_mem_info *mem_info,
246				      struct amdgpu_xcp *xcp);
247uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);
248
249uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);
250int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
251				  struct amdgpu_device **dmabuf_adev,
252				  uint64_t *bo_size, void *metadata_buffer,
253				  size_t buffer_size, uint32_t *metadata_size,
254				  uint32_t *flags, int8_t *xcp_id);
255uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
256					  struct amdgpu_device *src);
257int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,
258					    struct amdgpu_device *src,
259					    bool is_min);
260int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);
261int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,
262					uint32_t *payload);
263int amdgpu_amdkfd_unmap_hiq(struct amdgpu_device *adev, u32 doorbell_off,
264				u32 inst);
265
266/* Read user wptr from a specified user address space with page fault
267 * disabled. The memory must be pinned and mapped to the hardware when
268 * this is called in hqd_load functions, so it should never fault in
269 * the first place. This resolves a circular lock dependency involving
270 * four locks, including the DQM lock and mmap_lock.
271 */
272#define read_user_wptr(mmptr, wptr, dst)				\
273	({								\
274		bool valid = false;					\
275		if ((mmptr) && (wptr)) {				\
276			pagefault_disable();				\
277			if ((mmptr) == current->mm) {			\
278				valid = !get_user((dst), (wptr));	\
279			} else if (current->flags & PF_KTHREAD) {	\
280				kthread_use_mm(mmptr);			\
281				valid = !get_user((dst), (wptr));	\
282				kthread_unuse_mm(mmptr);		\
283			}						\
284			pagefault_enable();				\
285		}							\
286		valid;							\
287	})
288
289/* GPUVM API */
290#define drm_priv_to_vm(drm_priv)					\
291	(&((struct amdgpu_fpriv *)					\
292		((struct drm_file *)(drm_priv))->driver_priv)->vm)
293
294int amdgpu_amdkfd_gpuvm_set_vm_pasid(struct amdgpu_device *adev,
295				     struct amdgpu_vm *avm, u32 pasid);
296int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
297					struct amdgpu_vm *avm,
298					void **process_info,
299					struct dma_fence **ef);
300void amdgpu_amdkfd_gpuvm_release_process_vm(struct amdgpu_device *adev,
301					void *drm_priv);
302uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);
303size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev,
304					uint8_t xcp_id);
305int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
306		struct amdgpu_device *adev, uint64_t va, uint64_t size,
307		void *drm_priv, struct kgd_mem **mem,
308		uint64_t *offset, uint32_t flags, bool criu_resume);
309int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
310		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,
311		uint64_t *size);
312int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev,
313					  struct kgd_mem *mem, void *drm_priv);
314int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
315		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
316int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
317int amdgpu_amdkfd_gpuvm_sync_memory(
318		struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
319int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,
320					     void **kptr, uint64_t *size);
321void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_mem *mem);
322
323int amdgpu_amdkfd_map_gtt_bo_to_gart(struct amdgpu_bo *bo);
324
325int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
326					    struct dma_fence __rcu **ef);
327int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,
328					      struct kfd_vm_fault_info *info);
329int amdgpu_amdkfd_gpuvm_import_dmabuf_fd(struct amdgpu_device *adev, int fd,
330					 uint64_t va, void *drm_priv,
331					 struct kgd_mem **mem, uint64_t *size,
332					 uint64_t *mmap_offset);
333int amdgpu_amdkfd_gpuvm_export_dmabuf(struct kgd_mem *mem,
334				      struct dma_buf **dmabuf);
335void amdgpu_amdkfd_debug_mem_fence(struct amdgpu_device *adev);
336int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,
337				struct tile_config *config);
338void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,
339			enum amdgpu_ras_block block, bool reset);
340bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
341bool amdgpu_amdkfd_bo_mapped_to_dev(struct amdgpu_device *adev, struct kgd_mem *mem);
342void amdgpu_amdkfd_block_mmu_notifications(void *p);
343int amdgpu_amdkfd_criu_resume(void *p);
344bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev);
345int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
346		uint64_t size, u32 alloc_flag, int8_t xcp_id);
347void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
348		uint64_t size, u32 alloc_flag, int8_t xcp_id);
349
350u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device *adev, int xcp_id);
351
352#define KFD_XCP_MEM_ID(adev, xcp_id) \
353		((adev)->xcp_mgr && (xcp_id) >= 0 ?\
354		(adev)->xcp_mgr->xcp[(xcp_id)].mem_id : -1)
355
356#define KFD_XCP_MEMORY_SIZE(adev, xcp_id) amdgpu_amdkfd_xcp_memory_size((adev), (xcp_id))
357
358
359#if IS_ENABLED(CONFIG_HSA_AMD)
360void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
361void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
362				struct amdgpu_vm *vm);
363
364/**
365 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released
366 *
367 * Allows KFD to release its resources associated with the GEM object.
368 */
369void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);
370void amdgpu_amdkfd_reserve_system_mem(uint64_t size);
371#else
372static inline
373void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
374{
375}
376
377static inline
378void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
379					struct amdgpu_vm *vm)
380{
381}
382
383static inline
384void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo)
385{
386}
387#endif
388
389#if IS_ENABLED(CONFIG_HSA_AMD_SVM)
390int kgd2kfd_init_zone_device(struct amdgpu_device *adev);
391#else
392static inline
393int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
394{
395	return 0;
396}
397#endif
398
399/* KGD2KFD callbacks */
400int kgd2kfd_quiesce_mm(struct mm_struct *mm, uint32_t trigger);
401int kgd2kfd_resume_mm(struct mm_struct *mm);
402int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
403						struct dma_fence *fence);
404#if IS_ENABLED(CONFIG_HSA_AMD)
405int kgd2kfd_init(void);
406void kgd2kfd_exit(void);
407struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);
408bool kgd2kfd_device_init(struct kfd_dev *kfd,
409			 const struct kgd2kfd_shared_resources *gpu_resources);
410void kgd2kfd_device_exit(struct kfd_dev *kfd);
411void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm);
412int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm);
413int kgd2kfd_pre_reset(struct kfd_dev *kfd);
414int kgd2kfd_post_reset(struct kfd_dev *kfd);
415void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
416void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
417void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask);
418int kgd2kfd_check_and_lock_kfd(void);
419void kgd2kfd_unlock_kfd(void);
420#else
421static inline int kgd2kfd_init(void)
422{
423	return -ENOENT;
424}
425
426static inline void kgd2kfd_exit(void)
427{
428}
429
430static inline
431struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
432{
433	return NULL;
434}
435
436static inline
437bool kgd2kfd_device_init(struct kfd_dev *kfd,
438				const struct kgd2kfd_shared_resources *gpu_resources)
439{
440	return false;
441}
442
443static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
444{
445}
446
447static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
448{
449}
450
451static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
452{
453	return 0;
454}
455
456static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd)
457{
458	return 0;
459}
460
461static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
462{
463	return 0;
464}
465
466static inline
467void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
468{
469}
470
471static inline
472void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
473{
474}
475
476static inline
477void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask)
478{
479}
480
481static inline int kgd2kfd_check_and_lock_kfd(void)
482{
483	return 0;
484}
485
486static inline void kgd2kfd_unlock_kfd(void)
487{
488}
489#endif
490#endif /* AMDGPU_AMDKFD_H_INCLUDED */