1/* SPDX-License-Identifier: GPL-2.0 */
  2/* Copyright(c) 2021 Intel Corporation. All rights rsvd. */
  3
  4#ifndef __IAA_CRYPTO_H__
  5#define __IAA_CRYPTO_H__
  6
  7#include <linux/crypto.h>
  8#include <linux/idxd.h>
  9#include <uapi/linux/idxd.h>
 10
 11#define IDXD_SUBDRIVER_NAME		"crypto"
 12
 13#define IAA_DECOMP_ENABLE		BIT(0)
 14#define IAA_DECOMP_FLUSH_OUTPUT		BIT(1)
 15#define IAA_DECOMP_CHECK_FOR_EOB	BIT(2)
 16#define IAA_DECOMP_STOP_ON_EOB		BIT(3)
 17#define IAA_DECOMP_SUPPRESS_OUTPUT	BIT(9)
 18
 19#define IAA_COMP_FLUSH_OUTPUT		BIT(1)
 20#define IAA_COMP_APPEND_EOB		BIT(2)
 21
 22#define IAA_COMPLETION_TIMEOUT		1000000
 23
 24#define IAA_ANALYTICS_ERROR		0x0a
 25#define IAA_ERROR_DECOMP_BUF_OVERFLOW	0x0b
 26#define IAA_ERROR_COMP_BUF_OVERFLOW	0x19
 27#define IAA_ERROR_WATCHDOG_EXPIRED	0x24
 28
 29#define IAA_COMP_MODES_MAX		2
 30
 31#define FIXED_HDR			0x2
 32#define FIXED_HDR_SIZE			3
 33
 34#define IAA_COMP_FLAGS			(IAA_COMP_FLUSH_OUTPUT | \
 35					 IAA_COMP_APPEND_EOB)
 36
 37#define IAA_DECOMP_FLAGS		(IAA_DECOMP_ENABLE |	   \
 38					 IAA_DECOMP_FLUSH_OUTPUT | \
 39					 IAA_DECOMP_CHECK_FOR_EOB | \
 40					 IAA_DECOMP_STOP_ON_EOB)
 41
 42/* Representation of IAA workqueue */
 43struct iaa_wq {
 44	struct list_head	list;
 45
 46	struct idxd_wq		*wq;
 47	int			ref;
 48	bool			remove;
 49
 50	struct iaa_device	*iaa_device;
 51
 52	u64			comp_calls;
 53	u64			comp_bytes;
 54	u64			decomp_calls;
 55	u64			decomp_bytes;
 56};
 57
 58struct iaa_device_compression_mode {
 59	const char			*name;
 60
 61	struct aecs_comp_table_record	*aecs_comp_table;
 62
 63	dma_addr_t			aecs_comp_table_dma_addr;
 64};
 65
 66/* Representation of IAA device with wqs, populated by probe */
 67struct iaa_device {
 68	struct list_head		list;
 69	struct idxd_device		*idxd;
 70
 71	struct iaa_device_compression_mode	*compression_modes[IAA_COMP_MODES_MAX];
 72
 73	int				n_wq;
 74	struct list_head		wqs;
 75
 76	u64				comp_calls;
 77	u64				comp_bytes;
 78	u64				decomp_calls;
 79	u64				decomp_bytes;
 80};
 81
 82struct wq_table_entry {
 83	struct idxd_wq **wqs;
 84	int	max_wqs;
 85	int	n_wqs;
 86	int	cur_wq;
 87};
 88
 89#define IAA_AECS_ALIGN			32
 90
 91/*
 92 * Analytics Engine Configuration and State (AECS) contains parameters and
 93 * internal state of the analytics engine.
 94 */
 95struct aecs_comp_table_record {
 96	u32 crc;
 97	u32 xor_checksum;
 98	u32 reserved0[5];
 99	u32 num_output_accum_bits;
100	u8 output_accum[256];
101	u32 ll_sym[286];
102	u32 reserved1;
103	u32 reserved2;
104	u32 d_sym[30];
105	u32 reserved_padding[2];
106} __packed;
107
108int iaa_aecs_init_fixed(void);
109void iaa_aecs_cleanup_fixed(void);
110
111typedef int (*iaa_dev_comp_init_fn_t) (struct iaa_device_compression_mode *mode);
112typedef int (*iaa_dev_comp_free_fn_t) (struct iaa_device_compression_mode *mode);
113
114struct iaa_compression_mode {
115	const char		*name;
116	u32			*ll_table;
117	int			ll_table_size;
118	u32			*d_table;
119	int			d_table_size;
120	iaa_dev_comp_init_fn_t	init;
121	iaa_dev_comp_free_fn_t	free;
122};
123
124int add_iaa_compression_mode(const char *name,
125			     const u32 *ll_table,
126			     int ll_table_size,
127			     const u32 *d_table,
128			     int d_table_size,
129			     iaa_dev_comp_init_fn_t init,
130			     iaa_dev_comp_free_fn_t free);
131
132void remove_iaa_compression_mode(const char *name);
133
134enum iaa_mode {
135	IAA_MODE_FIXED,
136};
137
138struct iaa_compression_ctx {
139	enum iaa_mode	mode;
140	bool		verify_compress;
141	bool		async_mode;
142	bool		use_irq;
143};
144
145extern struct list_head iaa_devices;
146extern struct mutex iaa_devices_lock;
147
148#endif