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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 | /* * arch/xtensa/kernel/vmlinux.lds.S * * Xtensa linker script * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2001 - 2008 Tensilica Inc. * * Chris Zankel <chris@zankel.net> * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca> * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> */ #define RO_EXCEPTION_TABLE_ALIGN 16 #include <asm-generic/vmlinux.lds.h> #include <asm/page.h> #include <asm/thread_info.h> #include <asm/core.h> #include <asm/vectors.h> OUTPUT_ARCH(xtensa) ENTRY(_start) #ifdef __XTENSA_EB__ jiffies = jiffies_64 + 4; #else jiffies = jiffies_64; #endif /* Note: In the following macros, it would be nice to specify only the vector name and section kind and construct "sym" and "section" using CPP concatenation, but that does not work reliably. Concatenating a string with "." produces an invalid token. CPP will not print a warning because it thinks this is an assembly file, but it leaves them as multiple tokens and there may or may not be whitespace between them. */ /* Macro for a relocation entry */ #define RELOCATE_ENTRY(sym, section) \ LONG(sym ## _start); \ LONG(sym ## _end); \ LONG(LOADADDR(section)) #if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE #define MERGED_VECTORS 1 #else #define MERGED_VECTORS 0 #endif /* * Macro to define a section for a vector. When MERGED_VECTORS is 0 * code for every vector is located with other init data. At startup * time head.S copies code for every vector to its final position according * to description recorded in the corresponding RELOCATE_ENTRY. */ #define SECTION_VECTOR4(sym, section, addr, prevsec) \ section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \ { \ . = ALIGN(4); \ sym ## _start = ABSOLUTE(.); \ *(section) \ sym ## _end = ABSOLUTE(.); \ } #define SECTION_VECTOR2(section, addr) \ . = addr; \ *(section) /* * Mapping of input sections to output sections when linking. */ SECTIONS { . = KERNELOFFSET; /* .text section */ _text = .; _stext = .; .text : { /* The HEAD_TEXT section must be the first section! */ HEAD_TEXT #if MERGED_VECTORS . = ALIGN(PAGE_SIZE); _vecbase = .; #ifdef SUPPORT_WINDOWED SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR) #endif #if XCHAL_EXCM_LEVEL >= 2 SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR) #endif #if XCHAL_EXCM_LEVEL >= 3 SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR) #endif #if XCHAL_EXCM_LEVEL >= 4 SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR) #endif #if XCHAL_EXCM_LEVEL >= 5 SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR) #endif #if XCHAL_EXCM_LEVEL >= 6 SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR) #endif SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR) SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR) SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) *(.exception.text) *(.xiptext) #endif IRQENTRY_TEXT SOFTIRQENTRY_TEXT ENTRY_TEXT TEXT_TEXT SCHED_TEXT LOCK_TEXT *(.fixup) } _etext = .; PROVIDE (etext = .); . = ALIGN(16); RO_DATA(4096) /* Data section */ #ifdef CONFIG_XIP_KERNEL INIT_TEXT_SECTION(PAGE_SIZE) #else _sdata = .; RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE) _edata = .; /* Initialization code and data: */ . = ALIGN(PAGE_SIZE); __init_begin = .; INIT_TEXT_SECTION(PAGE_SIZE) .init.data : { INIT_DATA } #endif .init.rodata : { . = ALIGN(0x4); __tagtable_begin = .; *(.taglist) __tagtable_end = .; . = ALIGN(16); __boot_reloc_table_start = ABSOLUTE(.); #if !MERGED_VECTORS #ifdef SUPPORT_WINDOWED RELOCATE_ENTRY(_WindowVectors_text, .WindowVectors.text); #endif #if XCHAL_EXCM_LEVEL >= 2 RELOCATE_ENTRY(_Level2InterruptVector_text, .Level2InterruptVector.text); #endif #if XCHAL_EXCM_LEVEL >= 3 RELOCATE_ENTRY(_Level3InterruptVector_text, .Level3InterruptVector.text); #endif #if XCHAL_EXCM_LEVEL >= 4 RELOCATE_ENTRY(_Level4InterruptVector_text, .Level4InterruptVector.text); #endif #if XCHAL_EXCM_LEVEL >= 5 RELOCATE_ENTRY(_Level5InterruptVector_text, .Level5InterruptVector.text); #endif #if XCHAL_EXCM_LEVEL >= 6 RELOCATE_ENTRY(_Level6InterruptVector_text, .Level6InterruptVector.text); #endif RELOCATE_ENTRY(_KernelExceptionVector_text, .KernelExceptionVector.text); RELOCATE_ENTRY(_UserExceptionVector_text, .UserExceptionVector.text); RELOCATE_ENTRY(_DoubleExceptionVector_text, .DoubleExceptionVector.text); RELOCATE_ENTRY(_DebugInterruptVector_text, .DebugInterruptVector.text); RELOCATE_ENTRY(_exception_text, .exception.text); #ifdef CONFIG_XIP_KERNEL RELOCATE_ENTRY(_xip_text, .xiptext); #endif #endif #ifdef CONFIG_XIP_KERNEL RELOCATE_ENTRY(_xip_data, .data); RELOCATE_ENTRY(_xip_init_data, .init.data); #endif #if defined(CONFIG_SECONDARY_RESET_VECTOR) RELOCATE_ENTRY(_SecondaryResetVector_text, .SecondaryResetVector.text); #endif __boot_reloc_table_end = ABSOLUTE(.) ; INIT_SETUP(XCHAL_ICACHE_LINESIZE) INIT_CALLS CON_INITCALL INIT_RAM_FS } PERCPU_SECTION(XCHAL_ICACHE_LINESIZE) /* We need this dummy segment here */ . = ALIGN(4); .dummy : { LONG(0) } #undef LAST #define LAST .dummy #if !MERGED_VECTORS /* The vectors are relocated to the real position at startup time */ #ifdef SUPPORT_WINDOWED SECTION_VECTOR4 (_WindowVectors_text, .WindowVectors.text, WINDOW_VECTORS_VADDR, LAST) #undef LAST #define LAST .WindowVectors.text #endif SECTION_VECTOR4 (_DebugInterruptVector_text, .DebugInterruptVector.text, DEBUG_VECTOR_VADDR, LAST) #undef LAST #define LAST .DebugInterruptVector.text #if XCHAL_EXCM_LEVEL >= 2 SECTION_VECTOR4 (_Level2InterruptVector_text, .Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR, LAST) # undef LAST # define LAST .Level2InterruptVector.text #endif #if XCHAL_EXCM_LEVEL >= 3 SECTION_VECTOR4 (_Level3InterruptVector_text, .Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR, LAST) # undef LAST # define LAST .Level3InterruptVector.text #endif #if XCHAL_EXCM_LEVEL >= 4 SECTION_VECTOR4 (_Level4InterruptVector_text, .Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR, LAST) # undef LAST # define LAST .Level4InterruptVector.text #endif #if XCHAL_EXCM_LEVEL >= 5 SECTION_VECTOR4 (_Level5InterruptVector_text, .Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR, LAST) # undef LAST # define LAST .Level5InterruptVector.text #endif #if XCHAL_EXCM_LEVEL >= 6 SECTION_VECTOR4 (_Level6InterruptVector_text, .Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR, LAST) # undef LAST # define LAST .Level6InterruptVector.text #endif SECTION_VECTOR4 (_KernelExceptionVector_text, .KernelExceptionVector.text, KERNEL_VECTOR_VADDR, LAST) #undef LAST SECTION_VECTOR4 (_UserExceptionVector_text, .UserExceptionVector.text, USER_VECTOR_VADDR, .KernelExceptionVector.text) SECTION_VECTOR4 (_DoubleExceptionVector_text, .DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR, .UserExceptionVector.text) #define LAST .DoubleExceptionVector.text #endif #if defined(CONFIG_SECONDARY_RESET_VECTOR) SECTION_VECTOR4 (_SecondaryResetVector_text, .SecondaryResetVector.text, RESET_VECTOR1_VADDR, LAST) #undef LAST #define LAST .SecondaryResetVector.text #endif #if !MERGED_VECTORS SECTION_VECTOR4 (_exception_text, .exception.text, , LAST) #undef LAST #define LAST .exception.text SECTION_VECTOR4 (_xip_text, .xiptext, , LAST) #undef LAST #define LAST .xiptext #endif . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3; .dummy1 : AT(ADDR(.dummy1)) { LONG(0) } . = ALIGN(PAGE_SIZE); #ifndef CONFIG_XIP_KERNEL __init_end = .; BSS_SECTION(0, 8192, 0) #endif _end = .; #ifdef CONFIG_XIP_KERNEL . = CONFIG_XIP_DATA_ADDR; _xip_start = .; #undef LOAD_OFFSET #define LOAD_OFFSET \ (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3) _xip_data_start = .; _sdata = .; RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE) _edata = .; _xip_data_end = .; /* Initialization data: */ STRUCT_ALIGN(); _xip_init_data_start = .; __init_begin = .; .init.data : { INIT_DATA } _xip_init_data_end = .; __init_end = .; BSS_SECTION(0, 8192, 0) _xip_end = .; #undef LOAD_OFFSET #endif DWARF_DEBUG .xt.prop 0 : { KEEP(*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*)) } .xt.insn 0 : { KEEP(*(.xt.insn .xt.insn.* .gnu.linkonce.x*)) } .xt.lit 0 : { KEEP(*(.xt.lit .xt.lit.* .gnu.linkonce.p*)) } /* Sections to be discarded */ DISCARDS } |