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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 | // SPDX-License-Identifier: GPL-2.0-or-later #include <linux/bug.h> #include <linux/compiler.h> #include <linux/export.h> #include <linux/percpu.h> #include <linux/processor.h> #include <linux/smp.h> #include <linux/topology.h> #include <linux/sched/clock.h> #include <asm/qspinlock.h> #include <asm/paravirt.h> #define MAX_NODES 4 struct qnode { struct qnode *next; struct qspinlock *lock; int cpu; u8 sleepy; /* 1 if the previous vCPU was preempted or * if the previous node was sleepy */ u8 locked; /* 1 if lock acquired */ }; struct qnodes { int count; struct qnode nodes[MAX_NODES]; }; /* Tuning parameters */ static int steal_spins __read_mostly = (1 << 5); static int remote_steal_spins __read_mostly = (1 << 2); #if _Q_SPIN_TRY_LOCK_STEAL == 1 static const bool maybe_stealers = true; #else static bool maybe_stealers __read_mostly = true; #endif static int head_spins __read_mostly = (1 << 8); static bool pv_yield_owner __read_mostly = true; static bool pv_yield_allow_steal __read_mostly = false; static bool pv_spin_on_preempted_owner __read_mostly = false; static bool pv_sleepy_lock __read_mostly = true; static bool pv_sleepy_lock_sticky __read_mostly = false; static u64 pv_sleepy_lock_interval_ns __read_mostly = 0; static int pv_sleepy_lock_factor __read_mostly = 256; static bool pv_yield_prev __read_mostly = true; static bool pv_yield_sleepy_owner __read_mostly = true; static bool pv_prod_head __read_mostly = false; static DEFINE_PER_CPU_ALIGNED(struct qnodes, qnodes); static DEFINE_PER_CPU_ALIGNED(u64, sleepy_lock_seen_clock); #if _Q_SPIN_SPEC_BARRIER == 1 #define spec_barrier() do { asm volatile("ori 31,31,0" ::: "memory"); } while (0) #else #define spec_barrier() do { } while (0) #endif static __always_inline bool recently_sleepy(void) { /* pv_sleepy_lock is true when this is called */ if (pv_sleepy_lock_interval_ns) { u64 seen = this_cpu_read(sleepy_lock_seen_clock); if (seen) { u64 delta = sched_clock() - seen; if (delta < pv_sleepy_lock_interval_ns) return true; this_cpu_write(sleepy_lock_seen_clock, 0); } } return false; } static __always_inline int get_steal_spins(bool paravirt, bool sleepy) { if (paravirt && sleepy) return steal_spins * pv_sleepy_lock_factor; else return steal_spins; } static __always_inline int get_remote_steal_spins(bool paravirt, bool sleepy) { if (paravirt && sleepy) return remote_steal_spins * pv_sleepy_lock_factor; else return remote_steal_spins; } static __always_inline int get_head_spins(bool paravirt, bool sleepy) { if (paravirt && sleepy) return head_spins * pv_sleepy_lock_factor; else return head_spins; } static inline u32 encode_tail_cpu(int cpu) { return (cpu + 1) << _Q_TAIL_CPU_OFFSET; } static inline int decode_tail_cpu(u32 val) { return (val >> _Q_TAIL_CPU_OFFSET) - 1; } static inline int get_owner_cpu(u32 val) { return (val & _Q_OWNER_CPU_MASK) >> _Q_OWNER_CPU_OFFSET; } /* * Try to acquire the lock if it was not already locked. If the tail matches * mytail then clear it, otherwise leave it unchnaged. Return previous value. * * This is used by the head of the queue to acquire the lock and clean up * its tail if it was the last one queued. */ static __always_inline u32 trylock_clean_tail(struct qspinlock *lock, u32 tail) { u32 newval = queued_spin_encode_locked_val(); u32 prev, tmp; asm volatile( "1: lwarx %0,0,%2,%7 # trylock_clean_tail \n" /* This test is necessary if there could be stealers */ " andi. %1,%0,%5 \n" " bne 3f \n" /* Test whether the lock tail == mytail */ " and %1,%0,%6 \n" " cmpw 0,%1,%3 \n" /* Merge the new locked value */ " or %1,%1,%4 \n" " bne 2f \n" /* If the lock tail matched, then clear it, otherwise leave it. */ " andc %1,%1,%6 \n" "2: stwcx. %1,0,%2 \n" " bne- 1b \n" "\t" PPC_ACQUIRE_BARRIER " \n" "3: \n" : "=&r" (prev), "=&r" (tmp) : "r" (&lock->val), "r"(tail), "r" (newval), "i" (_Q_LOCKED_VAL), "r" (_Q_TAIL_CPU_MASK), "i" (_Q_SPIN_EH_HINT) : "cr0", "memory"); return prev; } /* * Publish our tail, replacing previous tail. Return previous value. * * This provides a release barrier for publishing node, this pairs with the * acquire barrier in get_tail_qnode() when the next CPU finds this tail * value. */ static __always_inline u32 publish_tail_cpu(struct qspinlock *lock, u32 tail) { u32 prev, tmp; kcsan_release(); asm volatile( "\t" PPC_RELEASE_BARRIER " \n" "1: lwarx %0,0,%2 # publish_tail_cpu \n" " andc %1,%0,%4 \n" " or %1,%1,%3 \n" " stwcx. %1,0,%2 \n" " bne- 1b \n" : "=&r" (prev), "=&r"(tmp) : "r" (&lock->val), "r" (tail), "r"(_Q_TAIL_CPU_MASK) : "cr0", "memory"); return prev; } static __always_inline u32 set_mustq(struct qspinlock *lock) { u32 prev; asm volatile( "1: lwarx %0,0,%1 # set_mustq \n" " or %0,%0,%2 \n" " stwcx. %0,0,%1 \n" " bne- 1b \n" : "=&r" (prev) : "r" (&lock->val), "r" (_Q_MUST_Q_VAL) : "cr0", "memory"); return prev; } static __always_inline u32 clear_mustq(struct qspinlock *lock) { u32 prev; asm volatile( "1: lwarx %0,0,%1 # clear_mustq \n" " andc %0,%0,%2 \n" " stwcx. %0,0,%1 \n" " bne- 1b \n" : "=&r" (prev) : "r" (&lock->val), "r" (_Q_MUST_Q_VAL) : "cr0", "memory"); return prev; } static __always_inline bool try_set_sleepy(struct qspinlock *lock, u32 old) { u32 prev; u32 new = old | _Q_SLEEPY_VAL; BUG_ON(!(old & _Q_LOCKED_VAL)); BUG_ON(old & _Q_SLEEPY_VAL); asm volatile( "1: lwarx %0,0,%1 # try_set_sleepy \n" " cmpw 0,%0,%2 \n" " bne- 2f \n" " stwcx. %3,0,%1 \n" " bne- 1b \n" "2: \n" : "=&r" (prev) : "r" (&lock->val), "r"(old), "r" (new) : "cr0", "memory"); return likely(prev == old); } static __always_inline void seen_sleepy_owner(struct qspinlock *lock, u32 val) { if (pv_sleepy_lock) { if (pv_sleepy_lock_interval_ns) this_cpu_write(sleepy_lock_seen_clock, sched_clock()); if (!(val & _Q_SLEEPY_VAL)) try_set_sleepy(lock, val); } } static __always_inline void seen_sleepy_lock(void) { if (pv_sleepy_lock && pv_sleepy_lock_interval_ns) this_cpu_write(sleepy_lock_seen_clock, sched_clock()); } static __always_inline void seen_sleepy_node(void) { if (pv_sleepy_lock) { if (pv_sleepy_lock_interval_ns) this_cpu_write(sleepy_lock_seen_clock, sched_clock()); /* Don't set sleepy because we likely have a stale val */ } } static struct qnode *get_tail_qnode(struct qspinlock *lock, int prev_cpu) { struct qnodes *qnodesp = per_cpu_ptr(&qnodes, prev_cpu); int idx; /* * After publishing the new tail and finding a previous tail in the * previous val (which is the control dependency), this barrier * orders the release barrier in publish_tail_cpu performed by the * last CPU, with subsequently looking at its qnode structures * after the barrier. */ smp_acquire__after_ctrl_dep(); for (idx = 0; idx < MAX_NODES; idx++) { struct qnode *qnode = &qnodesp->nodes[idx]; if (qnode->lock == lock) return qnode; } BUG(); } /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ static __always_inline bool __yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt, bool mustq) { int owner; u32 yield_count; bool preempted = false; BUG_ON(!(val & _Q_LOCKED_VAL)); if (!paravirt) goto relax; if (!pv_yield_owner) goto relax; owner = get_owner_cpu(val); yield_count = yield_count_of(owner); if ((yield_count & 1) == 0) goto relax; /* owner vcpu is running */ spin_end(); seen_sleepy_owner(lock, val); preempted = true; /* * Read the lock word after sampling the yield count. On the other side * there may a wmb because the yield count update is done by the * hypervisor preemption and the value update by the OS, however this * ordering might reduce the chance of out of order accesses and * improve the heuristic. */ smp_rmb(); if (READ_ONCE(lock->val) == val) { if (mustq) clear_mustq(lock); yield_to_preempted(owner, yield_count); if (mustq) set_mustq(lock); spin_begin(); /* Don't relax if we yielded. Maybe we should? */ return preempted; } spin_begin(); relax: spin_cpu_relax(); return preempted; } /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ static __always_inline bool yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) { return __yield_to_locked_owner(lock, val, paravirt, false); } /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ static __always_inline bool yield_head_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) { bool mustq = false; if ((val & _Q_MUST_Q_VAL) && pv_yield_allow_steal) mustq = true; return __yield_to_locked_owner(lock, val, paravirt, mustq); } static __always_inline void propagate_sleepy(struct qnode *node, u32 val, bool paravirt) { struct qnode *next; int owner; if (!paravirt) return; if (!pv_yield_sleepy_owner) return; next = READ_ONCE(node->next); if (!next) return; if (next->sleepy) return; owner = get_owner_cpu(val); if (vcpu_is_preempted(owner)) next->sleepy = 1; } /* Called inside spin_begin() */ static __always_inline bool yield_to_prev(struct qspinlock *lock, struct qnode *node, int prev_cpu, bool paravirt) { u32 yield_count; bool preempted = false; if (!paravirt) goto relax; if (!pv_yield_sleepy_owner) goto yield_prev; /* * If the previous waiter was preempted it might not be able to * propagate sleepy to us, so check the lock in that case too. */ if (node->sleepy || vcpu_is_preempted(prev_cpu)) { u32 val = READ_ONCE(lock->val); if (val & _Q_LOCKED_VAL) { if (node->next && !node->next->sleepy) { /* * Propagate sleepy to next waiter. Only if * owner is preempted, which allows the queue * to become "non-sleepy" if vCPU preemption * ceases to occur, even if the lock remains * highly contended. */ if (vcpu_is_preempted(get_owner_cpu(val))) node->next->sleepy = 1; } preempted = yield_to_locked_owner(lock, val, paravirt); if (preempted) return preempted; } node->sleepy = false; } yield_prev: if (!pv_yield_prev) goto relax; yield_count = yield_count_of(prev_cpu); if ((yield_count & 1) == 0) goto relax; /* owner vcpu is running */ spin_end(); preempted = true; seen_sleepy_node(); smp_rmb(); /* See __yield_to_locked_owner comment */ if (!READ_ONCE(node->locked)) { yield_to_preempted(prev_cpu, yield_count); spin_begin(); return preempted; } spin_begin(); relax: spin_cpu_relax(); return preempted; } static __always_inline bool steal_break(u32 val, int iters, bool paravirt, bool sleepy) { if (iters >= get_steal_spins(paravirt, sleepy)) return true; if (IS_ENABLED(CONFIG_NUMA) && (iters >= get_remote_steal_spins(paravirt, sleepy))) { int cpu = get_owner_cpu(val); if (numa_node_id() != cpu_to_node(cpu)) return true; } return false; } static __always_inline bool try_to_steal_lock(struct qspinlock *lock, bool paravirt) { bool seen_preempted = false; bool sleepy = false; int iters = 0; u32 val; if (!steal_spins) { /* XXX: should spin_on_preempted_owner do anything here? */ return false; } /* Attempt to steal the lock */ spin_begin(); do { bool preempted = false; val = READ_ONCE(lock->val); if (val & _Q_MUST_Q_VAL) break; spec_barrier(); if (unlikely(!(val & _Q_LOCKED_VAL))) { spin_end(); if (__queued_spin_trylock_steal(lock)) return true; spin_begin(); } else { preempted = yield_to_locked_owner(lock, val, paravirt); } if (paravirt && pv_sleepy_lock) { if (!sleepy) { if (val & _Q_SLEEPY_VAL) { seen_sleepy_lock(); sleepy = true; } else if (recently_sleepy()) { sleepy = true; } } if (pv_sleepy_lock_sticky && seen_preempted && !(val & _Q_SLEEPY_VAL)) { if (try_set_sleepy(lock, val)) val |= _Q_SLEEPY_VAL; } } if (preempted) { seen_preempted = true; sleepy = true; if (!pv_spin_on_preempted_owner) iters++; /* * pv_spin_on_preempted_owner don't increase iters * while the owner is preempted -- we won't interfere * with it by definition. This could introduce some * latency issue if we continually observe preempted * owners, but hopefully that's a rare corner case of * a badly oversubscribed system. */ } else { iters++; } } while (!steal_break(val, iters, paravirt, sleepy)); spin_end(); return false; } static __always_inline void queued_spin_lock_mcs_queue(struct qspinlock *lock, bool paravirt) { struct qnodes *qnodesp; struct qnode *next, *node; u32 val, old, tail; bool seen_preempted = false; bool sleepy = false; bool mustq = false; int idx; int iters = 0; BUILD_BUG_ON(CONFIG_NR_CPUS >= (1U << _Q_TAIL_CPU_BITS)); qnodesp = this_cpu_ptr(&qnodes); if (unlikely(qnodesp->count >= MAX_NODES)) { spec_barrier(); while (!queued_spin_trylock(lock)) cpu_relax(); return; } idx = qnodesp->count++; /* * Ensure that we increment the head node->count before initialising * the actual node. If the compiler is kind enough to reorder these * stores, then an IRQ could overwrite our assignments. */ barrier(); node = &qnodesp->nodes[idx]; node->next = NULL; node->lock = lock; node->cpu = smp_processor_id(); node->sleepy = 0; node->locked = 0; tail = encode_tail_cpu(node->cpu); /* * Assign all attributes of a node before it can be published. * Issues an lwsync, serving as a release barrier, as well as a * compiler barrier. */ old = publish_tail_cpu(lock, tail); /* * If there was a previous node; link it and wait until reaching the * head of the waitqueue. */ if (old & _Q_TAIL_CPU_MASK) { int prev_cpu = decode_tail_cpu(old); struct qnode *prev = get_tail_qnode(lock, prev_cpu); /* Link @node into the waitqueue. */ WRITE_ONCE(prev->next, node); /* Wait for mcs node lock to be released */ spin_begin(); while (!READ_ONCE(node->locked)) { spec_barrier(); if (yield_to_prev(lock, node, prev_cpu, paravirt)) seen_preempted = true; } spec_barrier(); spin_end(); smp_rmb(); /* acquire barrier for the mcs lock */ /* * Generic qspinlocks have this prefetch here, but it seems * like it could cause additional line transitions because * the waiter will keep loading from it. */ if (_Q_SPIN_PREFETCH_NEXT) { next = READ_ONCE(node->next); if (next) prefetchw(next); } } /* We're at the head of the waitqueue, wait for the lock. */ again: spin_begin(); for (;;) { bool preempted; val = READ_ONCE(lock->val); if (!(val & _Q_LOCKED_VAL)) break; spec_barrier(); if (paravirt && pv_sleepy_lock && maybe_stealers) { if (!sleepy) { if (val & _Q_SLEEPY_VAL) { seen_sleepy_lock(); sleepy = true; } else if (recently_sleepy()) { sleepy = true; } } if (pv_sleepy_lock_sticky && seen_preempted && !(val & _Q_SLEEPY_VAL)) { if (try_set_sleepy(lock, val)) val |= _Q_SLEEPY_VAL; } } propagate_sleepy(node, val, paravirt); preempted = yield_head_to_locked_owner(lock, val, paravirt); if (!maybe_stealers) continue; if (preempted) seen_preempted = true; if (paravirt && preempted) { sleepy = true; if (!pv_spin_on_preempted_owner) iters++; } else { iters++; } if (!mustq && iters >= get_head_spins(paravirt, sleepy)) { mustq = true; set_mustq(lock); val |= _Q_MUST_Q_VAL; } } spec_barrier(); spin_end(); /* If we're the last queued, must clean up the tail. */ old = trylock_clean_tail(lock, tail); if (unlikely(old & _Q_LOCKED_VAL)) { BUG_ON(!maybe_stealers); goto again; /* Can only be true if maybe_stealers. */ } if ((old & _Q_TAIL_CPU_MASK) == tail) goto release; /* We were the tail, no next. */ /* There is a next, must wait for node->next != NULL (MCS protocol) */ next = READ_ONCE(node->next); if (!next) { spin_begin(); while (!(next = READ_ONCE(node->next))) cpu_relax(); spin_end(); } spec_barrier(); /* * Unlock the next mcs waiter node. Release barrier is not required * here because the acquirer is only accessing the lock word, and * the acquire barrier we took the lock with orders that update vs * this store to locked. The corresponding barrier is the smp_rmb() * acquire barrier for mcs lock, above. */ if (paravirt && pv_prod_head) { int next_cpu = next->cpu; WRITE_ONCE(next->locked, 1); if (_Q_SPIN_MISO) asm volatile("miso" ::: "memory"); if (vcpu_is_preempted(next_cpu)) prod_cpu(next_cpu); } else { WRITE_ONCE(next->locked, 1); if (_Q_SPIN_MISO) asm volatile("miso" ::: "memory"); } release: qnodesp->count--; /* release the node */ } void queued_spin_lock_slowpath(struct qspinlock *lock) { /* * This looks funny, but it induces the compiler to inline both * sides of the branch rather than share code as when the condition * is passed as the paravirt argument to the functions. */ if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) && is_shared_processor()) { if (try_to_steal_lock(lock, true)) { spec_barrier(); return; } queued_spin_lock_mcs_queue(lock, true); } else { if (try_to_steal_lock(lock, false)) { spec_barrier(); return; } queued_spin_lock_mcs_queue(lock, false); } } EXPORT_SYMBOL(queued_spin_lock_slowpath); #ifdef CONFIG_PARAVIRT_SPINLOCKS void pv_spinlocks_init(void) { } #endif #include <linux/debugfs.h> static int steal_spins_set(void *data, u64 val) { #if _Q_SPIN_TRY_LOCK_STEAL == 1 /* MAYBE_STEAL remains true */ steal_spins = val; #else static DEFINE_MUTEX(lock); /* * The lock slow path has a !maybe_stealers case that can assume * the head of queue will not see concurrent waiters. That waiter * is unsafe in the presence of stealers, so must keep them away * from one another. */ mutex_lock(&lock); if (val && !steal_spins) { maybe_stealers = true; /* wait for queue head waiter to go away */ synchronize_rcu(); steal_spins = val; } else if (!val && steal_spins) { steal_spins = val; /* wait for all possible stealers to go away */ synchronize_rcu(); maybe_stealers = false; } else { steal_spins = val; } mutex_unlock(&lock); #endif return 0; } static int steal_spins_get(void *data, u64 *val) { *val = steal_spins; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_steal_spins, steal_spins_get, steal_spins_set, "%llu\n"); static int remote_steal_spins_set(void *data, u64 val) { remote_steal_spins = val; return 0; } static int remote_steal_spins_get(void *data, u64 *val) { *val = remote_steal_spins; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_remote_steal_spins, remote_steal_spins_get, remote_steal_spins_set, "%llu\n"); static int head_spins_set(void *data, u64 val) { head_spins = val; return 0; } static int head_spins_get(void *data, u64 *val) { *val = head_spins; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_head_spins, head_spins_get, head_spins_set, "%llu\n"); static int pv_yield_owner_set(void *data, u64 val) { pv_yield_owner = !!val; return 0; } static int pv_yield_owner_get(void *data, u64 *val) { *val = pv_yield_owner; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_owner, pv_yield_owner_get, pv_yield_owner_set, "%llu\n"); static int pv_yield_allow_steal_set(void *data, u64 val) { pv_yield_allow_steal = !!val; return 0; } static int pv_yield_allow_steal_get(void *data, u64 *val) { *val = pv_yield_allow_steal; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_allow_steal, pv_yield_allow_steal_get, pv_yield_allow_steal_set, "%llu\n"); static int pv_spin_on_preempted_owner_set(void *data, u64 val) { pv_spin_on_preempted_owner = !!val; return 0; } static int pv_spin_on_preempted_owner_get(void *data, u64 *val) { *val = pv_spin_on_preempted_owner; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_spin_on_preempted_owner, pv_spin_on_preempted_owner_get, pv_spin_on_preempted_owner_set, "%llu\n"); static int pv_sleepy_lock_set(void *data, u64 val) { pv_sleepy_lock = !!val; return 0; } static int pv_sleepy_lock_get(void *data, u64 *val) { *val = pv_sleepy_lock; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock, pv_sleepy_lock_get, pv_sleepy_lock_set, "%llu\n"); static int pv_sleepy_lock_sticky_set(void *data, u64 val) { pv_sleepy_lock_sticky = !!val; return 0; } static int pv_sleepy_lock_sticky_get(void *data, u64 *val) { *val = pv_sleepy_lock_sticky; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_sticky, pv_sleepy_lock_sticky_get, pv_sleepy_lock_sticky_set, "%llu\n"); static int pv_sleepy_lock_interval_ns_set(void *data, u64 val) { pv_sleepy_lock_interval_ns = val; return 0; } static int pv_sleepy_lock_interval_ns_get(void *data, u64 *val) { *val = pv_sleepy_lock_interval_ns; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_interval_ns, pv_sleepy_lock_interval_ns_get, pv_sleepy_lock_interval_ns_set, "%llu\n"); static int pv_sleepy_lock_factor_set(void *data, u64 val) { pv_sleepy_lock_factor = val; return 0; } static int pv_sleepy_lock_factor_get(void *data, u64 *val) { *val = pv_sleepy_lock_factor; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_factor, pv_sleepy_lock_factor_get, pv_sleepy_lock_factor_set, "%llu\n"); static int pv_yield_prev_set(void *data, u64 val) { pv_yield_prev = !!val; return 0; } static int pv_yield_prev_get(void *data, u64 *val) { *val = pv_yield_prev; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_prev, pv_yield_prev_get, pv_yield_prev_set, "%llu\n"); static int pv_yield_sleepy_owner_set(void *data, u64 val) { pv_yield_sleepy_owner = !!val; return 0; } static int pv_yield_sleepy_owner_get(void *data, u64 *val) { *val = pv_yield_sleepy_owner; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_sleepy_owner, pv_yield_sleepy_owner_get, pv_yield_sleepy_owner_set, "%llu\n"); static int pv_prod_head_set(void *data, u64 val) { pv_prod_head = !!val; return 0; } static int pv_prod_head_get(void *data, u64 *val) { *val = pv_prod_head; return 0; } DEFINE_SIMPLE_ATTRIBUTE(fops_pv_prod_head, pv_prod_head_get, pv_prod_head_set, "%llu\n"); static __init int spinlock_debugfs_init(void) { debugfs_create_file("qspl_steal_spins", 0600, arch_debugfs_dir, NULL, &fops_steal_spins); debugfs_create_file("qspl_remote_steal_spins", 0600, arch_debugfs_dir, NULL, &fops_remote_steal_spins); debugfs_create_file("qspl_head_spins", 0600, arch_debugfs_dir, NULL, &fops_head_spins); if (is_shared_processor()) { debugfs_create_file("qspl_pv_yield_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_owner); debugfs_create_file("qspl_pv_yield_allow_steal", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_allow_steal); debugfs_create_file("qspl_pv_spin_on_preempted_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_spin_on_preempted_owner); debugfs_create_file("qspl_pv_sleepy_lock", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock); debugfs_create_file("qspl_pv_sleepy_lock_sticky", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_sticky); debugfs_create_file("qspl_pv_sleepy_lock_interval_ns", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_interval_ns); debugfs_create_file("qspl_pv_sleepy_lock_factor", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_factor); debugfs_create_file("qspl_pv_yield_prev", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_prev); debugfs_create_file("qspl_pv_yield_sleepy_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_sleepy_owner); debugfs_create_file("qspl_pv_prod_head", 0600, arch_debugfs_dir, NULL, &fops_pv_prod_head); } return 0; } device_initcall(spinlock_debugfs_init); |