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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 | // SPDX-License-Identifier: GPL-2.0-only /* * * Copyright IBM Corp. 2007 * Copyright 2011 Freescale Semiconductor, Inc. * * Authors: Hollis Blanchard <hollisb@us.ibm.com> */ #include <linux/jiffies.h> #include <linux/hrtimer.h> #include <linux/types.h> #include <linux/string.h> #include <linux/kvm_host.h> #include <linux/clockchips.h> #include <asm/reg.h> #include <asm/time.h> #include <asm/byteorder.h> #include <asm/kvm_ppc.h> #include <asm/disassemble.h> #include <asm/ppc-opcode.h> #include "timing.h" #include "trace.h" void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) { unsigned long dec_nsec; unsigned long long dec_time; pr_debug("mtDEC: %lx\n", vcpu->arch.dec); hrtimer_try_to_cancel(&vcpu->arch.dec_timer); #ifdef CONFIG_PPC_BOOK3S /* mtdec lowers the interrupt line when positive. */ kvmppc_core_dequeue_dec(vcpu); #endif #ifdef CONFIG_BOOKE /* On BOOKE, DEC = 0 is as good as decrementer not enabled */ if (vcpu->arch.dec == 0) return; #endif /* * The decrementer ticks at the same rate as the timebase, so * that's how we convert the guest DEC value to the number of * host ticks. */ dec_time = vcpu->arch.dec; /* * Guest timebase ticks at the same frequency as host timebase. * So use the host timebase calculations for decrementer emulation. */ dec_time = tb_to_ns(dec_time); dec_nsec = do_div(dec_time, NSEC_PER_SEC); hrtimer_start(&vcpu->arch.dec_timer, ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL); vcpu->arch.dec_jiffies = get_tb(); } u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb) { u64 jd = tb - vcpu->arch.dec_jiffies; #ifdef CONFIG_BOOKE if (vcpu->arch.dec < jd) return 0; #endif return vcpu->arch.dec - jd; } static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) { enum emulation_result emulated = EMULATE_DONE; ulong spr_val = kvmppc_get_gpr(vcpu, rs); switch (sprn) { case SPRN_SRR0: kvmppc_set_srr0(vcpu, spr_val); break; case SPRN_SRR1: kvmppc_set_srr1(vcpu, spr_val); break; /* XXX We need to context-switch the timebase for * watchdog and FIT. */ case SPRN_TBWL: break; case SPRN_TBWU: break; case SPRN_DEC: vcpu->arch.dec = (u32) spr_val; kvmppc_emulate_dec(vcpu); break; case SPRN_SPRG0: kvmppc_set_sprg0(vcpu, spr_val); break; case SPRN_SPRG1: kvmppc_set_sprg1(vcpu, spr_val); break; case SPRN_SPRG2: kvmppc_set_sprg2(vcpu, spr_val); break; case SPRN_SPRG3: kvmppc_set_sprg3(vcpu, spr_val); break; /* PIR can legally be written, but we ignore it */ case SPRN_PIR: break; default: emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn, spr_val); if (emulated == EMULATE_FAIL) printk(KERN_INFO "mtspr: unknown spr " "0x%x\n", sprn); break; } kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS); return emulated; } static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) { enum emulation_result emulated = EMULATE_DONE; ulong spr_val = 0; switch (sprn) { case SPRN_SRR0: spr_val = kvmppc_get_srr0(vcpu); break; case SPRN_SRR1: spr_val = kvmppc_get_srr1(vcpu); break; case SPRN_PVR: spr_val = vcpu->arch.pvr; break; case SPRN_PIR: spr_val = vcpu->vcpu_id; break; /* Note: mftb and TBRL/TBWL are user-accessible, so * the guest can always access the real TB anyways. * In fact, we probably will never see these traps. */ case SPRN_TBWL: spr_val = get_tb() >> 32; break; case SPRN_TBWU: spr_val = get_tb(); break; case SPRN_SPRG0: spr_val = kvmppc_get_sprg0(vcpu); break; case SPRN_SPRG1: spr_val = kvmppc_get_sprg1(vcpu); break; case SPRN_SPRG2: spr_val = kvmppc_get_sprg2(vcpu); break; case SPRN_SPRG3: spr_val = kvmppc_get_sprg3(vcpu); break; /* Note: SPRG4-7 are user-readable, so we don't get * a trap. */ case SPRN_DEC: spr_val = kvmppc_get_dec(vcpu, get_tb()); break; default: emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn, &spr_val); if (unlikely(emulated == EMULATE_FAIL)) { printk(KERN_INFO "mfspr: unknown spr " "0x%x\n", sprn); } break; } if (emulated == EMULATE_DONE) kvmppc_set_gpr(vcpu, rt, spr_val); kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS); return emulated; } /* XXX Should probably auto-generate instruction decoding for a particular core * from opcode tables in the future. */ int kvmppc_emulate_instruction(struct kvm_vcpu *vcpu) { u32 inst; ppc_inst_t pinst; int rs, rt, sprn; enum emulation_result emulated; int advance = 1; /* this default type might be overwritten by subcategories */ kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS); emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &pinst); inst = ppc_inst_val(pinst); if (emulated != EMULATE_DONE) return emulated; pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst)); rs = get_rs(inst); rt = get_rt(inst); sprn = get_sprn(inst); switch (get_op(inst)) { case OP_TRAP: #ifdef CONFIG_PPC_BOOK3S case OP_TRAP_64: kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP); #else kvmppc_core_queue_program(vcpu, vcpu->arch.shared->esr | ESR_PTR); #endif advance = 0; break; case 31: switch (get_xop(inst)) { case OP_31_XOP_TRAP: #ifdef CONFIG_64BIT case OP_31_XOP_TRAP_64: #endif #ifdef CONFIG_PPC_BOOK3S kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP); #else kvmppc_core_queue_program(vcpu, vcpu->arch.shared->esr | ESR_PTR); #endif advance = 0; break; case OP_31_XOP_MFSPR: emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt); if (emulated == EMULATE_AGAIN) { emulated = EMULATE_DONE; advance = 0; } break; case OP_31_XOP_MTSPR: emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs); if (emulated == EMULATE_AGAIN) { emulated = EMULATE_DONE; advance = 0; } break; case OP_31_XOP_TLBSYNC: break; default: /* Attempt core-specific emulation below. */ emulated = EMULATE_FAIL; } break; case 0: /* * Instruction with primary opcode 0. Based on PowerISA * these are illegal instructions. */ if (inst == KVMPPC_INST_SW_BREAKPOINT) { vcpu->run->exit_reason = KVM_EXIT_DEBUG; vcpu->run->debug.arch.status = 0; vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); emulated = EMULATE_EXIT_USER; advance = 0; } else emulated = EMULATE_FAIL; break; default: emulated = EMULATE_FAIL; } if (emulated == EMULATE_FAIL) { emulated = vcpu->kvm->arch.kvm_ops->emulate_op(vcpu, inst, &advance); if (emulated == EMULATE_AGAIN) { advance = 0; } else if (emulated == EMULATE_FAIL) { advance = 0; printk(KERN_ERR "Couldn't emulate instruction 0x%08x " "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst)); } } trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated); /* Advance past emulated instruction. */ /* * If this ever handles prefixed instructions, the 4 * will need to become ppc_inst_len(pinst) instead. */ if (advance) kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); return emulated; } EXPORT_SYMBOL_GPL(kvmppc_emulate_instruction); |