1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
 3#define _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
 4
 5#include <asm/cpu-info.h>
 6
 7#ifdef CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION
 8
 9#include <loongson_regs.h>
10
11#define LOONGSON_FPREV_MASK 0x7
12
13void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c);
14
15static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
16{
17	/* All supported cores have non-zero LOONGSON_CFG1 data. */
18	return c->loongson3_cpucfg_data[0] != 0;
19}
20
21static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
22	__u64 sel)
23{
24	switch (sel) {
25	case LOONGSON_CFG0:
26		return c->processor_id;
27	case LOONGSON_CFG1:
28	case LOONGSON_CFG2:
29	case LOONGSON_CFG3:
30		return c->loongson3_cpucfg_data[sel - 1];
31	case LOONGSON_CFG4:
32	case LOONGSON_CFG5:
33		/* CPUCFG selects 4 and 5 are related to the input clock
34		 * signal.
35		 *
36		 * Unimplemented for now.
37		 */
38		return 0;
39	case LOONGSON_CFG6:
40		/* CPUCFG select 6 is for the undocumented Safe Extension. */
41		return 0;
42	case LOONGSON_CFG7:
43		/* CPUCFG select 7 is for the virtualization extension.
44		 * We don't know if the two currently known features are
45		 * supported on older cores according to the public
46		 * documentation, so leave this at zero.
47		 */
48		return 0;
49	}
50
51	/*
52	 * Return 0 for unrecognized CPUCFG selects, which is real hardware
53	 * behavior observed on Loongson 3A R4.
54	 */
55	return 0;
56}
57#else
58static inline void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c)
59{
60}
61
62static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
63{
64	return false;
65}
66
67static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
68	__u64 sel)
69{
70	return 0;
71}
72#endif
73
74#endif /* _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_ */