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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 | /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ARCH_M68K_CMPXCHG__ #define __ARCH_M68K_CMPXCHG__ #include <linux/irqflags.h> #define __xg(type, x) ((volatile type *)(x)) extern unsigned long __invalid_xchg_size(unsigned long, volatile void *, int); #ifndef CONFIG_RMW_INSNS static inline unsigned long __arch_xchg(unsigned long x, volatile void * ptr, int size) { unsigned long flags, tmp; local_irq_save(flags); switch (size) { case 1: tmp = *(u8 *)ptr; *(u8 *)ptr = x; x = tmp; break; case 2: tmp = *(u16 *)ptr; *(u16 *)ptr = x; x = tmp; break; case 4: tmp = *(u32 *)ptr; *(u32 *)ptr = x; x = tmp; break; default: tmp = __invalid_xchg_size(x, ptr, size); break; } local_irq_restore(flags); return x; } #else static inline unsigned long __arch_xchg(unsigned long x, volatile void * ptr, int size) { switch (size) { case 1: __asm__ __volatile__ ("moveb %2,%0\n\t" "1:\n\t" "casb %0,%1,%2\n\t" "jne 1b" : "=&d" (x) : "d" (x), "m" (*__xg(u8, ptr)) : "memory"); break; case 2: __asm__ __volatile__ ("movew %2,%0\n\t" "1:\n\t" "casw %0,%1,%2\n\t" "jne 1b" : "=&d" (x) : "d" (x), "m" (*__xg(u16, ptr)) : "memory"); break; case 4: __asm__ __volatile__ ("movel %2,%0\n\t" "1:\n\t" "casl %0,%1,%2\n\t" "jne 1b" : "=&d" (x) : "d" (x), "m" (*__xg(u32, ptr)) : "memory"); break; default: x = __invalid_xchg_size(x, ptr, size); break; } return x; } #endif #define arch_xchg(ptr,x) ({(__typeof__(*(ptr)))__arch_xchg((unsigned long)(x),(ptr),sizeof(*(ptr)));}) #include <asm-generic/cmpxchg-local.h> #define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) extern unsigned long __invalid_cmpxchg_size(volatile void *, unsigned long, unsigned long, int); /* * Atomic compare and exchange. Compare OLD with MEM, if identical, * store NEW in MEM. Return the initial value in MEM. Success is * indicated by comparing RETURN with OLD. */ #ifdef CONFIG_RMW_INSNS static inline unsigned long __cmpxchg(volatile void *p, unsigned long old, unsigned long new, int size) { switch (size) { case 1: __asm__ __volatile__ ("casb %0,%2,%1" : "=d" (old), "=m" (*(char *)p) : "d" (new), "0" (old), "m" (*(char *)p)); break; case 2: __asm__ __volatile__ ("casw %0,%2,%1" : "=d" (old), "=m" (*(short *)p) : "d" (new), "0" (old), "m" (*(short *)p)); break; case 4: __asm__ __volatile__ ("casl %0,%2,%1" : "=d" (old), "=m" (*(int *)p) : "d" (new), "0" (old), "m" (*(int *)p)); break; default: old = __invalid_cmpxchg_size(p, old, new, size); break; } return old; } #define arch_cmpxchg(ptr, o, n) \ ({(__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \ (unsigned long)(n), sizeof(*(ptr)));}) #define arch_cmpxchg_local(ptr, o, n) \ ({(__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \ (unsigned long)(n), sizeof(*(ptr)));}) #define arch_cmpxchg64(ptr, o, n) arch_cmpxchg64_local((ptr), (o), (n)) #else #include <asm-generic/cmpxchg.h> #endif #endif /* __ARCH_M68K_CMPXCHG__ */ |