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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/probes/kprobes/test-thumb.c
4 *
5 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <asm/opcodes.h>
11#include <asm/probes.h>
12
13#include "test-core.h"
14
15
16#define TEST_ISA "16"
17
18#define DONT_TEST_IN_ITBLOCK(tests) \
19 kprobe_test_flags |= TEST_FLAG_NO_ITBLOCK; \
20 tests \
21 kprobe_test_flags &= ~TEST_FLAG_NO_ITBLOCK;
22
23#define CONDITION_INSTRUCTIONS(cc_pos, tests) \
24 kprobe_test_cc_position = cc_pos; \
25 DONT_TEST_IN_ITBLOCK(tests) \
26 kprobe_test_cc_position = 0;
27
28#define TEST_ITBLOCK(code) \
29 kprobe_test_flags |= TEST_FLAG_FULL_ITBLOCK; \
30 TESTCASE_START(code) \
31 TEST_ARG_END("") \
32 "50: nop \n\t" \
33 "1: "code" \n\t" \
34 " mov r1, #0x11 \n\t" \
35 " mov r2, #0x22 \n\t" \
36 " mov r3, #0x33 \n\t" \
37 "2: nop \n\t" \
38 TESTCASE_END \
39 kprobe_test_flags &= ~TEST_FLAG_FULL_ITBLOCK;
40
41#define TEST_THUMB_TO_ARM_INTERWORK_P(code1, reg, val, code2) \
42 TESTCASE_START(code1 #reg code2) \
43 TEST_ARG_PTR(reg, val) \
44 TEST_ARG_REG(14, 99f+1) \
45 TEST_ARG_MEM(15, 3f) \
46 TEST_ARG_END("") \
47 " nop \n\t" /* To align 1f */ \
48 "50: nop \n\t" \
49 "1: "code1 #reg code2" \n\t" \
50 " bx lr \n\t" \
51 ".arm \n\t" \
52 "3: adr lr, 2f+1 \n\t" \
53 " bx lr \n\t" \
54 ".thumb \n\t" \
55 "2: nop \n\t" \
56 TESTCASE_END
57
58
59void kprobe_thumb16_test_cases(void)
60{
61 kprobe_test_flags = TEST_FLAG_NARROW_INSTR;
62
63 TEST_GROUP("Shift (immediate), add, subtract, move, and compare")
64
65 TEST_R( "lsls r7, r",0,VAL1,", #5")
66 TEST_R( "lsls r0, r",7,VAL2,", #11")
67 TEST_R( "lsrs r7, r",0,VAL1,", #5")
68 TEST_R( "lsrs r0, r",7,VAL2,", #11")
69 TEST_R( "asrs r7, r",0,VAL1,", #5")
70 TEST_R( "asrs r0, r",7,VAL2,", #11")
71 TEST_RR( "adds r2, r",0,VAL1,", r",7,VAL2,"")
72 TEST_RR( "adds r5, r",7,VAL2,", r",0,VAL2,"")
73 TEST_RR( "subs r2, r",0,VAL1,", r",7,VAL2,"")
74 TEST_RR( "subs r5, r",7,VAL2,", r",0,VAL2,"")
75 TEST_R( "adds r7, r",0,VAL1,", #5")
76 TEST_R( "adds r0, r",7,VAL2,", #2")
77 TEST_R( "subs r7, r",0,VAL1,", #5")
78 TEST_R( "subs r0, r",7,VAL2,", #2")
79 TEST( "movs.n r0, #0x5f")
80 TEST( "movs.n r7, #0xa0")
81 TEST_R( "cmp.n r",0,0x5e, ", #0x5f")
82 TEST_R( "cmp.n r",5,0x15f,", #0x5f")
83 TEST_R( "cmp.n r",7,0xa0, ", #0xa0")
84 TEST_R( "adds.n r",0,VAL1,", #0x5f")
85 TEST_R( "adds.n r",7,VAL2,", #0xa0")
86 TEST_R( "subs.n r",0,VAL1,", #0x5f")
87 TEST_R( "subs.n r",7,VAL2,", #0xa0")
88
89 TEST_GROUP("16-bit Thumb data-processing instructions")
90
91#define DATA_PROCESSING16(op,val) \
92 TEST_RR( op" r",0,VAL1,", r",7,val,"") \
93 TEST_RR( op" r",7,VAL2,", r",0,val,"")
94
95 DATA_PROCESSING16("ands",0xf00f00ff)
96 DATA_PROCESSING16("eors",0xf00f00ff)
97 DATA_PROCESSING16("lsls",11)
98 DATA_PROCESSING16("lsrs",11)
99 DATA_PROCESSING16("asrs",11)
100 DATA_PROCESSING16("adcs",VAL2)
101 DATA_PROCESSING16("sbcs",VAL2)
102 DATA_PROCESSING16("rors",11)
103 DATA_PROCESSING16("tst",0xf00f00ff)
104 TEST_R("rsbs r",0,VAL1,", #0")
105 TEST_R("rsbs r",7,VAL2,", #0")
106 DATA_PROCESSING16("cmp",0xf00f00ff)
107 DATA_PROCESSING16("cmn",0xf00f00ff)
108 DATA_PROCESSING16("orrs",0xf00f00ff)
109 DATA_PROCESSING16("muls",VAL2)
110 DATA_PROCESSING16("bics",0xf00f00ff)
111 DATA_PROCESSING16("mvns",VAL2)
112
113 TEST_GROUP("Special data instructions and branch and exchange")
114
115 TEST_RR( "add r",0, VAL1,", r",7,VAL2,"")
116 TEST_RR( "add r",3, VAL2,", r",8,VAL3,"")
117 TEST_RR( "add r",8, VAL3,", r",0,VAL1,"")
118 TEST_R( "add sp" ", r",8,-8, "")
119 TEST_R( "add r",14,VAL1,", pc")
120 TEST_BF_R("add pc" ", r",0,2f-1f-8,"")
121 TEST_UNSUPPORTED(__inst_thumb16(0x44ff) " @ add pc, pc")
122
123 TEST_RR( "cmp r",3,VAL1,", r",8,VAL2,"")
124 TEST_RR( "cmp r",8,VAL2,", r",0,VAL1,"")
125 TEST_R( "cmp sp" ", r",8,-8, "")
126
127 TEST_R( "mov r0, r",7,VAL2,"")
128 TEST_R( "mov r3, r",8,VAL3,"")
129 TEST_R( "mov r8, r",0,VAL1,"")
130 TEST_P( "mov sp, r",8,-8, "")
131 TEST( "mov lr, pc")
132 TEST_BF_R("mov pc, r",0,2f, "")
133
134 TEST_BF_R("bx r",0, 2f+1,"")
135 TEST_BF_R("bx r",14,2f+1,"")
136 TESTCASE_START("bx pc")
137 TEST_ARG_REG(14, 99f+1)
138 TEST_ARG_END("")
139 " nop \n\t" /* To align the bx pc*/
140 "50: nop \n\t"
141 "1: bx pc \n\t"
142 " bx lr \n\t"
143 ".arm \n\t"
144 " adr lr, 2f+1 \n\t"
145 " bx lr \n\t"
146 ".thumb \n\t"
147 "2: nop \n\t"
148 TESTCASE_END
149
150 TEST_BF_R("blx r",0, 2f+1,"")
151 TEST_BB_R("blx r",14,2f+1,"")
152 TEST_UNSUPPORTED(__inst_thumb16(0x47f8) " @ blx pc")
153
154 TEST_GROUP("Load from Literal Pool")
155
156 TEST_X( "ldr r0, 3f",
157 ".align \n\t"
158 "3: .word "__stringify(VAL1))
159 TEST_X( "ldr r7, 3f",
160 ".space 128 \n\t"
161 ".align \n\t"
162 "3: .word "__stringify(VAL2))
163
164 TEST_GROUP("16-bit Thumb Load/store instructions")
165
166 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
167 TEST_RPR("str r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
168 TEST_RPR("strh r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
169 TEST_RPR("strh r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
170 TEST_RPR("strb r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
171 TEST_RPR("strb r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
172 TEST_PR( "ldrsb r0, [r",1, 24,", r",2, 48,"]")
173 TEST_PR( "ldrsb r7, [r",6, 24,", r",5, 50,"]")
174 TEST_PR( "ldr r0, [r",1, 24,", r",2, 48,"]")
175 TEST_PR( "ldr r7, [r",6, 24,", r",5, 48,"]")
176 TEST_PR( "ldrh r0, [r",1, 24,", r",2, 48,"]")
177 TEST_PR( "ldrh r7, [r",6, 24,", r",5, 50,"]")
178 TEST_PR( "ldrb r0, [r",1, 24,", r",2, 48,"]")
179 TEST_PR( "ldrb r7, [r",6, 24,", r",5, 50,"]")
180 TEST_PR( "ldrsh r0, [r",1, 24,", r",2, 48,"]")
181 TEST_PR( "ldrsh r7, [r",6, 24,", r",5, 50,"]")
182
183 TEST_RP("str r",0, VAL1,", [r",1, 24,", #120]")
184 TEST_RP("str r",7, VAL2,", [r",6, 24,", #120]")
185 TEST_P( "ldr r0, [r",1, 24,", #120]")
186 TEST_P( "ldr r7, [r",6, 24,", #120]")
187 TEST_RP("strb r",0, VAL1,", [r",1, 24,", #30]")
188 TEST_RP("strb r",7, VAL2,", [r",6, 24,", #30]")
189 TEST_P( "ldrb r0, [r",1, 24,", #30]")
190 TEST_P( "ldrb r7, [r",6, 24,", #30]")
191 TEST_RP("strh r",0, VAL1,", [r",1, 24,", #60]")
192 TEST_RP("strh r",7, VAL2,", [r",6, 24,", #60]")
193 TEST_P( "ldrh r0, [r",1, 24,", #60]")
194 TEST_P( "ldrh r7, [r",6, 24,", #60]")
195
196 TEST_R( "str r",0, VAL1,", [sp, #0]")
197 TEST_R( "str r",7, VAL2,", [sp, #160]")
198 TEST( "ldr r0, [sp, #0]")
199 TEST( "ldr r7, [sp, #160]")
200
201 TEST_RP("str r",0, VAL1,", [r",0, 24,"]")
202 TEST_P( "ldr r0, [r",0, 24,"]")
203
204 TEST_GROUP("Generate PC-/SP-relative address")
205
206 TEST("add r0, pc, #4")
207 TEST("add r7, pc, #1020")
208 TEST("add r0, sp, #4")
209 TEST("add r7, sp, #1020")
210
211 TEST_GROUP("Miscellaneous 16-bit instructions")
212
213 TEST_UNSUPPORTED( "cpsie i")
214 TEST_UNSUPPORTED( "cpsid i")
215 TEST_UNSUPPORTED( "setend le")
216 TEST_UNSUPPORTED( "setend be")
217
218 TEST("add sp, #"__stringify(TEST_MEMORY_SIZE)) /* Assumes TEST_MEMORY_SIZE < 0x400 */
219 TEST("sub sp, #0x7f*4")
220
221DONT_TEST_IN_ITBLOCK(
222 TEST_BF_R( "cbnz r",0,0, ", 2f")
223 TEST_BF_R( "cbz r",2,-1,", 2f")
224 TEST_BF_RX( "cbnz r",4,1, ", 2f", SPACE_0x20)
225 TEST_BF_RX( "cbz r",7,0, ", 2f", SPACE_0x40)
226)
227 TEST_R("sxth r0, r",7, HH1,"")
228 TEST_R("sxth r7, r",0, HH2,"")
229 TEST_R("sxtb r0, r",7, HH1,"")
230 TEST_R("sxtb r7, r",0, HH2,"")
231 TEST_R("uxth r0, r",7, HH1,"")
232 TEST_R("uxth r7, r",0, HH2,"")
233 TEST_R("uxtb r0, r",7, HH1,"")
234 TEST_R("uxtb r7, r",0, HH2,"")
235 TEST_R("rev r0, r",7, VAL1,"")
236 TEST_R("rev r7, r",0, VAL2,"")
237 TEST_R("rev16 r0, r",7, VAL1,"")
238 TEST_R("rev16 r7, r",0, VAL2,"")
239 TEST_UNSUPPORTED(__inst_thumb16(0xba80) "")
240 TEST_UNSUPPORTED(__inst_thumb16(0xbabf) "")
241 TEST_R("revsh r0, r",7, VAL1,"")
242 TEST_R("revsh r7, r",0, VAL2,"")
243
244#define TEST_POPPC(code, offset) \
245 TESTCASE_START(code) \
246 TEST_ARG_PTR(13, offset) \
247 TEST_ARG_END("") \
248 TEST_BRANCH_F(code) \
249 TESTCASE_END
250
251 TEST("push {r0}")
252 TEST("push {r7}")
253 TEST("push {r14}")
254 TEST("push {r0-r7,r14}")
255 TEST("push {r0,r2,r4,r6,r14}")
256 TEST("push {r1,r3,r5,r7}")
257 TEST("pop {r0}")
258 TEST("pop {r7}")
259 TEST("pop {r0,r2,r4,r6}")
260 TEST_POPPC("pop {pc}",15*4)
261 TEST_POPPC("pop {r0-r7,pc}",7*4)
262 TEST_POPPC("pop {r1,r3,r5,r7,pc}",11*4)
263 TEST_THUMB_TO_ARM_INTERWORK_P("pop {pc} @ ",13,15*4,"")
264 TEST_THUMB_TO_ARM_INTERWORK_P("pop {r0-r7,pc} @ ",13,7*4,"")
265
266 TEST_UNSUPPORTED("bkpt.n 0")
267 TEST_UNSUPPORTED("bkpt.n 255")
268
269 TEST_SUPPORTED("yield")
270 TEST("sev")
271 TEST("nop")
272 TEST("wfi")
273 TEST_SUPPORTED("wfe")
274 TEST_UNSUPPORTED(__inst_thumb16(0xbf50) "") /* Unassigned hints */
275 TEST_UNSUPPORTED(__inst_thumb16(0xbff0) "") /* Unassigned hints */
276
277#define TEST_IT(code, code2) \
278 TESTCASE_START(code) \
279 TEST_ARG_END("") \
280 "50: nop \n\t" \
281 "1: "code" \n\t" \
282 " "code2" \n\t" \
283 "2: nop \n\t" \
284 TESTCASE_END
285
286DONT_TEST_IN_ITBLOCK(
287 TEST_IT("it eq","moveq r0,#0")
288 TEST_IT("it vc","movvc r0,#0")
289 TEST_IT("it le","movle r0,#0")
290 TEST_IT("ite eq","moveq r0,#0\n\t movne r1,#1")
291 TEST_IT("itet vc","movvc r0,#0\n\t movvs r1,#1\n\t movvc r2,#2")
292 TEST_IT("itete le","movle r0,#0\n\t movgt r1,#1\n\t movle r2,#2\n\t movgt r3,#3")
293 TEST_IT("itttt le","movle r0,#0\n\t movle r1,#1\n\t movle r2,#2\n\t movle r3,#3")
294 TEST_IT("iteee le","movle r0,#0\n\t movgt r1,#1\n\t movgt r2,#2\n\t movgt r3,#3")
295)
296
297 TEST_GROUP("Load and store multiple")
298
299 TEST_P("ldmia r",4, 16*4,"!, {r0,r7}")
300 TEST_P("ldmia r",7, 16*4,"!, {r0-r6}")
301 TEST_P("stmia r",4, 16*4,"!, {r0,r7}")
302 TEST_P("stmia r",0, 16*4,"!, {r0-r7}")
303
304 TEST_GROUP("Conditional branch and Supervisor Call instructions")
305
306CONDITION_INSTRUCTIONS(8,
307 TEST_BF("beq 2f")
308 TEST_BB("bne 2b")
309 TEST_BF("bgt 2f")
310 TEST_BB("blt 2b")
311)
312 TEST_UNSUPPORTED(__inst_thumb16(0xde00) "")
313 TEST_UNSUPPORTED(__inst_thumb16(0xdeff) "")
314 TEST_UNSUPPORTED("svc #0x00")
315 TEST_UNSUPPORTED("svc #0xff")
316
317 TEST_GROUP("Unconditional branch")
318
319 TEST_BF( "b 2f")
320 TEST_BB( "b 2b")
321 TEST_BF_X("b 2f", SPACE_0x400)
322 TEST_BB_X("b 2b", SPACE_0x400)
323
324 TEST_GROUP("Testing instructions in IT blocks")
325
326 TEST_ITBLOCK("subs.n r0, r0")
327
328 verbose("\n");
329}
330
331
332void kprobe_thumb32_test_cases(void)
333{
334 kprobe_test_flags = 0;
335
336 TEST_GROUP("Load/store multiple")
337
338 TEST_UNSUPPORTED("rfedb sp")
339 TEST_UNSUPPORTED("rfeia sp")
340 TEST_UNSUPPORTED("rfedb sp!")
341 TEST_UNSUPPORTED("rfeia sp!")
342
343 TEST_P( "stmia r",0, 16*4,", {r0,r8}")
344 TEST_P( "stmia r",4, 16*4,", {r0-r12,r14}")
345 TEST_P( "stmia r",7, 16*4,"!, {r8-r12,r14}")
346 TEST_P( "stmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
347
348 TEST_P( "ldmia r",0, 16*4,", {r0,r8}")
349 TEST_P( "ldmia r",4, 0, ", {r0-r12,r14}")
350 TEST_BF_P("ldmia r",5, 8*4, "!, {r6-r12,r15}")
351 TEST_P( "ldmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
352 TEST_BF_P("ldmia r",14,14*4,"!, {r4,pc}")
353
354 TEST_P( "stmdb r",0, 16*4,", {r0,r8}")
355 TEST_P( "stmdb r",4, 16*4,", {r0-r12,r14}")
356 TEST_P( "stmdb r",5, 16*4,"!, {r8-r12,r14}")
357 TEST_P( "stmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
358
359 TEST_P( "ldmdb r",0, 16*4,", {r0,r8}")
360 TEST_P( "ldmdb r",4, 16*4,", {r0-r12,r14}")
361 TEST_BF_P("ldmdb r",5, 16*4,"!, {r6-r12,r15}")
362 TEST_P( "ldmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
363 TEST_BF_P("ldmdb r",14,16*4,"!, {r4,pc}")
364
365 TEST_P( "stmdb r",13,16*4,"!, {r3-r12,lr}")
366 TEST_P( "stmdb r",13,16*4,"!, {r3-r12}")
367 TEST_P( "stmdb r",2, 16*4,", {r3-r12,lr}")
368 TEST_P( "stmdb r",13,16*4,"!, {r2-r12,lr}")
369 TEST_P( "stmdb r",0, 16*4,", {r0-r12}")
370 TEST_P( "stmdb r",0, 16*4,", {r0-r12,lr}")
371
372 TEST_BF_P("ldmia r",13,5*4, "!, {r3-r12,pc}")
373 TEST_P( "ldmia r",13,5*4, "!, {r3-r12}")
374 TEST_BF_P("ldmia r",2, 5*4, "!, {r3-r12,pc}")
375 TEST_BF_P("ldmia r",13,4*4, "!, {r2-r12,pc}")
376 TEST_P( "ldmia r",0, 16*4,", {r0-r12}")
377 TEST_P( "ldmia r",0, 16*4,", {r0-r12,lr}")
378
379 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",0,14*4,", {r12,pc}")
380 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",13,2*4,", {r0-r12,pc}")
381
382 TEST_UNSUPPORTED(__inst_thumb32(0xe88f0101) " @ stmia pc, {r0,r8}")
383 TEST_UNSUPPORTED(__inst_thumb32(0xe92f5f00) " @ stmdb pc!, {r8-r12,r14}")
384 TEST_UNSUPPORTED(__inst_thumb32(0xe8bdc000) " @ ldmia r13!, {r14,pc}")
385 TEST_UNSUPPORTED(__inst_thumb32(0xe93ec000) " @ ldmdb r14!, {r14,pc}")
386 TEST_UNSUPPORTED(__inst_thumb32(0xe8a73f00) " @ stmia r7!, {r8-r12,sp}")
387 TEST_UNSUPPORTED(__inst_thumb32(0xe8a79f00) " @ stmia r7!, {r8-r12,pc}")
388 TEST_UNSUPPORTED(__inst_thumb32(0xe93e2010) " @ ldmdb r14!, {r4,sp}")
389
390 TEST_GROUP("Load/store double or exclusive, table branch")
391
392 TEST_P( "ldrd r0, r1, [r",1, 24,", #-16]")
393 TEST( "ldrd r12, r14, [sp, #16]")
394 TEST_P( "ldrd r1, r0, [r",7, 24,", #-16]!")
395 TEST( "ldrd r14, r12, [sp, #16]!")
396 TEST_P( "ldrd r1, r0, [r",7, 24,"], #16")
397 TEST( "ldrd r7, r8, [sp], #-16")
398
399 TEST_X( "ldrd r12, r14, 3f",
400 ".align 3 \n\t"
401 "3: .word "__stringify(VAL1)" \n\t"
402 " .word "__stringify(VAL2))
403
404 TEST_UNSUPPORTED(__inst_thumb32(0xe9ffec04) " @ ldrd r14, r12, [pc, #16]!")
405 TEST_UNSUPPORTED(__inst_thumb32(0xe8ffec04) " @ ldrd r14, r12, [pc], #16")
406 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4d800) " @ ldrd sp, r8, [r4]")
407 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4f800) " @ ldrd pc, r8, [r4]")
408 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47d00) " @ ldrd r7, sp, [r4]")
409 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47f00) " @ ldrd r7, pc, [r4]")
410
411 TEST_RRP("strd r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]")
412 TEST_RR( "strd r",12,VAL2,", r",14,VAL1,", [sp, #16]")
413 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,", #-16]!")
414 TEST_RR( "strd r",14,VAL2,", r",12,VAL1,", [sp, #16]!")
415 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16")
416 TEST_RR( "strd r",7, VAL2,", r",8, VAL1,", [sp], #-16")
417 TEST_RRP("strd r",6, VAL1,", r",7, VAL2,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!")
418 TEST_UNSUPPORTED("strd r6, r7, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!")
419 TEST_RRP("strd r",4, VAL1,", r",5, VAL2,", [r",14, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!")
420 TEST_UNSUPPORTED(__inst_thumb32(0xe9efec04) " @ strd r14, r12, [pc, #16]!")
421 TEST_UNSUPPORTED(__inst_thumb32(0xe8efec04) " @ strd r14, r12, [pc], #16")
422
423 TEST_RX("tbb [pc, r",0, (9f-(1f+4)),"]",
424 "9: \n\t"
425 ".byte (2f-1b-4)>>1 \n\t"
426 ".byte (3f-1b-4)>>1 \n\t"
427 "3: mvn r0, r0 \n\t"
428 "2: nop \n\t")
429
430 TEST_RX("tbb [pc, r",4, (9f-(1f+4)+1),"]",
431 "9: \n\t"
432 ".byte (2f-1b-4)>>1 \n\t"
433 ".byte (3f-1b-4)>>1 \n\t"
434 "3: mvn r0, r0 \n\t"
435 "2: nop \n\t")
436
437 TEST_RRX("tbb [r",1,9f,", r",2,0,"]",
438 "9: \n\t"
439 ".byte (2f-1b-4)>>1 \n\t"
440 ".byte (3f-1b-4)>>1 \n\t"
441 "3: mvn r0, r0 \n\t"
442 "2: nop \n\t")
443
444 TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]",
445 "9: \n\t"
446 ".short (2f-1b-4)>>1 \n\t"
447 ".short (3f-1b-4)>>1 \n\t"
448 "3: mvn r0, r0 \n\t"
449 "2: nop \n\t")
450
451 TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]",
452 "9: \n\t"
453 ".short (2f-1b-4)>>1 \n\t"
454 ".short (3f-1b-4)>>1 \n\t"
455 "3: mvn r0, r0 \n\t"
456 "2: nop \n\t")
457
458 TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]",
459 "9: \n\t"
460 ".short (2f-1b-4)>>1 \n\t"
461 ".short (3f-1b-4)>>1 \n\t"
462 "3: mvn r0, r0 \n\t"
463 "2: nop \n\t")
464
465 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01f) " @ tbh [r1, pc]")
466 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01d) " @ tbh [r1, sp]")
467 TEST_UNSUPPORTED(__inst_thumb32(0xe8ddf012) " @ tbh [sp, r2]")
468
469 TEST_UNSUPPORTED("strexb r0, r1, [r2]")
470 TEST_UNSUPPORTED("strexh r0, r1, [r2]")
471 TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]")
472 TEST_UNSUPPORTED("ldrexb r0, [r1]")
473 TEST_UNSUPPORTED("ldrexh r0, [r1]")
474 TEST_UNSUPPORTED("ldrexd r0, r1, [r1]")
475
476 TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
477
478#define _DATA_PROCESSING32_DNM(op,s,val) \
479 TEST_RR(op s".w r0, r",1, VAL1,", r",2, val, "") \
480 TEST_RR(op s" r1, r",1, VAL1,", r",2, val, ", lsl #3") \
481 TEST_RR(op s" r2, r",3, VAL1,", r",2, val, ", lsr #4") \
482 TEST_RR(op s" r3, r",3, VAL1,", r",2, val, ", asr #5") \
483 TEST_RR(op s" r4, r",5, VAL1,", r",2, N(val),", asr #6") \
484 TEST_RR(op s" r5, r",5, VAL1,", r",2, val, ", ror #7") \
485 TEST_RR(op s" r8, r",9, VAL1,", r",10,val, ", rrx") \
486 TEST_R( op s" r0, r",11,VAL1,", #0x00010001") \
487 TEST_R( op s" r11, r",0, VAL1,", #0xf5000000") \
488 TEST_R( op s" r7, r",8, VAL2,", #0x000af000")
489
490#define DATA_PROCESSING32_DNM(op,val) \
491 _DATA_PROCESSING32_DNM(op,"",val) \
492 _DATA_PROCESSING32_DNM(op,"s",val)
493
494#define DATA_PROCESSING32_NM(op,val) \
495 TEST_RR(op".w r",1, VAL1,", r",2, val, "") \
496 TEST_RR(op" r",1, VAL1,", r",2, val, ", lsl #3") \
497 TEST_RR(op" r",3, VAL1,", r",2, val, ", lsr #4") \
498 TEST_RR(op" r",3, VAL1,", r",2, val, ", asr #5") \
499 TEST_RR(op" r",5, VAL1,", r",2, N(val),", asr #6") \
500 TEST_RR(op" r",5, VAL1,", r",2, val, ", ror #7") \
501 TEST_RR(op" r",9, VAL1,", r",10,val, ", rrx") \
502 TEST_R( op" r",11,VAL1,", #0x00010001") \
503 TEST_R( op" r",0, VAL1,", #0xf5000000") \
504 TEST_R( op" r",8, VAL2,", #0x000af000")
505
506#define _DATA_PROCESSING32_DM(op,s,val) \
507 TEST_R( op s".w r0, r",14, val, "") \
508 TEST_R( op s" r1, r",12, val, ", lsl #3") \
509 TEST_R( op s" r2, r",11, val, ", lsr #4") \
510 TEST_R( op s" r3, r",10, val, ", asr #5") \
511 TEST_R( op s" r4, r",9, N(val),", asr #6") \
512 TEST_R( op s" r5, r",8, val, ", ror #7") \
513 TEST_R( op s" r8, r",7,val, ", rrx") \
514 TEST( op s" r0, #0x00010001") \
515 TEST( op s" r11, #0xf5000000") \
516 TEST( op s" r7, #0x000af000") \
517 TEST( op s" r4, #0x00005a00")
518
519#define DATA_PROCESSING32_DM(op,val) \
520 _DATA_PROCESSING32_DM(op,"",val) \
521 _DATA_PROCESSING32_DM(op,"s",val)
522
523 DATA_PROCESSING32_DNM("and",0xf00f00ff)
524 DATA_PROCESSING32_NM("tst",0xf00f00ff)
525 DATA_PROCESSING32_DNM("bic",0xf00f00ff)
526 DATA_PROCESSING32_DNM("orr",0xf00f00ff)
527 DATA_PROCESSING32_DM("mov",VAL2)
528 DATA_PROCESSING32_DNM("orn",0xf00f00ff)
529 DATA_PROCESSING32_DM("mvn",VAL2)
530 DATA_PROCESSING32_DNM("eor",0xf00f00ff)
531 DATA_PROCESSING32_NM("teq",0xf00f00ff)
532 DATA_PROCESSING32_DNM("add",VAL2)
533 DATA_PROCESSING32_NM("cmn",VAL2)
534 DATA_PROCESSING32_DNM("adc",VAL2)
535 DATA_PROCESSING32_DNM("sbc",VAL2)
536 DATA_PROCESSING32_DNM("sub",VAL2)
537 DATA_PROCESSING32_NM("cmp",VAL2)
538 DATA_PROCESSING32_DNM("rsb",VAL2)
539
540 TEST_RR("pkhbt r0, r",0, HH1,", r",1, HH2,"")
541 TEST_RR("pkhbt r14,r",12, HH1,", r",10,HH2,", lsl #2")
542 TEST_RR("pkhtb r0, r",0, HH1,", r",1, HH2,"")
543 TEST_RR("pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2")
544
545 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0d) " @ tst.w r7, sp")
546 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0f) " @ tst.w r7, pc")
547 TEST_UNSUPPORTED(__inst_thumb32(0xea1d0f07) " @ tst.w sp, r7")
548 TEST_UNSUPPORTED(__inst_thumb32(0xea1f0f07) " @ tst.w pc, r7")
549 TEST_UNSUPPORTED(__inst_thumb32(0xf01d1f08) " @ tst sp, #0x00080008")
550 TEST_UNSUPPORTED(__inst_thumb32(0xf01f1f08) " @ tst pc, #0x00080008")
551
552 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0d) " @ teq.w r7, sp")
553 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0f) " @ teq.w r7, pc")
554 TEST_UNSUPPORTED(__inst_thumb32(0xea9d0f07) " @ teq.w sp, r7")
555 TEST_UNSUPPORTED(__inst_thumb32(0xea9f0f07) " @ teq.w pc, r7")
556 TEST_UNSUPPORTED(__inst_thumb32(0xf09d1f08) " @ tst sp, #0x00080008")
557 TEST_UNSUPPORTED(__inst_thumb32(0xf09f1f08) " @ tst pc, #0x00080008")
558
559 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0d) " @ cmn.w r7, sp")
560 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0f) " @ cmn.w r7, pc")
561 TEST_P("cmn.w sp, r",7,0,"")
562 TEST_UNSUPPORTED(__inst_thumb32(0xeb1f0f07) " @ cmn.w pc, r7")
563 TEST( "cmn sp, #0x00080008")
564 TEST_UNSUPPORTED(__inst_thumb32(0xf11f1f08) " @ cmn pc, #0x00080008")
565
566 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0d) " @ cmp.w r7, sp")
567 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0f) " @ cmp.w r7, pc")
568 TEST_P("cmp.w sp, r",7,0,"")
569 TEST_UNSUPPORTED(__inst_thumb32(0xebbf0f07) " @ cmp.w pc, r7")
570 TEST( "cmp sp, #0x00080008")
571 TEST_UNSUPPORTED(__inst_thumb32(0xf1bf1f08) " @ cmp pc, #0x00080008")
572
573 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070d) " @ movs.w r7, sp")
574 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070f) " @ movs.w r7, pc")
575 TEST_UNSUPPORTED(__inst_thumb32(0xea5f0d07) " @ movs.w sp, r7")
576 TEST_UNSUPPORTED(__inst_thumb32(0xea4f0f07) " @ mov.w pc, r7")
577 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1d08) " @ mov sp, #0x00080008")
578 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1f08) " @ mov pc, #0x00080008")
579
580 TEST_R("add.w r0, sp, r",1, 4,"")
581 TEST_R("adds r0, sp, r",1, 4,", asl #3")
582 TEST_R("add r0, sp, r",1, 4,", asl #4")
583 TEST_R("add r0, sp, r",1, 16,", ror #1")
584 TEST_R("add.w sp, sp, r",1, 4,"")
585 TEST_R("add sp, sp, r",1, 4,", asl #3")
586 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d1d01) " @ add sp, sp, r1, asl #4")
587 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d71) " @ add sp, sp, r1, ror #1")
588 TEST( "add.w r0, sp, #24")
589 TEST( "add.w sp, sp, #24")
590 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0f01) " @ add pc, sp, r1")
591 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000f) " @ add r0, sp, pc")
592 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000d) " @ add r0, sp, sp")
593 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0f) " @ add sp, sp, pc")
594 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0d) " @ add sp, sp, sp")
595
596 TEST_R("sub.w r0, sp, r",1, 4,"")
597 TEST_R("subs r0, sp, r",1, 4,", asl #3")
598 TEST_R("sub r0, sp, r",1, 4,", asl #4")
599 TEST_R("sub r0, sp, r",1, 16,", ror #1")
600 TEST_R("sub.w sp, sp, r",1, 4,"")
601 TEST_R("sub sp, sp, r",1, 4,", asl #3")
602 TEST_UNSUPPORTED(__inst_thumb32(0xebad1d01) " @ sub sp, sp, r1, asl #4")
603 TEST_UNSUPPORTED(__inst_thumb32(0xebad0d71) " @ sub sp, sp, r1, ror #1")
604 TEST_UNSUPPORTED(__inst_thumb32(0xebad0f01) " @ sub pc, sp, r1")
605 TEST( "sub.w r0, sp, #24")
606 TEST( "sub.w sp, sp, #24")
607
608 TEST_UNSUPPORTED(__inst_thumb32(0xea02010f) " @ and r1, r2, pc")
609 TEST_UNSUPPORTED(__inst_thumb32(0xea0f0103) " @ and r1, pc, r3")
610 TEST_UNSUPPORTED(__inst_thumb32(0xea020f03) " @ and pc, r2, r3")
611 TEST_UNSUPPORTED(__inst_thumb32(0xea02010d) " @ and r1, r2, sp")
612 TEST_UNSUPPORTED(__inst_thumb32(0xea0d0103) " @ and r1, sp, r3")
613 TEST_UNSUPPORTED(__inst_thumb32(0xea020d03) " @ and sp, r2, r3")
614 TEST_UNSUPPORTED(__inst_thumb32(0xf00d1108) " @ and r1, sp, #0x00080008")
615 TEST_UNSUPPORTED(__inst_thumb32(0xf00f1108) " @ and r1, pc, #0x00080008")
616 TEST_UNSUPPORTED(__inst_thumb32(0xf0021d08) " @ and sp, r8, #0x00080008")
617 TEST_UNSUPPORTED(__inst_thumb32(0xf0021f08) " @ and pc, r8, #0x00080008")
618
619 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010f) " @ add r1, r2, pc")
620 TEST_UNSUPPORTED(__inst_thumb32(0xeb0f0103) " @ add r1, pc, r3")
621 TEST_UNSUPPORTED(__inst_thumb32(0xeb020f03) " @ add pc, r2, r3")
622 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010d) " @ add r1, r2, sp")
623 TEST_SUPPORTED( __inst_thumb32(0xeb0d0103) " @ add r1, sp, r3")
624 TEST_UNSUPPORTED(__inst_thumb32(0xeb020d03) " @ add sp, r2, r3")
625 TEST_SUPPORTED( __inst_thumb32(0xf10d1108) " @ add r1, sp, #0x00080008")
626 TEST_UNSUPPORTED(__inst_thumb32(0xf10d1f08) " @ add pc, sp, #0x00080008")
627 TEST_UNSUPPORTED(__inst_thumb32(0xf10f1108) " @ add r1, pc, #0x00080008")
628 TEST_UNSUPPORTED(__inst_thumb32(0xf1021d08) " @ add sp, r8, #0x00080008")
629 TEST_UNSUPPORTED(__inst_thumb32(0xf1021f08) " @ add pc, r8, #0x00080008")
630
631 TEST_UNSUPPORTED(__inst_thumb32(0xeaa00000) "")
632 TEST_UNSUPPORTED(__inst_thumb32(0xeaf00000) "")
633 TEST_UNSUPPORTED(__inst_thumb32(0xeb200000) "")
634 TEST_UNSUPPORTED(__inst_thumb32(0xeb800000) "")
635 TEST_UNSUPPORTED(__inst_thumb32(0xebe00000) "")
636
637 TEST_UNSUPPORTED(__inst_thumb32(0xf0a00000) "")
638 TEST_UNSUPPORTED(__inst_thumb32(0xf0c00000) "")
639 TEST_UNSUPPORTED(__inst_thumb32(0xf0f00000) "")
640 TEST_UNSUPPORTED(__inst_thumb32(0xf1200000) "")
641 TEST_UNSUPPORTED(__inst_thumb32(0xf1800000) "")
642 TEST_UNSUPPORTED(__inst_thumb32(0xf1e00000) "")
643
644 TEST_GROUP("Coprocessor instructions")
645
646 TEST_UNSUPPORTED(__inst_thumb32(0xec000000) "")
647 TEST_UNSUPPORTED(__inst_thumb32(0xeff00000) "")
648 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
649 TEST_UNSUPPORTED(__inst_thumb32(0xfff00000) "")
650
651 TEST_GROUP("Data-processing (plain binary immediate)")
652
653 TEST_R("addw r0, r",1, VAL1,", #0x123")
654 TEST( "addw r14, sp, #0xf5a")
655 TEST( "addw sp, sp, #0x20")
656 TEST( "addw r7, pc, #0x888")
657 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1f20) " @ addw pc, pc, #0x120")
658 TEST_UNSUPPORTED(__inst_thumb32(0xf20d1f20) " @ addw pc, sp, #0x120")
659 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1d20) " @ addw sp, pc, #0x120")
660 TEST_UNSUPPORTED(__inst_thumb32(0xf2001d20) " @ addw sp, r0, #0x120")
661
662 TEST_R("subw r0, r",1, VAL1,", #0x123")
663 TEST( "subw r14, sp, #0xf5a")
664 TEST( "subw sp, sp, #0x20")
665 TEST( "subw r7, pc, #0x888")
666 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1f20) " @ subw pc, pc, #0x120")
667 TEST_UNSUPPORTED(__inst_thumb32(0xf2ad1f20) " @ subw pc, sp, #0x120")
668 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1d20) " @ subw sp, pc, #0x120")
669 TEST_UNSUPPORTED(__inst_thumb32(0xf2a01d20) " @ subw sp, r0, #0x120")
670
671 TEST("movw r0, #0")
672 TEST("movw r0, #0xffff")
673 TEST("movw lr, #0xffff")
674 TEST_UNSUPPORTED(__inst_thumb32(0xf2400d00) " @ movw sp, #0")
675 TEST_UNSUPPORTED(__inst_thumb32(0xf2400f00) " @ movw pc, #0")
676
677 TEST_R("movt r",0, VAL1,", #0")
678 TEST_R("movt r",0, VAL2,", #0xffff")
679 TEST_R("movt r",14,VAL1,", #0xffff")
680 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00d00) " @ movt sp, #0")
681 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00f00) " @ movt pc, #0")
682
683 TEST_R( "ssat r0, #24, r",0, VAL1,"")
684 TEST_R( "ssat r14, #24, r",12, VAL2,"")
685 TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8")
686 TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8")
687 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0d17) " @ ssat sp, #24, r12")
688 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0f17) " @ ssat pc, #24, r12")
689 TEST_UNSUPPORTED(__inst_thumb32(0xf30d0c17) " @ ssat r12, #24, sp")
690 TEST_UNSUPPORTED(__inst_thumb32(0xf30f0c17) " @ ssat r12, #24, pc")
691
692 TEST_R( "usat r0, #24, r",0, VAL1,"")
693 TEST_R( "usat r14, #24, r",12, VAL2,"")
694 TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8")
695 TEST_R( "usat r14, #24, r",12, VAL2,", asr #8")
696 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0d17) " @ usat sp, #24, r12")
697 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0f17) " @ usat pc, #24, r12")
698 TEST_UNSUPPORTED(__inst_thumb32(0xf38d0c17) " @ usat r12, #24, sp")
699 TEST_UNSUPPORTED(__inst_thumb32(0xf38f0c17) " @ usat r12, #24, pc")
700
701 TEST_R( "ssat16 r0, #12, r",0, HH1,"")
702 TEST_R( "ssat16 r14, #12, r",12, HH2,"")
703 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0d0b) " @ ssat16 sp, #12, r12")
704 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0f0b) " @ ssat16 pc, #12, r12")
705 TEST_UNSUPPORTED(__inst_thumb32(0xf32d0c0b) " @ ssat16 r12, #12, sp")
706 TEST_UNSUPPORTED(__inst_thumb32(0xf32f0c0b) " @ ssat16 r12, #12, pc")
707
708 TEST_R( "usat16 r0, #12, r",0, HH1,"")
709 TEST_R( "usat16 r14, #12, r",12, HH2,"")
710 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0d0b) " @ usat16 sp, #12, r12")
711 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0f0b) " @ usat16 pc, #12, r12")
712 TEST_UNSUPPORTED(__inst_thumb32(0xf3ad0c0b) " @ usat16 r12, #12, sp")
713 TEST_UNSUPPORTED(__inst_thumb32(0xf3af0c0b) " @ usat16 r12, #12, pc")
714
715 TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31")
716 TEST_R( "sbfx r14, r",12, VAL2,", #8, #16")
717 TEST_R( "sbfx r4, r",10, VAL1,", #16, #15")
718 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2d0f) " @ sbfx sp, r12, #8, #16")
719 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2f0f) " @ sbfx pc, r12, #8, #16")
720 TEST_UNSUPPORTED(__inst_thumb32(0xf34d2c0f) " @ sbfx r12, sp, #8, #16")
721 TEST_UNSUPPORTED(__inst_thumb32(0xf34f2c0f) " @ sbfx r12, pc, #8, #16")
722
723 TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31")
724 TEST_R( "ubfx r14, r",12, VAL2,", #8, #16")
725 TEST_R( "ubfx r4, r",10, VAL1,", #16, #15")
726 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2d0f) " @ ubfx sp, r12, #8, #16")
727 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2f0f) " @ ubfx pc, r12, #8, #16")
728 TEST_UNSUPPORTED(__inst_thumb32(0xf3cd2c0f) " @ ubfx r12, sp, #8, #16")
729 TEST_UNSUPPORTED(__inst_thumb32(0xf3cf2c0f) " @ ubfx r12, pc, #8, #16")
730
731 TEST_R( "bfc r",0, VAL1,", #4, #20")
732 TEST_R( "bfc r",14,VAL2,", #4, #20")
733 TEST_R( "bfc r",7, VAL1,", #0, #31")
734 TEST_R( "bfc r",8, VAL2,", #0, #31")
735 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0d1e) " @ bfc sp, #0, #31")
736 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0f1e) " @ bfc pc, #0, #31")
737
738 TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31")
739 TEST_RR( "bfi r",12,VAL1,", r",14 , VAL2,", #4, #20")
740 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1d17) " @ bfi sp, r14, #4, #20")
741 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1f17) " @ bfi pc, r14, #4, #20")
742 TEST_UNSUPPORTED(__inst_thumb32(0xf36d1e17) " @ bfi r14, sp, #4, #20")
743
744 TEST_GROUP("Branches and miscellaneous control")
745
746CONDITION_INSTRUCTIONS(22,
747 TEST_BF("beq.w 2f")
748 TEST_BB("bne.w 2b")
749 TEST_BF("bgt.w 2f")
750 TEST_BB("blt.w 2b")
751 TEST_BF_X("bpl.w 2f", SPACE_0x1000)
752)
753
754 TEST_UNSUPPORTED("msr cpsr, r0")
755 TEST_UNSUPPORTED("msr cpsr_f, r1")
756 TEST_UNSUPPORTED("msr spsr, r2")
757
758 TEST_UNSUPPORTED("cpsie.w i")
759 TEST_UNSUPPORTED("cpsid.w i")
760 TEST_UNSUPPORTED("cps 0x13")
761
762 TEST_SUPPORTED("yield.w")
763 TEST("sev.w")
764 TEST("nop.w")
765 TEST("wfi.w")
766 TEST_SUPPORTED("wfe.w")
767 TEST_UNSUPPORTED("dbg.w #0")
768
769 TEST_UNSUPPORTED("clrex")
770 TEST_UNSUPPORTED("dsb")
771 TEST_UNSUPPORTED("dmb")
772 TEST_UNSUPPORTED("isb")
773
774 TEST_UNSUPPORTED("bxj r0")
775
776 TEST_UNSUPPORTED("subs pc, lr, #4")
777
778 TEST_RMASKED("mrs r",0,~PSR_IGNORE_BITS,", cpsr")
779 TEST_RMASKED("mrs r",14,~PSR_IGNORE_BITS,", cpsr")
780 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8d00) " @ mrs sp, spsr")
781 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8f00) " @ mrs pc, spsr")
782 TEST_UNSUPPORTED("mrs r0, spsr")
783 TEST_UNSUPPORTED("mrs lr, spsr")
784
785 TEST_UNSUPPORTED(__inst_thumb32(0xf7f08000) " @ smc #0")
786
787 TEST_UNSUPPORTED(__inst_thumb32(0xf7f0a000) " @ undefeined")
788
789 TEST_BF( "b.w 2f")
790 TEST_BB( "b.w 2b")
791 TEST_BF_X("b.w 2f", SPACE_0x1000)
792
793 TEST_BF( "bl.w 2f")
794 TEST_BB( "bl.w 2b")
795 TEST_BB_X("bl.w 2b", SPACE_0x1000)
796
797 TEST_X( "blx __dummy_arm_subroutine",
798 ".arm \n\t"
799 ".align \n\t"
800 ".type __dummy_arm_subroutine, %%function \n\t"
801 "__dummy_arm_subroutine: \n\t"
802 "mov r0, pc \n\t"
803 "bx lr \n\t"
804 ".thumb \n\t"
805 )
806 TEST( "blx __dummy_arm_subroutine")
807
808 TEST_GROUP("Store single data item")
809
810#define SINGLE_STORE(size) \
811 TEST_RP( "str"size" r",0, VAL1,", [r",11,-1024,", #1024]") \
812 TEST_RP( "str"size" r",14,VAL2,", [r",1, -1024,", #1080]") \
813 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]") \
814 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]") \
815 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #120") \
816 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #128") \
817 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #-120") \
818 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #-128") \
819 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, ", #120]!") \
820 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, ", #128]!") \
821 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]!") \
822 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]!") \
823 TEST_RPR("str"size".w r",0, VAL1,", [r",1, 0,", r",2, 4,"]") \
824 TEST_RPR("str"size" r",14,VAL2,", [r",10,0,", r",11,4,", lsl #1]") \
825 TEST_UNSUPPORTED("str"size" r0, [r13, r1]") \
826 TEST_R( "str"size".w r",7, VAL1,", [sp, #24]") \
827 TEST_RP( "str"size".w r",0, VAL2,", [r",0,0, "]") \
828 TEST_RP( "str"size" r",6, VAL1,", [r",13, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"]!") \
829 TEST_UNSUPPORTED("str"size" r6, [r13, #-"__stringify(MAX_STACK_SIZE)"-8]!") \
830 TEST_RP( "str"size" r",4, VAL2,", [r",12, TEST_MEMORY_SIZE,", #-"__stringify(MAX_STACK_SIZE)"-8]!") \
831 TEST_UNSUPPORTED("str"size"t r0, [r1, #4]")
832
833 SINGLE_STORE("b")
834 SINGLE_STORE("h")
835 SINGLE_STORE("")
836
837 TEST_UNSUPPORTED(__inst_thumb32(0xf801000d) " @ strb r0, [r1, r13]")
838 TEST_UNSUPPORTED(__inst_thumb32(0xf821000d) " @ strh r0, [r1, r13]")
839 TEST_UNSUPPORTED(__inst_thumb32(0xf841000d) " @ str r0, [r1, r13]")
840
841 TEST("str sp, [sp]")
842 TEST_UNSUPPORTED(__inst_thumb32(0xf8cfe000) " @ str r14, [pc]")
843 TEST_UNSUPPORTED(__inst_thumb32(0xf8cef000) " @ str pc, [r14]")
844
845 TEST_GROUP("Advanced SIMD element or structure load/store instructions")
846
847 TEST_UNSUPPORTED(__inst_thumb32(0xf9000000) "")
848 TEST_UNSUPPORTED(__inst_thumb32(0xf92fffff) "")
849 TEST_UNSUPPORTED(__inst_thumb32(0xf9800000) "")
850 TEST_UNSUPPORTED(__inst_thumb32(0xf9efffff) "")
851
852 TEST_GROUP("Load single data item and memory hints")
853
854#define SINGLE_LOAD(size) \
855 TEST_P( "ldr"size" r0, [r",11,-1024, ", #1024]") \
856 TEST_P( "ldr"size" r14, [r",1, -1024,", #1080]") \
857 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]") \
858 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]") \
859 TEST_P( "ldr"size" r0, [r",11,24, "], #120") \
860 TEST_P( "ldr"size" r14, [r",1, 24, "], #128") \
861 TEST_P( "ldr"size" r0, [r",11,24, "], #-120") \
862 TEST_P( "ldr"size" r14, [r",1,24, "], #-128") \
863 TEST_P( "ldr"size" r0, [r",11,24, ", #120]!") \
864 TEST_P( "ldr"size" r14, [r",1, 24, ", #128]!") \
865 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]!") \
866 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]!") \
867 TEST_PR("ldr"size".w r0, [r",1, 0,", r",2, 4,"]") \
868 TEST_PR("ldr"size" r14, [r",10,0,", r",11,4,", lsl #1]") \
869 TEST_X( "ldr"size".w r0, 3f", \
870 ".align 3 \n\t" \
871 "3: .word "__stringify(VAL1)) \
872 TEST_X( "ldr"size".w r14, 3f", \
873 ".align 3 \n\t" \
874 "3: .word "__stringify(VAL2)) \
875 TEST( "ldr"size".w r7, 3b") \
876 TEST( "ldr"size".w r7, [sp, #24]") \
877 TEST_P( "ldr"size".w r0, [r",0,0, "]") \
878 TEST_UNSUPPORTED("ldr"size"t r0, [r1, #4]")
879
880 SINGLE_LOAD("b")
881 SINGLE_LOAD("sb")
882 SINGLE_LOAD("h")
883 SINGLE_LOAD("sh")
884 SINGLE_LOAD("")
885
886 TEST_BF_P("ldr pc, [r",14, 15*4,"]")
887 TEST_P( "ldr sp, [r",14, 13*4,"]")
888 TEST_BF_R("ldr pc, [sp, r",14, 15*4,"]")
889 TEST_R( "ldr sp, [sp, r",14, 13*4,"]")
890 TEST_THUMB_TO_ARM_INTERWORK_P("ldr pc, [r",0,0,", #15*4]")
891 TEST_SUPPORTED("ldr sp, 99f")
892 TEST_SUPPORTED("ldr pc, 99f")
893
894 TEST_UNSUPPORTED(__inst_thumb32(0xf854700d) " @ ldr r7, [r4, sp]")
895 TEST_UNSUPPORTED(__inst_thumb32(0xf854700f) " @ ldr r7, [r4, pc]")
896 TEST_UNSUPPORTED(__inst_thumb32(0xf814700d) " @ ldrb r7, [r4, sp]")
897 TEST_UNSUPPORTED(__inst_thumb32(0xf814700f) " @ ldrb r7, [r4, pc]")
898 TEST_UNSUPPORTED(__inst_thumb32(0xf89fd004) " @ ldrb sp, 99f")
899 TEST_UNSUPPORTED(__inst_thumb32(0xf814d008) " @ ldrb sp, [r4, r8]")
900 TEST_UNSUPPORTED(__inst_thumb32(0xf894d000) " @ ldrb sp, [r4]")
901
902 TEST_UNSUPPORTED(__inst_thumb32(0xf8600000) "") /* Unallocated space */
903 TEST_UNSUPPORTED(__inst_thumb32(0xf9ffffff) "") /* Unallocated space */
904 TEST_UNSUPPORTED(__inst_thumb32(0xf9500000) "") /* Unallocated space */
905 TEST_UNSUPPORTED(__inst_thumb32(0xf95fffff) "") /* Unallocated space */
906 TEST_UNSUPPORTED(__inst_thumb32(0xf8000800) "") /* Unallocated space */
907 TEST_UNSUPPORTED(__inst_thumb32(0xf97ffaff) "") /* Unallocated space */
908
909 TEST( "pli [pc, #4]")
910 TEST( "pli [pc, #-4]")
911 TEST( "pld [pc, #4]")
912 TEST( "pld [pc, #-4]")
913
914 TEST_P( "pld [r",0,-1024,", #1024]")
915 TEST( __inst_thumb32(0xf8b0f400) " @ pldw [r0, #1024]")
916 TEST_P( "pli [r",4, 0b,", #1024]")
917 TEST_P( "pld [r",7, 120,", #-120]")
918 TEST( __inst_thumb32(0xf837fc78) " @ pldw [r7, #-120]")
919 TEST_P( "pli [r",11,120,", #-120]")
920 TEST( "pld [sp, #0]")
921
922 TEST_PR("pld [r",7, 24, ", r",0, 16,"]")
923 TEST_PR("pld [r",8, 24, ", r",12,16,", lsl #3]")
924 TEST_SUPPORTED(__inst_thumb32(0xf837f000) " @ pldw [r7, r0]")
925 TEST_SUPPORTED(__inst_thumb32(0xf838f03c) " @ pldw [r8, r12, lsl #3]");
926 TEST_RR("pli [r",12,0b,", r",0, 16,"]")
927 TEST_RR("pli [r",0, 0b,", r",12,16,", lsl #3]")
928 TEST_R( "pld [sp, r",1, 16,"]")
929 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00d) " @pld [r7, sp]")
930 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00f) " @pld [r7, pc]")
931
932 TEST_GROUP("Data-processing (register)")
933
934#define SHIFTS32(op) \
935 TEST_RR(op" r0, r",1, VAL1,", r",2, 3, "") \
936 TEST_RR(op" r14, r",12,VAL2,", r",11,10,"")
937
938 SHIFTS32("lsl")
939 SHIFTS32("lsls")
940 SHIFTS32("lsr")
941 SHIFTS32("lsrs")
942 SHIFTS32("asr")
943 SHIFTS32("asrs")
944 SHIFTS32("ror")
945 SHIFTS32("rors")
946
947 TEST_UNSUPPORTED(__inst_thumb32(0xfa01ff02) " @ lsl pc, r1, r2")
948 TEST_UNSUPPORTED(__inst_thumb32(0xfa01fd02) " @ lsl sp, r1, r2")
949 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff002) " @ lsl r0, pc, r2")
950 TEST_UNSUPPORTED(__inst_thumb32(0xfa0df002) " @ lsl r0, sp, r2")
951 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00f) " @ lsl r0, r1, pc")
952 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00d) " @ lsl r0, r1, sp")
953
954 TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"")
955 TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
956 TEST_R( "sxth r8, r",7, HH1,"")
957
958 TEST_UNSUPPORTED(__inst_thumb32(0xfa0fff87) " @ sxth pc, r7");
959 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ffd87) " @ sxth sp, r7");
960 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88f) " @ sxth r8, pc");
961 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88d) " @ sxth r8, sp");
962
963 TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"")
964 TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
965 TEST_R( "uxth r8, r",7, HH1,"")
966
967 TEST_RR( "sxtab16 r0, r",0, HH1,", r",1, HH2,"")
968 TEST_RR( "sxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
969 TEST_R( "sxtb16 r8, r",7, HH1,"")
970
971 TEST_RR( "uxtab16 r0, r",0, HH1,", r",1, HH2,"")
972 TEST_RR( "uxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
973 TEST_R( "uxtb16 r8, r",7, HH1,"")
974
975 TEST_RR( "sxtab r0, r",0, HH1,", r",1, HH2,"")
976 TEST_RR( "sxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
977 TEST_R( "sxtb r8, r",7, HH1,"")
978
979 TEST_RR( "uxtab r0, r",0, HH1,", r",1, HH2,"")
980 TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
981 TEST_R( "uxtb r8, r",7, HH1,"")
982
983 TEST_UNSUPPORTED(__inst_thumb32(0xfa6000f0) "")
984 TEST_UNSUPPORTED(__inst_thumb32(0xfa7fffff) "")
985
986#define PARALLEL_ADD_SUB(op) \
987 TEST_RR( op"add16 r0, r",0, HH1,", r",1, HH2,"") \
988 TEST_RR( op"add16 r14, r",12,HH2,", r",10,HH1,"") \
989 TEST_RR( op"asx r0, r",0, HH1,", r",1, HH2,"") \
990 TEST_RR( op"asx r14, r",12,HH2,", r",10,HH1,"") \
991 TEST_RR( op"sax r0, r",0, HH1,", r",1, HH2,"") \
992 TEST_RR( op"sax r14, r",12,HH2,", r",10,HH1,"") \
993 TEST_RR( op"sub16 r0, r",0, HH1,", r",1, HH2,"") \
994 TEST_RR( op"sub16 r14, r",12,HH2,", r",10,HH1,"") \
995 TEST_RR( op"add8 r0, r",0, HH1,", r",1, HH2,"") \
996 TEST_RR( op"add8 r14, r",12,HH2,", r",10,HH1,"") \
997 TEST_RR( op"sub8 r0, r",0, HH1,", r",1, HH2,"") \
998 TEST_RR( op"sub8 r14, r",12,HH2,", r",10,HH1,"")
999
1000 TEST_GROUP("Parallel addition and subtraction, signed")
1001
1002 PARALLEL_ADD_SUB("s")
1003 PARALLEL_ADD_SUB("q")
1004 PARALLEL_ADD_SUB("sh")
1005
1006 TEST_GROUP("Parallel addition and subtraction, unsigned")
1007
1008 PARALLEL_ADD_SUB("u")
1009 PARALLEL_ADD_SUB("uq")
1010 PARALLEL_ADD_SUB("uh")
1011
1012 TEST_GROUP("Miscellaneous operations")
1013
1014 TEST_RR("qadd r0, r",1, VAL1,", r",2, VAL2,"")
1015 TEST_RR("qadd lr, r",9, VAL2,", r",8, VAL1,"")
1016 TEST_RR("qsub r0, r",1, VAL1,", r",2, VAL2,"")
1017 TEST_RR("qsub lr, r",9, VAL2,", r",8, VAL1,"")
1018 TEST_RR("qdadd r0, r",1, VAL1,", r",2, VAL2,"")
1019 TEST_RR("qdadd lr, r",9, VAL2,", r",8, VAL1,"")
1020 TEST_RR("qdsub r0, r",1, VAL1,", r",2, VAL2,"")
1021 TEST_RR("qdsub lr, r",9, VAL2,", r",8, VAL1,"")
1022
1023 TEST_R("rev.w r0, r",0, VAL1,"")
1024 TEST_R("rev r14, r",12, VAL2,"")
1025 TEST_R("rev16.w r0, r",0, VAL1,"")
1026 TEST_R("rev16 r14, r",12, VAL2,"")
1027 TEST_R("rbit r0, r",0, VAL1,"")
1028 TEST_R("rbit r14, r",12, VAL2,"")
1029 TEST_R("revsh.w r0, r",0, VAL1,"")
1030 TEST_R("revsh r14, r",12, VAL2,"")
1031
1032 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cff8c) " @ rev pc, r12");
1033 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cfd8c) " @ rev sp, r12");
1034 TEST_UNSUPPORTED(__inst_thumb32(0xfa9ffe8f) " @ rev r14, pc");
1035 TEST_UNSUPPORTED(__inst_thumb32(0xfa9dfe8d) " @ rev r14, sp");
1036
1037 TEST_RR("sel r0, r",0, VAL1,", r",1, VAL2,"")
1038 TEST_RR("sel r14, r",12,VAL1,", r",10, VAL2,"")
1039
1040 TEST_R("clz r0, r",0, 0x0,"")
1041 TEST_R("clz r7, r",14,0x1,"")
1042 TEST_R("clz lr, r",7, 0xffffffff,"")
1043
1044 TEST_UNSUPPORTED(__inst_thumb32(0xfa80f030) "") /* Unallocated space */
1045 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1046 TEST_UNSUPPORTED(__inst_thumb32(0xfab0f000) "") /* Unallocated space */
1047 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1048
1049 TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations")
1050
1051 TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"")
1052 TEST_RR( "mul r7, r",8, VAL2,", r",9, VAL2,"")
1053 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ff09) " @ mul pc, r8, r9")
1054 TEST_UNSUPPORTED(__inst_thumb32(0xfb08fd09) " @ mul sp, r8, r9")
1055 TEST_UNSUPPORTED(__inst_thumb32(0xfb0ff709) " @ mul r7, pc, r9")
1056 TEST_UNSUPPORTED(__inst_thumb32(0xfb0df709) " @ mul r7, sp, r9")
1057 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70f) " @ mul r7, r8, pc")
1058 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70d) " @ mul r7, r8, sp")
1059
1060 TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1061 TEST_RRR( "mla r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1062 TEST_UNSUPPORTED(__inst_thumb32(0xfb08af09) " @ mla pc, r8, r9, r10");
1063 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ad09) " @ mla sp, r8, r9, r10");
1064 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fa709) " @ mla r7, pc, r9, r10");
1065 TEST_UNSUPPORTED(__inst_thumb32(0xfb0da709) " @ mla r7, sp, r9, r10");
1066 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70f) " @ mla r7, r8, pc, r10");
1067 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70d) " @ mla r7, r8, sp, r10");
1068 TEST_UNSUPPORTED(__inst_thumb32(0xfb08d709) " @ mla r7, r8, r9, sp");
1069
1070 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1071 TEST_RRR( "mls r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1072
1073 TEST_RRR( "smlabb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1074 TEST_RRR( "smlabb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1075 TEST_RRR( "smlatb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1076 TEST_RRR( "smlatb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1077 TEST_RRR( "smlabt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1078 TEST_RRR( "smlabt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1079 TEST_RRR( "smlatt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1080 TEST_RRR( "smlatt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1081 TEST_RR( "smulbb r0, r",1, VAL1,", r",2, VAL2,"")
1082 TEST_RR( "smulbb r7, r",8, VAL3,", r",9, VAL1,"")
1083 TEST_RR( "smultb r0, r",1, VAL1,", r",2, VAL2,"")
1084 TEST_RR( "smultb r7, r",8, VAL3,", r",9, VAL1,"")
1085 TEST_RR( "smulbt r0, r",1, VAL1,", r",2, VAL2,"")
1086 TEST_RR( "smulbt r7, r",8, VAL3,", r",9, VAL1,"")
1087 TEST_RR( "smultt r0, r",1, VAL1,", r",2, VAL2,"")
1088 TEST_RR( "smultt r7, r",8, VAL3,", r",9, VAL1,"")
1089
1090 TEST_RRR( "smlad r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1091 TEST_RRR( "smlad r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1092 TEST_RRR( "smladx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1093 TEST_RRR( "smladx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1094 TEST_RR( "smuad r0, r",0, HH1,", r",1, HH2,"")
1095 TEST_RR( "smuad r14, r",12,HH2,", r",10,HH1,"")
1096 TEST_RR( "smuadx r0, r",0, HH1,", r",1, HH2,"")
1097 TEST_RR( "smuadx r14, r",12,HH2,", r",10,HH1,"")
1098
1099 TEST_RRR( "smlawb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1100 TEST_RRR( "smlawb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1101 TEST_RRR( "smlawt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1102 TEST_RRR( "smlawt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1103 TEST_RR( "smulwb r0, r",1, VAL1,", r",2, VAL2,"")
1104 TEST_RR( "smulwb r7, r",8, VAL3,", r",9, VAL1,"")
1105 TEST_RR( "smulwt r0, r",1, VAL1,", r",2, VAL2,"")
1106 TEST_RR( "smulwt r7, r",8, VAL3,", r",9, VAL1,"")
1107
1108 TEST_RRR( "smlsd r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1109 TEST_RRR( "smlsd r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1110 TEST_RRR( "smlsdx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1111 TEST_RRR( "smlsdx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1112 TEST_RR( "smusd r0, r",0, HH1,", r",1, HH2,"")
1113 TEST_RR( "smusd r14, r",12,HH2,", r",10,HH1,"")
1114 TEST_RR( "smusdx r0, r",0, HH1,", r",1, HH2,"")
1115 TEST_RR( "smusdx r14, r",12,HH2,", r",10,HH1,"")
1116
1117 TEST_RRR( "smmla r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1118 TEST_RRR( "smmla r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1119 TEST_RRR( "smmlar r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1120 TEST_RRR( "smmlar r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1121 TEST_RR( "smmul r0, r",0, VAL1,", r",1, VAL2,"")
1122 TEST_RR( "smmul r14, r",12,VAL2,", r",10,VAL1,"")
1123 TEST_RR( "smmulr r0, r",0, VAL1,", r",1, VAL2,"")
1124 TEST_RR( "smmulr r14, r",12,VAL2,", r",10,VAL1,"")
1125
1126 TEST_RRR( "smmls r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1127 TEST_RRR( "smmls r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1128 TEST_RRR( "smmlsr r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1129 TEST_RRR( "smmlsr r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1130
1131 TEST_RRR( "usada8 r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL3,"")
1132 TEST_RRR( "usada8 r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1133 TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"")
1134 TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"")
1135
1136 TEST_UNSUPPORTED(__inst_thumb32(0xfb00f010) "") /* Unallocated space */
1137 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fff1f) "") /* Unallocated space */
1138 TEST_UNSUPPORTED(__inst_thumb32(0xfb70f010) "") /* Unallocated space */
1139 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1140 TEST_UNSUPPORTED(__inst_thumb32(0xfb700010) "") /* Unallocated space */
1141 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1142
1143 TEST_GROUP("Long multiply, long multiply accumulate, and divide")
1144
1145 TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1146 TEST_RR( "smull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1147 TEST_UNSUPPORTED(__inst_thumb32(0xfb89f80a) " @ smull pc, r8, r9, r10");
1148 TEST_UNSUPPORTED(__inst_thumb32(0xfb89d80a) " @ smull sp, r8, r9, r10");
1149 TEST_UNSUPPORTED(__inst_thumb32(0xfb897f0a) " @ smull r7, pc, r9, r10");
1150 TEST_UNSUPPORTED(__inst_thumb32(0xfb897d0a) " @ smull r7, sp, r9, r10");
1151 TEST_UNSUPPORTED(__inst_thumb32(0xfb8f780a) " @ smull r7, r8, pc, r10");
1152 TEST_UNSUPPORTED(__inst_thumb32(0xfb8d780a) " @ smull r7, r8, sp, r10");
1153 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780f) " @ smull r7, r8, r9, pc");
1154 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780d) " @ smull r7, r8, r9, sp");
1155
1156 TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1157 TEST_RR( "umull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1158
1159 TEST_RRRR( "smlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1160 TEST_RRRR( "smlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1161
1162 TEST_RRRR( "smlalbb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1163 TEST_RRRR( "smlalbb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1164 TEST_RRRR( "smlalbt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1165 TEST_RRRR( "smlalbt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1166 TEST_RRRR( "smlaltb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1167 TEST_RRRR( "smlaltb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1168 TEST_RRRR( "smlaltt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1169 TEST_RRRR( "smlaltt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1170
1171 TEST_RRRR( "smlald r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1172 TEST_RRRR( "smlald r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1173 TEST_RRRR( "smlaldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1174 TEST_RRRR( "smlaldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1175
1176 TEST_RRRR( "smlsld r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1177 TEST_RRRR( "smlsld r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1178 TEST_RRRR( "smlsldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1179 TEST_RRRR( "smlsldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1180
1181 TEST_RRRR( "umlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1182 TEST_RRRR( "umlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1183 TEST_RRRR( "umaal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1184 TEST_RRRR( "umaal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1185
1186 TEST_GROUP("Coprocessor instructions")
1187
1188 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
1189 TEST_UNSUPPORTED(__inst_thumb32(0xffffffff) "")
1190
1191 TEST_GROUP("Testing instructions in IT blocks")
1192
1193 TEST_ITBLOCK("sub.w r0, r0")
1194
1195 verbose("\n");
1196}
1197