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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/probes/kprobes/checkers-arm.c
4 *
5 * Copyright (C) 2014 Huawei Inc.
6 */
7
8#include <linux/kernel.h>
9#include "../decode.h"
10#include "../decode-arm.h"
11#include "checkers.h"
12
13static enum probes_insn __kprobes arm_check_stack(probes_opcode_t insn,
14 struct arch_probes_insn *asi,
15 const struct decode_header *h)
16{
17 /*
18 * PROBES_LDRSTRD, PROBES_LDMSTM, PROBES_STORE,
19 * PROBES_STORE_EXTRA may get here. Simply mark all normal
20 * insns as STACK_USE_NONE.
21 */
22 static const union decode_item table[] = {
23 /*
24 * 'STR{,D,B,H}, Rt, [Rn, Rm]' should be marked as UNKNOWN
25 * if Rn or Rm is SP.
26 * x
27 * STR (register) cccc 011x x0x0 xxxx xxxx xxxx xxxx xxxx
28 * STRB (register) cccc 011x x1x0 xxxx xxxx xxxx xxxx xxxx
29 */
30 DECODE_OR (0x0e10000f, 0x0600000d),
31 DECODE_OR (0x0e1f0000, 0x060d0000),
32
33 /*
34 * x
35 * STRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx
36 * STRH (register) cccc 000x x0x0 xxxx xxxx xxxx 1011 xxxx
37 */
38 DECODE_OR (0x0e5000bf, 0x000000bd),
39 DECODE_CUSTOM (0x0e5f00b0, 0x000d00b0, STACK_USE_UNKNOWN),
40
41 /*
42 * For PROBES_LDMSTM, only stmdx sp, [...] need to examine
43 *
44 * Bit B/A (bit 24) encodes arithmetic operation order. 1 means
45 * before, 0 means after.
46 * Bit I/D (bit 23) encodes arithmetic operation. 1 means
47 * increment, 0 means decrement.
48 *
49 * So:
50 * B I
51 * / /
52 * A D | Rn |
53 * STMDX SP, [...] cccc 100x 00x0 xxxx xxxx xxxx xxxx xxxx
54 */
55 DECODE_CUSTOM (0x0edf0000, 0x080d0000, STACK_USE_STMDX),
56
57 /* P U W | Rn | Rt | imm12 |*/
58 /* STR (immediate) cccc 010x x0x0 1101 xxxx xxxx xxxx xxxx */
59 /* STRB (immediate) cccc 010x x1x0 1101 xxxx xxxx xxxx xxxx */
60 /* P U W | Rn | Rt |imm4| |imm4|*/
61 /* STRD (immediate) cccc 000x x1x0 1101 xxxx xxxx 1111 xxxx */
62 /* STRH (immediate) cccc 000x x1x0 1101 xxxx xxxx 1011 xxxx */
63 /*
64 * index = (P == '1'); add = (U == '1').
65 * Above insns with:
66 * index == 0 (str{,d,h} rx, [sp], #+/-imm) or
67 * add == 1 (str{,d,h} rx, [sp, #+<imm>])
68 * should be STACK_USE_NONE.
69 * Only str{,b,d,h} rx,[sp,#-n] (P == 1 and U == 0) are
70 * required to be examined.
71 */
72 /* STR{,B} Rt,[SP,#-n] cccc 0101 0xx0 1101 xxxx xxxx xxxx xxxx */
73 DECODE_CUSTOM (0x0f9f0000, 0x050d0000, STACK_USE_FIXED_XXX),
74
75 /* STR{D,H} Rt,[SP,#-n] cccc 0001 01x0 1101 xxxx xxxx 1x11 xxxx */
76 DECODE_CUSTOM (0x0fdf00b0, 0x014d00b0, STACK_USE_FIXED_X0X),
77
78 /* fall through */
79 DECODE_CUSTOM (0, 0, STACK_USE_NONE),
80 DECODE_END
81 };
82
83 return probes_decode_insn(insn, asi, table, false, false, stack_check_actions, NULL);
84}
85
86const struct decode_checker arm_stack_checker[NUM_PROBES_ARM_ACTIONS] = {
87 [PROBES_LDRSTRD] = {.checker = arm_check_stack},
88 [PROBES_STORE_EXTRA] = {.checker = arm_check_stack},
89 [PROBES_STORE] = {.checker = arm_check_stack},
90 [PROBES_LDMSTM] = {.checker = arm_check_stack},
91};
92
93static enum probes_insn __kprobes arm_check_regs_nouse(probes_opcode_t insn,
94 struct arch_probes_insn *asi,
95 const struct decode_header *h)
96{
97 asi->register_usage_flags = 0;
98 return INSN_GOOD;
99}
100
101static enum probes_insn arm_check_regs_normal(probes_opcode_t insn,
102 struct arch_probes_insn *asi,
103 const struct decode_header *h)
104{
105 u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
106 int i;
107
108 asi->register_usage_flags = 0;
109 for (i = 0; i < 5; regs >>= 4, insn >>= 4, i++)
110 if (regs & 0xf)
111 asi->register_usage_flags |= 1 << (insn & 0xf);
112
113 return INSN_GOOD;
114}
115
116
117static enum probes_insn arm_check_regs_ldmstm(probes_opcode_t insn,
118 struct arch_probes_insn *asi,
119 const struct decode_header *h)
120{
121 unsigned int reglist = insn & 0xffff;
122 unsigned int rn = (insn >> 16) & 0xf;
123 asi->register_usage_flags = reglist | (1 << rn);
124 return INSN_GOOD;
125}
126
127static enum probes_insn arm_check_regs_mov_ip_sp(probes_opcode_t insn,
128 struct arch_probes_insn *asi,
129 const struct decode_header *h)
130{
131 /* Instruction is 'mov ip, sp' i.e. 'mov r12, r13' */
132 asi->register_usage_flags = (1 << 12) | (1<< 13);
133 return INSN_GOOD;
134}
135
136/*
137 * | Rn |Rt/d| | Rm |
138 * LDRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1101 xxxx
139 * STRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx
140 * | Rn |Rt/d| |imm4L|
141 * LDRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1101 xxxx
142 * STRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1111 xxxx
143 *
144 * Such instructions access Rt/d and its next register, so different
145 * from others, a specific checker is required to handle this extra
146 * implicit register usage.
147 */
148static enum probes_insn arm_check_regs_ldrdstrd(probes_opcode_t insn,
149 struct arch_probes_insn *asi,
150 const struct decode_header *h)
151{
152 int rdt = (insn >> 12) & 0xf;
153 arm_check_regs_normal(insn, asi, h);
154 asi->register_usage_flags |= 1 << (rdt + 1);
155 return INSN_GOOD;
156}
157
158
159const struct decode_checker arm_regs_checker[NUM_PROBES_ARM_ACTIONS] = {
160 [PROBES_MRS] = {.checker = arm_check_regs_normal},
161 [PROBES_SATURATING_ARITHMETIC] = {.checker = arm_check_regs_normal},
162 [PROBES_MUL1] = {.checker = arm_check_regs_normal},
163 [PROBES_MUL2] = {.checker = arm_check_regs_normal},
164 [PROBES_MUL_ADD_LONG] = {.checker = arm_check_regs_normal},
165 [PROBES_MUL_ADD] = {.checker = arm_check_regs_normal},
166 [PROBES_LOAD] = {.checker = arm_check_regs_normal},
167 [PROBES_LOAD_EXTRA] = {.checker = arm_check_regs_normal},
168 [PROBES_STORE] = {.checker = arm_check_regs_normal},
169 [PROBES_STORE_EXTRA] = {.checker = arm_check_regs_normal},
170 [PROBES_DATA_PROCESSING_REG] = {.checker = arm_check_regs_normal},
171 [PROBES_DATA_PROCESSING_IMM] = {.checker = arm_check_regs_normal},
172 [PROBES_SEV] = {.checker = arm_check_regs_nouse},
173 [PROBES_WFE] = {.checker = arm_check_regs_nouse},
174 [PROBES_SATURATE] = {.checker = arm_check_regs_normal},
175 [PROBES_REV] = {.checker = arm_check_regs_normal},
176 [PROBES_MMI] = {.checker = arm_check_regs_normal},
177 [PROBES_PACK] = {.checker = arm_check_regs_normal},
178 [PROBES_EXTEND] = {.checker = arm_check_regs_normal},
179 [PROBES_EXTEND_ADD] = {.checker = arm_check_regs_normal},
180 [PROBES_BITFIELD] = {.checker = arm_check_regs_normal},
181 [PROBES_LDMSTM] = {.checker = arm_check_regs_ldmstm},
182 [PROBES_MOV_IP_SP] = {.checker = arm_check_regs_mov_ip_sp},
183 [PROBES_LDRSTRD] = {.checker = arm_check_regs_ldrdstrd},
184};